Page 1
LC2MOS 4-/8-Channel
ADG408
1 OF 8
DECODER
S1
S8
D
A0 A1 A2 EN
ADG409
1 OF 4
DECODER
S1A
S4B
DA
A0 A1 EN
DB
S4A
S1B
a
FEATURES
44 V Supply Maximum Ratings
VSS to VDD Analog Signal Range
Low On Resistance (100 V max)
Low Power (I
Fast Switching
Break-Before-Make Switching Action
Plug-in Replacement for DG408/DG409
APPLICATIONS
Audio and Video Routing
Automatic Test Equipment
Data Acquisition Systems
Battery Powered Systems
Sample and Hold Systems
Communication Systems
GENERAL DESCRIPTION
SUPPLY
< 75 mA)
High Performance Analog Multiplexers
The ADG408 and ADG409 are monolithic CMOS analog
multiplexers comprising eight single channels and four differential channels respectively. The ADG408 switches one of eight
inputs to a common output as determined by the 3-bit binary
address lines A0, A1 and A2. The ADG409 switches one of four
differential inputs to a common differential output as determined by the 2-bit binary address lines A0 and A1. An EN
input on both devices is used to enable or disable the device.
When disabled, all channels are switched OFF.
The ADG408/ADG409 are designed on an enhanced LC
2
MOS
process which provides low power dissipation yet gives high
switching speed and low on resistance. Each channel conducts
equally well in both directions when ON and has an input signal
range that extends to the supplies. In the OFF condition, signal
levels up to the supplies are blocked. All channels exhibit breakbefore-make switching action, preventing momentary shorting
when switching channels. Inherent in the design is low charge
injection for minimum transients when switching the digital
inputs.
The ADG408/ADG409 are improved replacements for the
DG408/DG409 Analog Multiplexers.
ADG408/ADG409
FUNCTIONAL BLOCK DIAGRAMS
PRODUCT HIGHLIGHTS
1. Extended Signal Range
The ADG408/ADG409 are fabricated on an enhanced
2
LC
MOS process giving an increased signal range that
extends to the supply rails.
2. Low Power Dissipation
3 Low R
4. Single Supply Operation
ON
For applications where the analog signal is unipolar, the
ADG408/ADG409 can be operated from a single rail power
supply. The parts are fully specified with a single +12 V
power supply and will remain functional with single supplies
as low as +5 V.
REV. A
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700 World Wide Web Site: http://www.analog.com
Fax: 781/326-8703 © Analog Devices, Inc., 1998
Page 2
ADG408/ADG409–SPECIFICATIONS
1
DUAL SUPPLY
Parameter +258C +858C +258C +1258C Units Test Conditions/Comments
ANALOG SWITCH
Analog Signal Range V
R
ON
∆R
ON
LEAKAGE CURRENTS
Source OFF Leakage I
Drain OFF Leakage I
ADG408 ±1 ±100 ± 1 ±100 nA max Test Circuit 3
ADG409 ±1 ±50 ±1 ±50 nA max
Channel ON Leakage I
ADG408 ±1 ±100 ± 1 ±100 nA max Test Circuit 4
ADG409 ±1 ±50 ±1 ±50 nA max
DIGITAL INPUTS
Input High Voltage, V
Input Low Voltage, V
Input Current
I
or I
INL
CIN, Digital Input Capacitance 8 8 pF typ f = 1 MHz
DYNAMIC CHARACTERISTICS
t
TRANSITION
t
OPEN
(EN) 85 125 85 125 ns typ R
t
ON
t
OFF
Charge Injection 20 20 pC typ V
OFF Isolation –75 –75 dB typ R
Channel-to-Channel Crosstalk 85 85 dB typ R
C
(OFF) 11 11 pF typ f = 1 MHz
S
(OFF) f = 1 MHz
C
D
ADG408 40 40 pF typ
ADG409 20 20 pF typ
C
, CS (ON) f = 1 MHz
D
ADG408 54 54 pF typ
ADG409 34 34 pF typ
POWER REQUIREMENTS
I
DD
I
SS
I
DD
NOTES
1
Temperature ranges are as follows: B Version: –40°C to +85°C; T Version: –55 °C to +125°C.
2
Guaranteed by design, not subject to production test.
Specifications subject to change without notice.
INH
(EN) 65 65 ns typ R
(VDD = +15 V, VSS = –15 V, GND = 0 V, unless otherwise noted)
B Version T Version
–408C to –558C to
SS
to V
DD
VSS to VDDV
40 40 Ω typ VD = ±10 V, I
100 125 100 125 Ω max
15 15 Ω max V
(OFF) ±0.5 ±50 ±0.5 ±50 nA max VD = ±10 V, V
S
= +10 V, –10 V
D
Test Circuit 2
(OFF) V
D
, IS (ON) VS = V
D
INH
INL
2.4 2.4 V min
0.8 0.8 V max
±10 ± 10 µA max V
2
120 120 ns typ R
250 250 ns max V
= ±10 V; V
D
= ±10 V;
D
= 0 or V
IN
= 300 Ω, C
L
= ±10 V, V
S1
Test Circuit 5
10 10 10 10 ns min R
150 225 150 225 ns max V
150 150 ns max V
= 300 Ω, C
L
= +5 V; Test Circuit 6
V
S
= 300 Ω, C
L
= +5 V; Test Circuit 7
S
= 300 Ω, C
L
= +5 V; Test Circuit 7
S
= 0 V, R
S
Test Circuit 8
= 1 kΩ, f = 100 kHz;
L
V
= 0 V; Test Circuit 9
EN
= 1 kΩ, f = 100 kHz;
L
Test Circuit 10
11µA typ V
= 0 V, VEN = 0 V
IN
55µA max
11µA typ
55µA max
100 100 µA typ V
= 0 V, VEN = 2.4 V
IN
200 500 200 500 µA max
= –10 mA
S
= 710 V;
S
= 710 V;
S
DD
= 35 pF;
L
= 710 V;
SS
= 35 pF;
L
= 35 pF;
L
= 35 pF;
L
= 0 Ω, C
S
= 10 nF;
L
–2–
REV. A
Page 3
ADG408/ADG409
1
SINGLE SUPPLY
Parameter +258C +858C +258C +1258C Units Test Conditions/Comments
ANALOG SWITCH
Analog Signal Range 0 to V
R
ON
LEAKAGE CURRENTS
Source OFF Leakage I
Drain OFF Leakage I
ADG408 ±1 ±100 ± 1 ±100 nA max Test Circuit 3
ADG409 ±1 ±50 ±1 ±50 nA max
Channel ON Leakage I
ADG408 ±1 ±100 ± 1 ±100 nA max Test Circuit 4
ADG409 ±1 ±50 ±1 ±50 nA max
DIGITAL INPUTS
Input High Voltage, V
Input Low Voltage, V
Input Current
I
or I
INL
CIN, Digital Input Capacitance 8 8 pF typ f = 1 MHz
DYNAMIC CHARACTERISTICS
t
TRANSITION
t
OPEN
(EN) 140 140 ns typ R
t
ON
t
OFF
Charge Injection 5 5 pC typ V
OFF Isolation –75 –75 dB typ R
Channel-to-Channel Crosstalk 85 85 dB typ R
C
(OFF) 11 11 pF typ f = 1 MHz
S
(OFF) f = 1 MHz
C
D
ADG408 40 40 pF typ
ADG409 20 20 pF typ
C
, CS (ON) f = 1 MHz
D
ADG408 54 54 pF typ
ADG409 34 34 pF typ
POWER REQUIREMENTS
I
DD
I
DD
NOTES
1
Temperature ranges are as follows: B Version: –40°C to +85°C; T Version: –55 °C to +125°C.
2
Guaranteed by design, not subject to production test.
Specifications subject to change without notice.
INH
(EN) 60 60 ns typ R
(VDD = +12 V, VSS = 0 V, GND = 0 V, unless otherwise noted)
B Version T Version
–408C to –558C to
DD
0 to V
90 90 Ω typ V
(OFF) ±0.5 ±50 ±0.5 ±50 nA max V
S
DD
V
= +3 V, +10 V, IS = –1 mA
D
=8 V/0 V, VS = 0 V/8 V;
D
Test Circuit 2
(OFF) VD =8 V/0 V, VS = 0 V/8 V;
D
, IS (ON) VS = VD = 8 V/0 V;
D
INH
INL
2
130 130 ns typ R
2.4 2.4 V min
0.8 0.8 V max
±10 ± 10 µA max V
= 0 or V
IN
= 300 Ω, C
L
= 8 V/0 V, VS8 = 0 V/8 V;
V
S1
DD
= 35 pF;
L
Test Circuit 5
10 10 ns typ R
= 300 Ω, C
L
= +5 V; Test Circuit 6
V
S
= 300 Ω, C
L
V
= +5 V; Test Circuit 7
S
= 300 Ω, C
L
= +5 V; Test Circuit 7
V
S
= 0 V, R
S
= 35 pF;
L
= 35 pF;
L
= 35 pF;
L
= 0 Ω, C
S
= 10 nF;
L
Test Circuit 8
= 1 kΩ, f = 100 kHz;
L
V
= 0 V; Test Circuit 9
EN
= 1 kΩ, f = 100 kHz;
L
Test Circuit 10
11µA typ V
= 0 V, VEN = 0 V
IN
55µA max
100 100 µA typ V
= 0 V, VEN = 2.4 V
IN
200 500 200 500 µA max
REV. A
–3–
Page 4
ADG408/ADG409
WARNING!
ESD SENSITIVE DEVICE
ABSOLUTE MAXIMUM RATINGS
(T
= +25°C unless otherwise noted)
A
1
VDD to VSS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +44 V
V
to GND . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to +25 V
DD
V
to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . +0.3 V to –25 V
SS
Analog, Digital Inputs
2
. . . . . VSS –2 V to VDD +2 V or 20 mA,
Whichever Occurs First
Continuous Current, S or D . . . . . . . . . . . . . . . . . . . . . 20 mA
Peak Current, S or D
(Pulsed at 1 ms, 10% Duty Cycle max) . . . . . . . . . . . 40 mA
Operating Temperature Range
Industrial (B Version) . . . . . . . . . . . . . . . . . –40°C to +85°C
Extended (T Version) . . . . . . . . . . . . . . . . –55°C to +125°C
Storage Temperature Range . . . . . . . . . . . . –65°C to +150°C
Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . +150°C
Cerdip Package, Power Dissipation . . . . . . . . . . . . . . . 900 mW
θ
, Thermal Impedance . . . . . . . . . . . . . . . . . . . . . 76°C/W
JA
Lead Temperature, Soldering (10 sec) . . . . . . . . . . . +300°C
Plastic Package, Power Dissipation . . . . . . . . . . . . . . . 470 mW
θ
, Thermal Impedance . . . . . . . . . . . . . . . . . . . . 117°C/W
JA
Lead Temperature, Soldering (10 sec) . . . . . . . . . . . +260°C
TSSOP Package, Power Dissipation . . . . . . . . . . . . . . 450 mW
θ
, Thermal Impedance . . . . . . . . . . . . . . . . . . . . 155°C/W
JA
θ
, Thermal Impedance . . . . . . . . . . . . . . . . . . . . . 50°C/W
JC
SOIC Package, Power Dissipation . . . . . . . . . . . . . . . . 600 mW
θ
, Thermal Impedance . . . . . . . . . . . . . . . . . . . . . 77°C/W
JA
Lead Temperature, Soldering
Vapor Phase (60 sec) . . . . . . . . . . . . . . . . . . . . . . +215°C
Infrared (15 sec) . . . . . . . . . . . . . . . . . . . . . . . . . . +220°C
NOTES
1
Stresses above those listed under Absolute Maximum Ratings may cause perma-
nent damage to the device. This is a stress rating only; functional operation of the
device at these or any other conditions above those listed in the operational
sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability. Only one absolute
maximum rating may be applied at any one time.
2
Overvoltages at A, EN, S or D will be clamped by internal diodes. Current should
be limited to the maximum ratings given.
ORDERING INFORMATION
1
Model
Temperature Range Package Option
ADG408BN –40°C to +85°C N-16
ADG408BR –40°C to +85°C R-16A
ADG408BRU –40°C to +85°C RU-16
ADG408TQ –55°C to +125°C Q-16
ADG409BN –40°C to +85°C N-16
ADG409BR –40°C to +85°C R-16A
ADG409TQ –55°C to +125°C Q-16
NOTES
1
To order MIL-STD-883, Class B processed parts, add /883B to T grade part
numbers.
2
N = Plastic DIP; Q = Cerdip; R = 0.15" Small Outline IC (SOIC);
RU = Think Shrink Small Outline Package (TSSOP).
2
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection.
Although the ADG408/ADG409 feature proprietary ESD protection circuitry, permanent
damage may occur on devices subjected to high energy electrostatic discharges. Therefore,
proper ESD precautions are recommended to avoid performance degradation or loss of functionality.
–4–
REV. A
Page 5
ADG408/ADG409
PIN CONFIGURATIONS (DIP/SOIC/TSSOP)
A0
EN
V
SS
S1
S2
S3
S4
D
1
2
3
4
ADG408
TOP VIEW
5
(Not to Scale)
6
7
8
16
A1
15
A2
14
GND
13
V
DD
12
S5
11
S6
10
S7
9
S8
EN
V
S1A
S2A
S3A
S4A
DA
A0
SS
1
2
3
4
ADG409
TOP VIEW
5
(Not to Scale)
6
7
8
16
A1
15
GND
14
V
DD
13
S1B
12
S2B
11
S3B
10
S4B
9
DB
ADG408 Truth Table
ON
A2 A1 A0 EN SWITCH
X X X 0 NONE
00011
00112
01013
01114
10015
10116
11017
11118
ADG409 Truth Table
ON SWITCH
Al A0 EN PAIR
X X 0 NONE
0011
0112
1013
1114
TERMINOLOGY
V
DD
V
SS
Most positive power supply potential.
Most negative power supply potential in dual
supplies. In single supply applications, it may
be connected to ground.
GND Ground (0 V) reference.
R
∆R
ON
ON
Ohmic resistance between D and S.
Difference between the RON of any two
channels.
I
(OFF) Source leakage current when the switch is off.
S
(OFF) Drain leakage current when the switch is off.
I
D
, IS (ON) Channel leakage current when the switch is on.
I
D
(VS) Analog voltage on terminals D, S.
V
D
(OFF) Channel input capacitance for “OFF”
C
S
condition.
C
(OFF) Channel output capacitance for “OFF”
D
condition.
C
, CS (ON) “ON” switch capacitance.
D
C
IN
(EN) Delay time between the 50% and 90% points of
t
ON
Digital input capacitance.
the digital input and switch “ON” condition.
t
(EN) Delay time between the 50% and 90% points of
OFF
the digital input and switch “OFF” condition.
t
TRANSITION
Delay time between the 50% and 90% points of
the digital inputs and the switch “ON” condition
when switching from one address state to another.
t
OPEN
“OFF” time measured between the 80% point
of both switches when switching from one
address state to another.
V
V
I
INL
INH
INL
(I
INH
Maximum input voltage for Logic “0.”
Minimum input voltage for Logic “1.”
) Input current of the digital input.
Crosstalk A measure of unwanted signal which is coupled
through from one channel to another as a result
of parasitic capacitance.
Off Isolation A measure of unwanted signal coupling through
an “OFF” channel.
Charge A measure of the glitch impulse transferred
Injection from the digital input to the analog output
during switching.
I
DD
I
SS
Positive supply current.
Negative supply current.
REV. A
–5–
Page 6
ADG408/ADG409
Typical Performance Characteristics
120
TA = +258C
100
80
– V
ON
R
60
40
20
–15 15–10
VDD = +10V
V
= –10V
SS
–5 0 5 10
VD (VS) – Volts
VDD = +5V
V
= –5V
SS
VDD = +12V
V
VDD = +15V
V
= –15V
SS
SS
= –12V
Figure 1. RON as a Function of VD (VS): Dual Supply Voltage
100
VDD = +15V
V
= –15V
SS
90
80
70
– V
60
ON
R
50
40
30
–15 15–10
+1258C
+858C
+258C
–5 0 5 10
VD (VS) – Volts
180
160
140
120
– V
ON
R
100
80
60
40
0153
VDD = +5V
V
= 0V
SS
VDD = +10V
V
= 0V
SS
6912
VD (VS) – Volts
TA = +258C
VDD = +12V
V
= 0V
SS
VDD = +15V
V
= 0V
SS
Figure 4. RON as a Function of VD (VS): Single Supply
Voltage
130
VDD = +12V
V
= 0V
SS
120
110
100
– V
ON
R
90
80
70
60
0122
+1258C
+858C
+258C
46810
VD (VS) – Volts
Figure 2. RON as a Function of VD (VS) for Different
Temperatures
0.2
TA = +258C
VDD = +15V
VSS = –15V
0.1
0
I
(ON)
D
LEAKAGE CURRENT – nA
–0.1
–0.2
–15 15–10 –5 0 5 10
VD (VS) – Volts
IS (OFF)
ID (OFF)
Figure 3. Leakage Currents as a Function of VD (VS)
–6–
Figure 5. RON as a Function of VD (VS) for Different
Temperatures
0.04
TA = +258C
= +12V
V
DD
= 0V
V
SS
0.02
I
(ON)
0
–0.02
LEAKAGE CURRENT – nA
–0.04
–0.06
0122
D
ID (OFF)
(OFF)
I
S
46810
VD (VS) – Volts
Figure 6. Leakage Currents as a Function of VD (VS)
REV. A
Page 7
ADG408/ADG409
120
100
80
t – ns
60
40
20
t
TRANSITION
t
(EN)
ON
t
(EN)
OFF
1153
5791113
VIN – Volts
VDD = +15V
= –15V
V
SS
Figure 7. Switching Time vs. VIN (Bipolar Supply)
400
300
200
t – ns
t
TRANSITION
t
(EN)
ON
V
= +5V
IN
140
VDD = +12V
= 0V
V
SS
120
100
t – ns
80
60
40
1133
57911
VIN – Volts
t
TRANSITION
t
(EN)
ON
t
(EN)
OFF
Figure 10. Switching Time vs. VIN (Single Supply)
300
= +5V
V
IN
200
t
TRANSITION
t – ns
100
t
(EN)
OFF
0
5157
91113
V
– Volts
SUPPLY
Figure 8. Switching Time vs. Single Supply
4
10
VDD = +15V
V
= –15V
SS
3
10
– mA
DD
I
EN = 2.4V
EN = 0V
2
10
FREQUENCY – Hz
10M10 100 1k 10k 100k 1M
Figure 9. Positive Supply Current vs. Switching Frequency
100
0
65 61567
t
OFF
t
(EN)
ON
(EN)
69 611 613
V
SUPPLY
– Volts
Figure 11. Switching Time vs. Bipolar Supply
4
10
VDD = +15V
V
= –15V
SS
3
10
2
10
– mA
SS
I
1
10
0
10
–1
10
100 1k 10k 100k
EN = 2.4V
EN = 0V
10M1M10
FREQUENCY – Hz
Figure 12. Negative Supply Current vs. Switching
Frequency
REV. A
–7–
Page 8
ADG408/ADG409
110
100
90
OFF ISOLATION – dB
80
70
1k 1M10k
Figure 13. Off Isolation vs. Frequency
Test Circuits
FREQUENCY – Hz
100k
VDD = +15V
V
= –15V
SS
110
100
90
80
CROSSTALK – dB
70
60
1k 1M10k
FREQUENCY – Hz
Figure 14. Crosstalk vs. Frequency
100k
VDD = +15V
V
= –15V
SS
I
DS
V1
SD
V
S
R
= V1/I
ON
DS
Test Circuit 1. On Resistance
V
V
DD
SS
V
V
DD
SS
GND
IS (OFF)
V
S1
A
S
S2
S8
V
D
Test Circuit 2. IS (OFF)
EN
D
+0.8V
V
DD
V
DD
S1
S2
S8
V
S
GND
Test Circuit 3. ID (OFF)
V
DD
V
DD
S1
S8
V
S
GND
Test Circuit 4. ID (ON)
V
SS
V
SS
D
+0.8V
EN
V
SS
V
SS
D
2.4V
EN
ID (OFF)
A
V
D
ID (ON)
A
V
D
–8–
REV. A
Page 9
3V
ENABLE
DRIVE (V
0V
t
OUTPUT
)
IN
TRANSITION
< 20ns
t
r
t
< 20ns
50% 50%
90%
f
V
IN
50V
t
TRANSITION
90%
Test Circuit 5. Switching Time of Multiplexer, t
ADG408/ADG409
V
V
DD
SS
V
V
DD
SS
A0
A1
A2
ADG408*
2.4V
EN
*SIMILAR CONNECTION FOR ADG409
TRANSlTlON
V
DDVSS
S1
S2 THRU S7
S8
D
GND
V
V
OUTPUT
300V
S1
S8
35pF
ADDRESS
DRIVE (V
OUTPUT
3V
ENABLE
DRIVE (V
0V
OUTPUT
3V
)
IN
0V
80%80%
t
OPEN
V
IN
50V
*SIMILAR CONNECTION FOR ADG409
Test Circuit 6. Break-Before-Make Delay, t
IN
)
tON (EN)
50% 50%
0.9V
O
t
0.9V
OFF
O
(EN)
V
IN
50V
2.4V
V
A0
A1
A2
ADG408*
EN
OPEN
V
A0
A1
A2
EN
DD
S2 THRU S7
GND
DD
V
DDVSS
S2 THRU S8
ADG408*
GND
V
SS
OUTPUT
300V
OUTPUT
V
S
300V
V
S
35pF
35pF
S1
S8
D
V
SS
S1
D
REV. A
*SIMILAR CONNECTION FOR ADG409
Test Circuit 7. Enable Delay, tON (EN), t
–9–
OFF
(EN)
Page 10
ADG408/ADG409
3V
V
IN
V
V
A0
A1
A2
V
DD
DD
ADG408*
SS
V
SS
V
OUT
Q
= CL 3 D V
INJ
V
DD
V
DD
A0
A1
ADG408
A2
S1
S8
V
S
0V
EN
GND
OFF ISOLATION = 20 LOG V
Test Circuit 9. OFF Isolation
R
OUT
D V
OUT
S
V
S
S
EN
V
IN
*SIMILAR CONNECTION FOR ADG409
D
GND
C
L
10nF
V
OUT
Test Circuit 8. Charge Injection
V
SS
V
SS
1kV
V
OUT
1kV
V
S
D
OUT/VIN
V
V
DD
SS
V
V
DD
SS
A0
A1
ADG408
A2
S1
S2
S8
GND
CROSSTALK = 20 LOG V
EN
D
OUT/VIN
2.4V
1kV
V
OUT
Test Circuit 10. Channel-to-Channel Crosstalk
–10–
REV. A
Page 11
OUTLINE DIMENSIONS
16 9
8
1
0.201 (5.10)
0.193 (4.90)
0.256 (6.50)
0.246 (6.25)
0.177 (4.50)
0.169 (4.30)
PIN 1
SEATING
PLANE
0.006 (0.15)
0.002 (0.05)
0.0118 (0.30)
0.0075 (0.19)
0.0256
(0.65)
BSC
0.0433
(1.10)
MAX
0.0079 (0.20)
0.0035 (0.090)
0.028 (0.70)
0.020 (0.50)
8°
0°
Dimensions shown in inches and (mm).
ADG408/ADG409
0.125
(3.18)
MIN
0.005 (0.13) MIN
0.200 (5.08)
MAX
0.200 (5.08)
0.125 (3.18)
Plastic DIP (N-16)
0.87 (22.1) MAX
16
18
PIN 1
0.018
(0.46)
0.100
(2.54)
BSC
9
0.25
0.31
(6.35)
(7.87)
0.035
(0.89)
0.18
(4.57)
SEATING
0.033
PLANE
(0.84)
Cerdip (Q-16)
0.080 (2.03) MAX
16
1
PIN 1
0.840 (21.34) MAX
0.022 (0.558)
0.014 (0.356)
0.100
(2.54)
BSC
9
8
0.070 (1.78)
0.030 (0.76)
0.310 (7.87)
0.220 (5.59)
0.060 (1.52)
0.015 (0.38)
0.150
(3.81)
MIN
SEATING
PLANE
0.011
(0.28)
0.3 (7.62)
0.320 (8.13)
0.290 (7.37)
15°
0°
0.18
(4.57)
MAX
0.015 (0.38)
0.008 (0.20)
SO (Narrow Body) (R-16A)
0.3937 (10.00)
0.3859 (9.80)
0.0500
PLANE
16 9
PIN 1
0.0192 (0.49)
(1.27)
0.0138 (0.35)
BSC
0.2440 (6.20)
81
0.2284 (5.80)
0.0688 (1.75)
0.0532 (1.35)
0.0099 (0.25)
0.0075 (0.19)
0.0196 (0.50)
0.0099 (0.25)
8°
0°
0.0500 (1.27)
0.0160 (0.41)
0.1574 (4.00)
0.1497 (3.80)
0.0098 (0.25)
0.0040 (0.10)
SEATING
Thin Shrink Small Outline Package (TSSOP)
(RU-16)
C1824a–0–4/98
x 45°
REV. A
PRINTED IN U.S.A.
–11–
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