ANALOG DEVICES ADG3308-1 Service Manual

Low Voltage, 1.15 V to 5.5 V, 8-Channel

V

FEATURES

Bidirectional logic level translation Operates from 1.15 V to 5.5 V Low quiescent current < 1 μA No direction pin

APPLICATIONS

Low voltage ASIC level translation Smart card readers Cell phones and cell phone cradles Portable communication devices Telecommunications equipment Network switches and routers Storage systems (SAN/NAS) Computing/server applications GPS Portable POS systems Low cost serial interfaces

Bidirectional Logic Level Translators

ADG3308/ADG3308-1

FUNCTIONAL BLOCK DIAGRAM

CCA

ADG3308/ADG3308-1/

ADG3308-2

A1

A2

A3

A4 Y4

A5

A6

A7

A8

EN

GND

Figure 1.

CCY

Y1

Y2

Y3

Y5

Y6

Y7

Y8

4865-001

GENERAL DESCRIPTION

The ADG3308/ADG3308-1/ADG3308-2 are bidirectional level translators containing eight bidirectional channels. They can be used in multivoltage digital system applications, such as a data transfer between a low voltage DSP controller and a higher voltage device. The internal architecture allows the device to perform bidirectional level translation without an additional signal to set the direction in which the translation takes place.

The voltage applied to V of the device, and V operation, V

must always be less than V

CCA

compatible logic signals applied to the A side of the device appear as V

compatible levels on the Y side. Similarly, V

CCY

compatible logic levels applied to the Y side of the device appear as V

compatible logic levels on the A side.

CCA

The enable pin (EN) provides three-state operation on both the A side and the Y side pins. When the EN pin is pulled low, the terminals on both sides of the device are in the high impedance state. For normal operation, EN should be driven high.

sets the logic levels on the A side

CCA

sets the levels on the Y side. For proper

CCY

. The V

CCY

CCA

CCY

The ADG3308 is available in a compact 20-lead TSSOP and a 20-lead LFCSP, the ADG3308-1 is available in a 20-ball WLCSP, and the ADG3308-2 is available in a backside-coated 20-ball WLCSP. The EN pin is referred to the V voltage for the ADG3308 and to the V

supply voltage for the

CCA

CCY

supply

ADG3308-1 and ADG3308-2.

The ADG3308/ADG3308-1/ADG3308-2 are guaranteed to operate over the 1.15 V to 5.5 V supply voltage range and the extended −40°C to +85°C temperature range.

PRODUCT HIGHLIGHTS

1. Bidirectional logic level translation.

2. Fully guaranteed over the 1.15 V to 5.5 V supply range.

3. No direction pin.

4. Packages: 20-lead TSSOP and 20-lead LFCSP (ADG3308),

20-ball WLCSP (ADG3308-1), and backside-coated 20-ball WLCSP (ADG3308-2).

Rev. C

Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Anal og Devices for its use, nor for any infringements of patents or ot her rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners.

ADG3308/ADG3308-1

REVISION HISTORY

9/07—Rev. B to Rev. C

Updated Outline Dimensions....................................................... 19

7/07—Rev. A to Rev. B

Added Backside-Coated WLCSP Package ......................Universal

Changes to Input Driving Requirements Section ...................... 16

Updated Outline Dimensions....................................................... 19

Changes to Ordering Guide.......................................................... 20

7/06—Rev. 0 to Rev. A

Added WLCSP Package…………………………..……Universal

Added Figure 4………………………………………………......7

Updated Outline Dimensions……………………………….…19

Changes to Ordering Guide………………………………....…19

1/05—Revision 0: Initial Version

Theory of Operation ...................................................................... 16

Level Translator Architecture................................................... 16

Input Driving Requirements..................................................... 16

Output Load Requirements ...................................................... 16

Enable Operation ....................................................................... 16

Power Supplies ............................................................................ 16

Data Rate ..................................................................................... 17

Applications..................................................................................... 18

Layout Guidelines....................................................................... 18

Outline Dimensions ....................................................................... 19

Ordering Guide .......................................................................... 20

Rev. C | Page 2 of 20

ADG3308/ADG3308-1

SPECIFICATIONS

V

= 1.65 V to 5.5 V, V

CCY

= 1.15 V to V

CCA

, GND = 0 V. All specifications T

CCY

MIN

to T

, unless otherwise noted.

MAX

Table 1.

Parameter Symbol Conditions Min Typ2Max Unit

LOGIC INPUTS/OUTPUTS

A Side

Input High Voltage

V

Input Low Voltage Output High Voltage V Output Low Voltage V Capacitance Leakage Current I

3

V

IHA

V

ILA

OHA

OLA

C

A

LA, HIGH-ZVA

V

= 1.15 V V

CCA

V

= 1.2 V to 5.5 V 0.65 × V

CCA

− 0.3 V

CCA

0.35 × V

VY = V

, IOH = 20 μA, see Figure 29 V

CCY

− 0.4 V

CCA

VY = 0 V, IOL = 20 μA, see Figure 29 0.4 V

f = 1 MHz, EN = 0, see Figure 34 10 pF

= 0 V or V

, EN = 0, see Figure 31 ±1 μA

CCA

Y Side

Input High Voltage Input Low Voltage Output High Voltage V Output Low Voltage V Capacitance Leakage Current I

3

V

IHY

V

ILY

OHY

OLY

CY

LY, H IG H-ZVY

0.65 × V

0.35 × V VA = V

, IOH = 20 μA, see Figure 30 V

CCA

− 0.4 V

CCY

VA = 0 V, IOL = 20 μA, see Figure 30 0.4 V f = 1 MHz, EN = 0, see Figure 35 6.8 pF

= 0 V or V

, EN = 0, see Figure 32 ±1 μA

CCY

Enable (EN)

Input High Voltage

ADG3308 (TSSOP, LFCSP) ADG3308-1/ADG3308-2 (WLCSP) V

V

Input Low Voltage

ADG3308 (TSSOP, LFCSP)

3

V

IHEN

0.65 × V = 1.15 V V

CCA

= 1.2 V to 5.5 V 0.65 × V

CCA

V

ILEN

− 0.3 V

CCA

0.35 × V

ADG3308-1/ADG3308-2 (WLCSP) 0.35 × V Leakage Current I Capacitance Enable Time

3

LEN

C

EN

t

EN

VEN = 0 V or V

, VA = 0 V, see Figure 33 ±1 μA

CCY

4.5 pF RS = RT = 50 Ω, VA = 0 V or

(A→Y), VY = 0 V or V

V

CCA

CCY

(Y→A),

1 1.8 μs

see Figure 36

SWITCHING CHARACTERISTICS

3.3 V ± 0.3 V ≤ V

CCA

≤ V

A→Y Level Translation

Propagation Delay

Rise Time

Fall Time

Maximum Data Rate

Channel-to-Channel Skew

Part-to-Part Skew

Y→A Level Translation

Propagation Delay

Rise Time

Fall Time

Maximum Data Rate

Channel-to-Channel Skew

Part-to-Part Skew

3

, V

= 5 V ± 0.5 V

CCY

R

t

P, A→Y

t

R, A→Y

t

F, A →Y

D

MAX, A→Y

t

SKEW, A→Y

t

PPSKEW, A→Y

R

t

P, Y→A

t

R, Y→A

t

F, Y →A

D

MAX, Y→A

t

SKEW, Y→A

t

PPSKEW, Y→A

= RT = 50 Ω, CL = 50 pF, see Figure 37

S

6 10 ns

2 3.5 ns

50 Mbps

2 4 ns

3 ns

= RT = 50 Ω, CL = 15 pF, see Figure 38

S

4 7 ns

1 3 ns

3 7 ns

50 Mbps 2 3.5 ns

2 ns

1

V

CCA

V

CCY

V

CCY

V

CCA

CCY

CCA

V

V V

Rev. C | Page 3 of 20

ADG3308/ADG3308-1

Parameter Symbol Conditions Min Typ2Max Unit

1.8 V ± 0.15 V ≤ V A→Y Level Translation

Propagation Delay

Rise Time Fall Time

Maximum Data Rate

Channel-to-Channel Skew

Part-to-Part Skew

Y→A Level Translation

Propagation Delay

Rise Time

Fall Time

Maximum Data Rate Channel-to-Channel Skew

Part-to-Part Skew

1.15 V to 1.3 V ≤ V A→Y Level Translation

Propagation Delay

Rise Time

Fall Time

Maximum Data Rate

Channel-to-Channel Skew Part-to-Part Skew

Y→A Level Translation

Propagation Delay

Rise Time

Fall Time

Maximum Data Rate

Channel-to-Channel Skew

Part-to-Part Skew

1.15 V to 1.3 V ≤ V A→Y Level Translation

Propagation Delay

Rise Time

Fall Time

Maximum Data Rate

Channel-to-Channel Skew

Part-to-Part Skew

Y→A Level Translation

Propagation Delay Rise Time

Fall Time

Maximum Data Rate

Channel-to-Channel Skew

Part-to-Part Skew

CCA

≤ V

, V

= 3.3 V ± 0.3 V

CCY

R

t

P, A→Y

t

R, A→Y

t

F, A →Y

D

MAX, A→Y

t

SKEW, A→Y

t

PPSKEW, A→Y

R

t

P, Y→A

t

R, Y→A

t

F, Y →A

D

MAX, Y→A

t

SKEW, Y→A

t

PPSKEW, Y→A

, V

= 3.3 V ± 0.3 V

CCY

R

t

P, A→Y

t

R, A→Y

t

F, A →Y

D

MAX, A→Y

t

SKEW, A→Y

t

PPSKEW, A→Y

R

t

P, Y→A

t

R, Y→A

t

F, Y →A

D

MAX, Y→A

t

SKEW, Y→A

t

PPSKEW, Y→A

, V

= 1.8 V ± 0.3 V

CCY

R

t

P, A→Y

t

R, A→Y

t

F, A →Y

D

MAX, A→Y

t

SKEW, A→Y

t

PPSKEW, A→Y

R

t

P, Y→A

t

R, Y→A

t

F, Y →A

D

MAX, Y→A

t

SKEW, Y→A

t

PPSKEW, Y→A

= RT = 50 Ω, CL = 50 pF, see Figure 37

S

8 11 ns

2 5 ns 2 5 ns

50 Mbps

2 4 ns

4 ns

= RT = 50 Ω, CL = 15 pF, see Figure 38

S

5 8 ns

2 3.5 ns

50 Mbps 2 3 ns

3 ns

= RT = 50 Ω, CL = 50 pF, see Figure 37

S

9 18 ns

3 5 ns

2 5 ns

40 Mbps

2 5 ns 10 ns

= RT = 50 Ω, CL = 15 pF, see Figure 38

S

5 9 ns

2 4 ns

40 Mbps

2 4 ns

4 ns

= RT = 50 Ω, CL = 50 pF, see Figure 37

S

12 25 ns

7 12 ns

3 5 ns

25 Mbps

2 5 ns

15 ns

= RT = 50 Ω, CL = 15 pF, see Figure 38

S

14 35 ns 5 16 ns

2.5 6.5 ns

25 Mbps

3 6.5 ns

23.5 ns

Rev. C | Page 4 of 20

ADG3308/ADG3308-1

Parameter Symbol Conditions Min Typ2Max Unit

2.5 V ± 0.2 V ≤ V A→Y Level Translation

Propagation Delay

Rise Time Fall Time

Maximum Data Rate

Channel-to-Channel Skew

Part-to-Part Skew

Y→A Level Translation

Propagation Delay

Rise Time

Fall Time

Maximum Data Rate Channel-to-Channel Skew

Part-to-Part Skew

POWER REQUIREMENTS

Power Supply Voltages V

V

Quiescent Power Supply Current I

I

Three-State Mode Power Supply Current I

I

1

Temperature range is −40°C to +85°C (B Version) for the TSSOP, the LFCSP, the WLCSP, and the backside-coated WLCSP.

2

All typical values are at TA = 25°C, unless otherwise noted.

3

Guaranteed by design; not subject to production test.

CCA

≤ V

, V

= 3.3 V ± 0.3 V

CCY

R

t

P, A→Y

t

R, A→Y

t

F, A →Y

D

MAX, A→Y

t

SKEW, A→Y

t

PPSKEW, A→Y

R

t

P, Y→A

t

R, Y→A

t

F, Y →A

D

MAX, Y→A

t

SKEW, Y→A

t

PPSKEW, Y→A

CCA

CCY

CCA

CCY

HIGH-ZA

HIGH-ZY

= RT = 50 Ω, CL = 50 pF, see Figure 37

S

7 10 ns

2.5 4 ns 2 5 ns

60 Mbps

1.5 2 ns

4 ns

= RT = 50 Ω, CL = 15 pF, see Figure 38

S

5 8 ns

1 4 ns

3 5 ns

60 Mbps 2 3 ns

3 ns

V

CCA

≤ V

CCY

1.15 5.5 V

1.65 5.5 V VA = 0 V or V

V

= V

CCA

CCY

VA = 0 V or V

= V

V

CCA

CCY

V

= V

CCA

CCY

V

= V

CCA

CCY

, VY = 0 V or V

CCA

= 5.5 V, EN = V

, VY = 0 V or V

CCA

= 5.5 V, EN = V

CCY

,

= 5.5 V, EN = 0 0.1 1 μA = 5.5 V, EN = 0 0.1 1 μA

0.17 1 μA

0.27 1 μA

Rev. C | Page 5 of 20

ADG3308/ADG3308-1

ABSOLUTE MAXIMUM RATINGS

TA = 25°C, unless otherwise noted.

Table 2.

Parameter Rating

V

to GND −0.3 V to +7 V

CCA

V

to GND V

CCY

Digital Inputs (A) −0.3 V to (V Digital Inputs (Y) −0.3 V to (V EN to GND −0.3 V to +7 V Operating Temperature Range

Extended Industrial Range (B Version) −40°C to +85°C Storage Temperature Range −65°C to +150°C Junction Temperature 150°C θJA Thermal Impedance

20-Lead TSSOP 78°C/W

20-Lead LFCSP 30.4°C/W

20-Ball WLCSP 100°C/W

20-Ball Backside-Coated WLCSP 100°C/W Lead Temperature, Soldering (10 sec) 300°C IR Reflow, Peak Temperature (<20 sec) 260°C (+0°C/−5°C)

to +7 V

CCA

+ 0.3 V)

CCA

+ 0.3 V)

CCY

Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.

Only one absolute maximum rating may be applied at any one time.

ESD CAUTION

Rev. C | Page 6 of 20

ANALOG DEVICES ADG3308-1 Service Manual

Specifications and Main Features

Frequently Asked Questions

User Manual

FEATURES

APPLICATIONS

FUNCTIONAL BLOCK DIAGRAM

GENERAL DESCRIPTION

PRODUCT HIGHLIGHTS

TABLE OF CONTENTS

REVISION HISTORY

SPECIFICATIONS

ABSOLUTE MAXIMUM RATINGS

ESD CAUTION