Analog Devices ADG3304 Datasheet

Low Voltage, 1.15 V to 5.5 V, 4-Channel

FEATURES

Bidirectional level translation
Operates from 1.15 V to 5.5 V
Low quiescent current < 1 µA
No direction pin

APPLICATIONS

SPI®, MICROWIRE™ level translation
Low voltage ASIC level translation
Smart card readers
Cell phones and cell phone cradles
Portable communication devices
Telecommunications equipment
Network switches and routers
Storage systems (SAN/NAS)
Computing/server applications
GPS
Portable POS systems
Low cost serial interfaces

GENERAL DESCRIPTION

The ADG3304 is a bidirectional logic level translator that con­tains four bidirectional channels. It can be used in multivoltage
digital system applications such as data transfer between a low
voltage DSP/controller and a higher voltage device using SPI
and MICROWIRE interfaces. The internal architecture allows
the device to perform bidirectional logic level translation
without an additional signal to set the direction in which the
translation takes place.

The voltage applied to V
the device, while V
operation, V

CCY

must always be less than V

CCA

patible logic signals applied to the A side of the device appear as

-compatible levels on the Y side. Similarly, V

V

CCY

logic levels applied to the Y side of the device appear as V
compatible logic levels on the A side.

sets the logic levels on the A side of

CCA

sets the levels on the Y side. For proper

CCY

. The V

-com-

CCA

-compatible

CCY

CCA

-

Bidirectional Logic Level Translator

ADG3304

FUNCTIONAL BLOCK DIAGRAM

V

CCA

A1

A2

A3

A4

EN

The enable pin (EN) provides three-state operation on both the
A-side and the Y-side pins. When the EN pin is pulled low, the
terminals on both sides of the device are in the high impedance
state. The EN pin is referred to the V
driven high for normal operation.

The ADG3304 is available in compact 14-lead TSSOP and
12-bump WLCSP packages. It is guaranteed to operate over
the 1.15 V to 5.5 V supply voltage range and the extended

−40°C to +85°C temperature range.

PRODUCT HIGHLIGHTS

1. Bidirectional level translation.

2. Fully guaranteed over the 1.15 V to 5.5 V supply range.

3. No direction pin.

GND

Figure 1.

V

CCY

Y1

Y2

Y3

Y4

supply voltage and

CCA

04860-001

Rev. 0

Information furnished by Analog Devices is believed to be accurate and reliable.
However, no responsibility is assumed by Analog Devices for its use, nor for any
infringements of patents or other rights of third parties that may result from its use.
Specifications subject to change without notice. No license is granted by implication
or otherwise under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective owners.

4. 14-lead TSSOP and 12-bump WLCSP packages.

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: [phone]
Fax: [phone] © 2005 Analog Devices, Inc. All rights reserved.

www.analog.com

ADG3304

TABLE OF CONTENTS

Specifications..................................................................................... 3

Absolute Maximum Ratings............................................................ 6

ESD Caution.................................................................................. 6

Pin Configurations and Function Descriptions ........................... 7

Typical Performance Characteristics ............................................. 8

Test C ir c ui t s .....................................................................................12

Te r mi n ol o g y .................................................................................... 15

Theory of Operation ...................................................................... 16

Level Translator Architecture ................................................... 16

REVISION HISTORY

1/05—Revision 0: Initial Version

Input Driving Requirements..................................................... 16

Output Load Requirements ...................................................... 16

Enable Operation ....................................................................... 16

Power Supplies ............................................................................ 16

Data Rate ..................................................................................... 17

Applications..................................................................................... 18

Layout Guidelines....................................................................... 18

Outline Dimensions ....................................................................... 19

Ordering Guide .......................................................................... 19

Rev. 0 | Page 2 of 20

ADG3304

CCA

≤ V

≤ V

CCA

3

3

3

3

3

CCY

1

= 1.15 V to V

3

, V

= 5 V ± 0.5 V

CCY

, V

= 3.3 V ± 0.3 V

CCY

CCY

, GND = 0 V. All specifications T

CCY

V

IHA

IHA

V

ILA

OHA

OLA

C

A

LA, HiZ

V

IHY

ILY

OHY

OLY

CY

LY, HiZ

V

IHEN

IHEN

V

ILEN

LEN

C

EN

t

EN

V

= 1.15 V V

CCA

V

= 1.2 V to 5.5 V V

CCA

0.4 V

VY = V

VY = 0 V, IOL = 20 µA, Figure 28 0.4 V

f = 1 MHz, EN = 0, Figure 33 9 pF
VA = 0 V/V

V

0.4 V
VA = V
VA = 0 V, IOL = 20 µA, Figure 29 0.4 V
f = 1 MHz, EN = 0, Figure 34 6 pF
VY = 0 V/V

V

= 1.15 V V

CCA

V

= 1.2 V to 5.5 V V

CCA

0.4 V
VEN = 0 V/V

3 pF
RS = RT = 50 Ω, VA = 0 V/V

V

= 0 V/V

Y

R

P, A-Y

R, A-Y

F, A-Y

MAX, A-Y

SKEW, A-Y

PPSKEW, A-Y

R

P, Y-A

R, Y-A

F, Y-A

MAX, Y-A

SKEW, Y-A

PPSKEW, Y-A

R

P, A-Y

R, A-Y

F, A-Y

MAX, A-Y

SKEW, A-Y

PPSKEW, A-Y

= RT = 50 Ω, CL = 50 pF, Figure 36

S

6 10 ns
2 3.5 ns
2 3.5 ns
50 Mbps
2 4 ns
3 ns

= RT = 50 Ω, CL = 15 pF, Figure 37

S

4 7 ns
1 3 ns

3 7 ns
50 Mbps
2 3.5 ns
2 ns

= RT = 50 Ω, CL = 50 pF, Figure 36

S

8 11 ns
2 5 ns
2 5 ns
50 Mbps
2 4 ns
4 ns

to T

MIN

, IOH = 20 µA, Figure 28 V

CCY

, EN = 0, Figure 30 ±1 µA

CCA

, IOH = 20 µA, Figure 29 V

CCA

, EN = 0, Figure 31 ±1 µA

CCY

, VA = 0 V, Figure 32 ±1

CCA

(Y→A), Figure 35

CCY

, unless otherwise noted.

MAX

(A→Y),

CCA

1 1.8 µs

− 0.3 V

CCA

− 0.4

CCA

− 0.4 V

CCA

− 0.4 V

CCY

− 0.4 V

CCY

− 0.3 V

CCA

− 0.4 V

CCA

µA

SPECIFICATIONS

V

= 1.65 V to 5.5 V, V

CCY

Table 1.

Parameter Symbol Conditions Min Typ2Max Unit

LOGIC INPUTS/OUTPUTS

A Side

Input High Voltage
V
Input Low Voltage
Output High Voltage V
Output Low Voltage V
Capacitance
Leakage Current I

Y Side

Input Low Voltage
Input High Voltage3 V
Output High Voltage V
Output Low Voltage V
Capacitance
Leakage Current I

Enable (EN)

Input High Voltage
V
Input Low Voltage
Leakage Current I

Capacitance
Enable Time

SWITCHING CHARACTERISTICS

3.3 V ± 0.3 V ≤ V
A→Y Level Translation

Propagation Delay t
Rise Time t
Fall Time t
Maximum Data Rate D
Channel-to-Channel Skew t
Part-to-Part Skew t

Y→A Level Translation

Propagation Delay t
Rise Time t

Fall Time t
Maximum Data Rate D
Channel-to-Channel Skew t
Part-to-Part Skew t

1.8 V ± 0.15 V ≤ V
A→Y Translation

Propagation Delay t
Rise Time t
Fall Time t
Maximum Data Rate D
Channel-to-Channel Skew t
Part-to-Part Skew t

3

3

3

3

CCA

Rev. 0 | Page 3 of 20

ADG3304

Parameter Symbol Conditions Min Typ2Max Unit

Y→A Translation

Propagation Delay t
Rise Time t
Fall Time t
Maximum Data Rate D
Channel-to-Channel Skew t
Part-to-Part Skew t

1.15 V to 1.3 V ≤ V

CCA

≤ V

, V

= 3.3 V ± 0.3 V

CCY

CCY

A→Y Translation

Propagation Delay t
Rise Time t
Fall Time t
Maximum Data Rate D
Channel-to-Channel Skew t
Part-to-Part Skew t

Y→A Translation

Propagation Delay t
Rise Time t
Fall Time t
Maximum Data Rate D
Channel-to-Channel Skew t
Part-to-Part Skew t

1.15 V to 1.3 V ≤ V

CCA

≤ V

, V

= 1.8 V ± 0.3 V

CCY

CCY

A→Y Translation

Propagation Delay t
Rise Time t
Fall Time t
Maximum Data Rate D
Channel-to-Channel Skew t
Part-to-Part Skew t

Y→A Translation

Propagation Delay t
Rise Time t
Fall Time t
Maximum Data Rate D
Channel-to-Channel Skew t
Part-to-Part Skew t

2.5 V ± 0.2 V ≤ V

CCA

≤ V

CCY

, V

CCY

= 3.3 V ± 0.3 V

A→Y Translation

Propagation Delay t
Rise Time t
Fall Time t
Maximum Data Rate D
Channel-to-Channel Skew t
Part-to-Part Skew t

Y→A Translation

Propagation Delay t
Rise Time t
Fall Time t
Maximum Data Rate D
Channel-to-Channel Skew t
Part-to-Part Skew t

R

P, Y-A

R, Y-A

F, Y-A

MAX, Y-A

SKEW, Y-A

PPSKEW, Y-A

R

P, A-Y

R, A-Y

F, A-Y

MAX, A-Y

SKEW, A-Y

PPSKEW, A-Y

R

P, Y-A

R, Y-A

F, Y-A

MAX, Y-A

SKEW, Y-A

PPSKEW, Y-A

R

P, A-Y

R, A-Y

F, A-Y

MAX, A-Y

SKEW, A-Y

PPSKEW, A-Y

R

P, Y-A

R, Y-A

F, Y-A

MAX, Y-A

SKEW, Y-A

PPSKEW, Y-A

R

P, A-Y

R, A-Y

F, A-Y

MAX, A-Y

SKEW, A-Y

PPSKEW, A-Y

R

P, Y-A

R, Y-A

F, Y-A

MAX, Y-A

SKEW, Y-A

PPSKEW, Y-A

= RT = 50 Ω, CL = 15 pF, Figure 37

S

5 8 ns
2 3.5 ns
2 3.5 ns
50 Mbps
2 3 ns
3 ns

= RT = 50 Ω, CL = 50 pF, Figure 36

S

9 18 ns
3 5 ns
2 5 ns
40 Mbps
2 5 ns
10 ns

= RT = 50 Ω, CL = 15 pF, Figure 37

S

5 9 ns
2 4 ns
2 4 ns
40 Mbps
2 4 ns
4 ns

= RT = 50 Ω, CL = 50 pF, Figure 36

S

12 25 ns
7 12 ns
3 5 ns
25 Mbps
2 5 ns
15 ns

= RT = 50 Ω, CL = 15 pF, Figure 37

S

14 35 ns
5 16 ns

2.5 6.5 ns
25 Mbps
3 6.5 ns

23.5 ns

= RT = 50 Ω, CL = 50 pF, Figure 36

S

7 10 ns

2.5 4 ns
2 5 ns
60 Mbps

1.5 2 ns
4 ns

= RT = 50 Ω, CL = 15 pF, Figure 37

S

5 8 ns
1 4 ns
3 5 ns
60 Mbps
2 3 ns
3 ns

Rev. 0 | Page 4 of 20

ADG3304

Parameter Symbol Conditions Min Typ2Max Unit

POWER REQUIREMENTS

Power Supply Voltages V

V
Quiescent Power Supply Current I

I

Three-State Mode Power Supply Current I
I

1

Temperature range is as follows: B version: −40°C to +85°C.

2

All typical values are at TA = 25°C, unless otherwise noted.

3

Guaranteed by design; not subject to production test.

CCA

CCY

CCA

CCY

HiZA

HiZY

V

≤ V

CCA

CCY

1.65 5.5 V
VA = 0 V/V

= V

V

CCA

VA = 0 V/V
V

= V

CCA

V

= V

CCA

V

= V

CCA

, VY = 0 V/V

CCA

= 5.5 V, EN = 1

CCY

, VY = 0 V/V

CCA

= 5.5 V, EN = 1

CCY

= 5.5 V, EN = 0 0.1 1 µA

CCY

= 5.5 V, EN = 0 0.1 1 µA

CCY

CCY

CCY

,

,

1.15 5.5 V

0.17 1 µA

0.27 1 µA

Rev. 0 | Page 5 of 20

ADG3304

ABSOLUTE MAXIMUM RATINGS

TA = 25°C, unless otherwise noted.

Table 2.

Parameter Rating

V

to GND −0.3 V to +7 V

CCA

V

to GND V

CCY

Digital Inputs (A) −0.3 V to (V
Digital Inputs (Y) −0.3 V to (V
EN to GND −0.3 V to +7 V
Operating Temperature Range

Industrial (B Version) −40°C to +85°C
Storage Temperature Range −65°C to +150°C
Junction Temperature 150°C
θJA Thermal Impedance (4-Layer Board)

14-Lead TSSOP 89.21°C/W

12-Bump WLCSP 1200C/W
Lead Temperature, Soldering (10 sec) 300°C
IR Reflow, Peak Temperature (< 20 sec) 260°C

to +7 V

CCA

+ 0.3 V)

CCA

+ 0.3 V)

CCY

Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those listed in the operational sections
of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability. Only one absolute maximum rating may be
applied at any one time.

ESD CAUTION

ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on
the human body and test equipment and can discharge without detection. Although this product features
proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy
electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance
degradation or loss of functionality.

Rev. 0 | Page 6 of 20