How it Works
Analog Devices
Loading...
ADG3241 a
Datasheet
12 pgs214.01 Kb0
Table of contents
Loading...

Analog Devices ADG3241 a Datasheet

2.5 V/3.3 V, 1-Bit, 2-Port
Level Translator Bus Switch in SOT-66
ADG3241
FEATURES 225 ps Propagation Delay through the Switch
4.5 Switch Connection between Ports Data Rate 1.5 Gbps
2.5 V/3.3 V Supply Operation Selectable Level Shifting/Translation Level Translation
3.3 V to 2.5 V
3.3 V to 1.8 V
2.5 V to 1.8 V Small Signal Bandwidth 770 MHz Tiny 6-Lead SC70 Package and 6-Lead SOT-66 Package

APPLICATIONS

3.3 V to 1.8 V Voltage Translation
3.3 V to 2.5 V Voltage Translation
2.5 V to 1.8 V Voltage Translation Bus Switching Bus Isolation Hot Swap Hot Plug Analog Switch Applications

GENERAL DESCRIPTION

The ADG3241 is a 2.5 V or 3.3 V, single digital switch. It is designed on a low voltage CMOS process, which provides low power dissipation yet gives high switching speed and very low on resistance. This allows the input to be connected to the output without additional propagation delay or generating additional ground bounce noise.
The switch is enabled by means of the bus enable (BE) input signal. This digital switch allows a bidirectional signal to be switched when ON. In the OFF condition, signal levels up to the supplies are blocked.
This device is ideal for applications requiring level translation. When operated from a 3.3 V supply, level translation from 3.3 V inputs to 2.5 V outputs is allowed. Similarly, if the device is operated from a 2.5 V supply and 2.5 V inputs are applied, the device will translate the outputs to 1.8 V. In addition to this, a level translating select pin (SEL) is included. When SEL is low, V
is reduced internally, allowing for level translation between
CC
3.3 V inputs and 1.8 V outputs. This makes the device suited to applications requiring level translation between different supplies, such as converter to DSP/microcontroller interfacing.

FUNCTIONAL BLOCK DIAGRAM

A B
BE

PRODUCT HIGHLIGHTS

1. 3.3 V or 2.5 V supply operation.
2. Extremely low propagation delay through switch.
3. 4.5 Ω switches connect inputs to outputs.
4. Level/voltage translation.
5. Tiny SC70 package and SOT-66 package.
REV. A
Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners.
ADG3241–SPECIFICATIONS
(VCC = 2.3 V to 3.6 V, GND = 0 V, all specifications T
1
otherwise noted.)
MIN
to T
, unless
MAX
B Version
Parameter Symbol Conditions Min Typ2Max Unit
DC ELECTRICAL CHARACTERISTICS
Input High Voltage V
Input Low Voltage V
Input Leakage Current I OFF State Leakage Current I
INH
V
INH
INL
V
INL
I
OZ
ON State Leakage Current 0 ≤ A, B ≤ V Maximum Pass Voltage V
P
VCC = 2.7 V to 3.6 V 2.0 V VCC = 2.3 V to 2.7 V 1.7 V VCC = 2.7 V to 3.6 V 0.8 V VCC = 2.3 V to 2.7 V 0.7 V
± 0.01 ± 1 µA
0 ≤ A, B ≤ V
CC
CC
± 0.01 ± 1 µA ± 0.01 ±1 µA
VA/VB = VCC = SEL = 3.3 V, IO = –5 µA 2.2 2.5 2.7 V
= VCC = SEL = 2.5 V, IO = –5 µA 1.5 1.8 2.1 V
V
A/VB
VA/VB = VCC = 3.3 V, SEL = 0 V, IO = –5 µA 1.5 1.8 2.1 V
CAPACITANCE
3
A Port Off Capacitance CA OFF f = 1 MHz 3.5 pF B Port Off Capacitance C A, B Port On Capacitance C Control Input Capacitance C
SWITCHING CHARACTERISTICS
Propagation Delay A to B or B to A, t Bus Enable Time BE to A or B Bus Disable Time BE to A or B Bus Enable Time BE to A or B Bus Disable Time BE to A or B Bus Enable Time BE to A or B Bus Disable Time BE to A or B
3
PD
5
5
5
5
5
5
Maximum Data Rate V Channel Jitter V
OFF f = 1 MHz 3.5 pF
B
, CB ON f = 1 MHz 7 pF
A
IN
4
t
, t
PHL
t
, t
PZH
t
, t
PHZ
t
, t
PZH
t
, t
PHZ
t
, t
PZH
t
, t
PHZ
f = 1 MHz 4 pF
CL = 50 pF, VCC = SEL = 3 V 0.225 ns
PLH
VCC = 3.0 V to 3.6 V; SEL = V
PZL
VCC = 3.0 V to 3.6 V; SEL = V
PLZ
VCC = 3.0 V to 3.6 V; SEL = 0 V 1 3 4 ns
PZL
VCC = 3.0 V to 3.6 V; SEL = 0 V 1 2.5 3.8 ns
PLZ
VCC = 2.3 V to 2.7 V; SEL = V
PZL
VCC = 2.3 V to 2.7 V; SEL = V
PLZ
= SEL = 3.3 V; VA/VB = 2 V 1.5 Gbps
CC
= SEL = 3.3 V; VA/VB = 2 V 45 ps p-p
CC
CC
CC
CC
CC
1 3.2 4.6 ns 13 4 ns
13 4 ns 1 2.5 3.4 ns
DIGITAL SWITCH
On Resistance R
ON
VCC = 3 V, SEL = VCC, VA = 0 V, IBA = 8 mA 4.5 8 Ω V
= 3 V, SEL = VCC, VA = 1.7 V, IBA = 8 mA 12 28 Ω
CC
= 2.3 V, SEL = VCC, VA = 0 V, IBA = 8 mA 5 9 Ω
V
CC
= 2.3 V, SEL = VCC, VA = 1 V, IBA = 8 mA 9 18 Ω
V
CC
V
= 3 V, SEL = 0 V, VA = 0 V, IBA = 8 mA 5 8 Ω
CC
VCC = 3 V, SEL = 0 V, VA = 1 V, IBA = 8 mA 12 Ω
POWER REQUIREMENTS
V
CC
Quiescent Power Supply Current I
Increase in ICC per Input
NOTES
1
Temperature range is as follows: B Version: –40°C to +85°C.
2
Typical values are at 25°C, unless otherwise stated.
3
Guaranteed by design, not subject to production test.
4
The digital switch contributes no propagation delay other than the RC delay of the typical RON of the switch and the load capacitance when driven by an ideal voltage source. Since the time constant is much smaller than the rise/fall times of typical driving signals, it adds very little propagation delay to the system. Propagation delay of the digital switch when used in a system is determined by the driving circuit on the driving side of the switch and its interaction with the load on the driven side.
5
See Timing Measurement Information section.
6
This current applies to the control pin BE only. The A and B ports contribute no significant ac or dc currents as they transition.
Specifications subject to change without notice.
6
⌬I
CC
CC
Digital Inputs = 0 V or VCC; SEL = V Digital Inputs = 0 V or V VCC = 3.6 V, BE = 3.0 V; SEL = V
; SEL = 0 V 0.1 0.2 mA
CC
CC
CC
2.3 3.6 V
0.01 1 µA
0.15 8 µA
REV. A–2–
ADG3241

ABSOLUTE MAXIMUM RATINGS*

(TA = 25°C, unless otherwise noted.)
VCC to GND . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to +4.6 V
Digital Inputs to GND . . . . . . . . . . . . . . . . . –0.5 V to +4.6 V
DC Input Voltage . . . . . . . . . . . . . . . . . . . . . –0.5 V to +4.6 V
DC Output Current . . . . . . . . . . . . . . . . . 25 mA per Channel
Operating Temperature Range
Industrial (B Version) . . . . . . . . . . . . . . . . . –40°C to +85°C
Storage Temperature Range . . . . . . . . . . . . –65°C to +150°C
Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . 150°C
SC70 Package
Thermal Impedance . . . . . . . . . . . . . . . . . . . . . . 332°C/W
␪
JA
SOT-66 Package
Thermal Impedance . . . . . . . . . 191°C/W (4-Layer Board)
␪
JA
Lead Temperature, Soldering (10 sec) . . . . . . . . . . . . . 300°C
IR Reflow, Peak Temperature (<20 sec) . . . . . . . . . . . . 235°C
*Stresses above those listed under Absolute Maximum Ratings may cause perma-
nent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those listed in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Only one absolute maximum rating may be applied at any one time.
Table I. Truth Table
BE SEL* Function
LL A = B, 3.3 V to 1.8 V Level Shifting LH
A = B, 3.3 V to 2.5 V/2.5 V to 1.8 V Level Shifting
HX Disconnect
*SEL = 0 V only when VDD = 3.3 V ± 10%.
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the ADG3241 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality.
REV. A
–3–
ADG3241

PIN CONFIGURATION

6-Lead SC70
BE
GND
1
2
3
A
ADG3241
TOP VIEW
(Not to Scale)
6
SEL
5
V
CC
4
B
Pin No. SC70 SOT-66 Mnemonic Description
16 BE Bus Enable (Active Low) 24 GND Ground Reference
Table II. Pin Function Descriptions
33 A Port A, Input or Output
6-Lead SOT-66
1
V
CC
ADG3241
2
SEL
TOP VIEW
3
A
(Not to Scale)
6
BE
5
B
4
GND
45 B Port B, Input or Output 51 V
CC
62 SEL
Positive Power Supply Voltage Level Translation Select

ORDERING GUIDE

Temperature Package
Model Range Description Package Branding
ADG3241BKS-REEL –40°C to +85°CThin Shrink Small Outline Transistor Package (SC70) KS-6 SKA ADG3241BKS-REEL7 –40°C to +85°CThin Shrink Small Outline Transistor Package (SC70) KS-6 SKA ADG3241BKS-500RL7 –40°C to +85°CThin Shrink Small Outline Transistor Package (SC70) KS-6 SKA ADG3241BRY-REEL7 –40°C to +85°CSmall Outline Transistor Package (SOT-66) RY-6-1 00

TERMINOLOGY

V
CC
Positive Power Supply Voltage. GND Ground (0 V) Reference. V
INH
V
INL
I
I
I
OZ
I
OL
V
P
Minimum Input Voltage for Logic 1.
Maximum Input Voltage for Logic 0.
Input Leakage Current at the Control Inputs.
OFF State Leakage Current. It is the maximum leakage current at the switch pin in the OFF state.
ON State Leakage Current. It is the maximum leakage current at the switch pin in the ON state.
Maximum Pass Voltage. The maximum pass voltage relates to the clamped output voltage of an NMOS device when
the switch input voltage is equal to the supply voltage. R
ON
Ohmic Resistance Offered by a Switch in the ON State. It is measured at a given voltage by forcing a specified
amount of current through the switch. C
OFF OFF Switch Capacitance.
X
C
ON ON Switch Capacitance.
X
C
IN
I
CC
Control Input Capacitance. This consists of BE and SEL.
Quiescent Power Supply Current. This current represents the leakage current between the VCC and ground pins.
It is measured when all control inputs are at a logic high or low level and the switches are OFF. ⌬I t
t
PLH
PZH
CC
, t
, t
PHL
PZL
Extra power supply current component for the BE control input when the input is not driven at the supplies.
Data Propagation Delay through the Switch in the ON State. Propagation delay is related to the RC time constant
R
× CL, where CL is the load capacitance.
ON
Bus Enable Times. These are the times taken to cross the VT voltage at the switch output when the switch turns on
in response to the control signal, BE. t
PHZ
, t
PLZ
Bus Disable Times. This is the time taken to place the switch in the high impedance OFF state in response to the control
signal. It is measured as the time taken for the output voltage to change by V
from the original quiescent level,
⌬
with reference to the logic level transition at the control input. (Refer to Figure 3 for enable and disable times.) Max Data Rate Maximum Rate at which Data Can Be Passed through the Switch. Channel Jitter Peak-to-Peak Value of the Sum of the Deterministic and Random Jitter of the Switch Channel.
REV. A–4–
Loading...
+ 8 hidden pages
Buy Points How it Works FAQ Contact Us Questions and Suggestions Privacy Policy Cookie Policy Terms of Use