0.2 Ω on resistance flatness
±3.3 V to ±8 V dual supply operation
3.3 V to 16 V single supply operation
No V
supply required
L
3 V logic-compatible inputs
Rail-to-rail operation
Continuous current per channel
LFCSP package: 385 mA
TSSOP package: 238 mA
16-lead TSSOP and 16-lead, 4 mm × 4 mm LFCSP
APPLICATIONS
Communication systems
Medical systems
Audio signal routing
Video signal routing
Automatic test equipment
Data acquisition systems
Battery-powered systems
Sample-and-hold systems
Relay replacements
+5 V, and +3.3 V Dual SPDT Switches
ADG1636
FUNCTIONAL BLOCK DIAGRAMS
S1A
S1B
IN1
IN2
S2A
S2B
NOTES
1. SWITCHES SHOWN FOR A LOGIC 1 INPUT.
S1A
D1
S1B
NOTES
1. SWITCHES SHOWN FOR A 1 INPUT LOGIC.
ADG1636
Figure 1. 16-Lead TSSOP
ADG1636
LOGIC
IN1 IN2
EN
Figure 2. 16-Lead LFCSP
D1
D2
S2A
D2
S2B
07983-001
07983-002
GENERAL DESCRIPTION
The ADG1636 is a monolithic CMOS device containing two
independently selectable single-pole/double-throw (SPDT)
switches. An EN input is used to enable or disable the device.
When disabled, all channels are switched off. Each switch
conducts equally well in both directions when on and has
an input signal range that extends to the supplies. In the off
condition, signal levels up to the supplies are blocked. Both
switches exhibit break-before-make switching action for use
in multiplexer applications.
The ultralow on resistance of these switches make them ideal
solutions for data acquisition and gain switching applications where
low on resistance and distortion is critical. The on resistance profile
is very flat over the full analog input range, ensuring excellent
linearity and low distortion when switching audio signals.
The CMOS construction ensures ultralow power dissipation,
making the parts ideally suited for portable and batterypowered instruments.
Rev. A
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
VDD = +5 V ± 10%, VSS = −5 V ± 10%, GND = 0 V, unless otherwise noted.
Table 1.
−40°C to
Parameter 25°C
+85°C
ANALOG SWITCH
Analog Signal Range VDD to VSS V
On Resistance (RON) 1 Ω typ VS = ±4.5 V, IS = −10 mA; see Figure 23
1.2 1.4 1.6 Ω max VDD = ±4.5 V, VSS = ±4.5 V
On Resistance Match Between Channels (∆RON) 0.04 Ω typ VS = ±4.5 V, IS = −10 mA
0.08 0.09 0.1 Ω max
On Resistance Flatness (R
) 0.2 Ω typ VS = ±4.5 V, IS = −10 mA
FLAT(ON)
0.25 0.29 0.34 Ω max
LEAKAGE CURRENTS VDD = +5.5 V, VSS = −5.5 V
Source Off Leakage, IS (Off) ±0.1 nA typ
±0.25 ±1 ±4 nA max
Drain Off Leakage, ID (Off) ±0.1 nA typ
±0.25 ±2 ±10 nA max
Channel On Leakage, ID, IS (On) ±0.3 nA typ VS = VD = ±4.5 V; see Figure 25
±0.6 ±2 ±12 nA max
DIGITAL INPUTS
Input High Voltage, V
Input Low Voltage, V
Input Current, I
INL
2.0 V min
INH
0.8 V max
INL
or I
0.005 μA typ VIN = V
INH
±0.1 μA max
Digital Input Capacitance, CIN 5 pF typ
DYNAMIC CHARACTERISTICS1
Transition Time, t
130 ns typ RL = 300 Ω, CL = 35 pF
TRANSITION
209 245 273 ns max VS = 2.5 V; see Figure 30
tON (EN) 119 ns typ RL = 300 Ω, CL = 35 pF
148 166 176 ns max VS = 2.5 V; see Figure 30
t
(EN) 182 ns typ RL = 300 Ω, CL = 35 pF
OFF
228 259 281 ns max VS = 2.5 V; see Figure 30
Break-Before-Make Time Delay, tD 30 ns typ RL = 300 Ω, CL = 35 pF
17 ns min VS1 = VS2 = 2.5 V; see Figure 31
Charge Injection 130 pC typ VS = 0 V, RS = 0 Ω, CL = 1 nF; see Figure 32
Off Isolation 70 dB typ RL = 50 Ω, CL = 5 pF, f = 1 MHz; see Figure 26
Channel-to-Channel Crosstalk 90 dB typ RL = 50 Ω, CL = 5 pF, f = 1 MHz; see Figure 28
Total Harmonic Distortion + Noise (THD + N) 0.007 % typ
−3 dB Bandwidth 25 MHz typ RL = 50 Ω, CL = 5 pF; see Figure 27
CS (Off) 68 pF typ VS = 0 V, f = 1 MHz
CD (Off) 127 pF typ VS = 0 V, f = 1 MHz
CD, CS (On) 220 pF typ VS = 0 V, f = 1 MHz
POWER REQUIREMENTS VDD = +5.5 V, VSS = −5.5 V
IDD 0.001 μA typ Digital inputs = 0 V or VDD
1.0 μA max
VDD/VSS ±3.3/±8 V min/max
1
Guaranteed by design, not subject to production test.
Analog Signal Range 0 V to VDD V
On Resistance (RON) 0.95 Ω typ VS = 0 V to 10 V, IS = −10 mA; see Figure 23
1.1 1.25 1.45 Ω max VDD = 10.8 V, VSS = 0 V
On Resistance Match Between Channels (∆RON) 0.03 Ω typ VS = 10 V, IS = −10 mA
0.06 0.07 0.08 Ω max
On Resistance Flatness (R
) 0.2 Ω typ VS = 0 V to 10 V, IS = −10 mA
FLAT(ON)
0.23 0.27 0.32 Ω max
LEAKAGE CURRENTS VDD = 13.2 V, VSS = 0 V
Source Off Leakage, IS (Off) ±0.1 nA typ VS = 1 V/10 V, VS = 10 V/1 V; see Figure 24
±0.25 ±1 ±4 nA max
Drain Off Leakage, ID (Off) ±0.1 nA typ VS = 1 V/10 V, VS = 10 V/1 V; see Figure 24
±0.25 ±2 ±10 nA max
Channel On Leakage, ID, IS (On) ±0.3 nA typ VS = VD = 1 V or 10 V; see Figure 25
±0.6 ±2 ±12 nA max
DIGITAL INPUTS
Input High Voltage, V
Input Low Voltage, V
Input Current, I
INL
2.0 V min
INH
0.8 V max
INL
or I
0.001 μA typ VIN = V
INH
±0.1 μA max
Digital Input Capacitance, CIN 5 pF typ
DYNAMIC CHARACTERISTICS1
Transition Time, t
100 ns typ RL = 300 Ω, CL = 35 pF
TRANSITION
153 183 206 ns max VS = 8 V; see Figure 30
tON (EN) 80 ns typ RL = 300 Ω, CL = 35 pF
95 103 110 ns max VS = 8 V; see Figure 30
t
(EN) 133 ns typ RL = 300 Ω, CL = 35 pF
OFF
161 187 210 ns max VS = 8 V; see Figure 30
Break-Before-Make Time Delay, tD 25 ns typ RL = 300 Ω, CL = 35 pF
17 ns min VS1 = VS2 = 8 V; see Figure 31
Charge Injection 150 pC typ VS = 6 V, RS = 0 Ω, CL = 1 nF; see Figure 32
Off Isolation 70 dB typ RL = 50 Ω, CL = 5 pF, f = 1 MHz; see Figure 26
Channel-to-Channel Crosstalk 90 dB typ RL = 50 Ω, CL = 5 pF, f = 1 MHz; see Figure 28
Total Harmonic Distortion + Noise (THD + N) 0.013 % typ
−3 dB Bandwidth 27 MHz typ RL = 50 Ω, CL = 5 pF; see Figure 27
CS (Off) 65 pF typ VS = 6 V, f = 1 MHz
CD (Off) 120 pF typ VS = 6 V, f = 1 MHz
CD, CS (On) 216 pF typ VS = 6 V, f = 1 MHz
POWER REQUIREMENTS VDD = 12 V
IDD 0.001 μA typ Digital inputs = 0 V or VDD
1 μA max
IDD 230 μA typ Digital inputs = 5 V
360 μA max
VDD 3.3/16 V min/max
1
Guaranteed by design, not subject to production test.
Analog Signal Range 0 V to VDD V
On Resistance (RON) 1.7 Ω typ VS = 0 V to 4.5 V, IS = −10 mA; see Figure 23
2.15 2.4 2.7 Ω max VDD = 4.5 V, VSS = 0 V
On Resistance Match Between Channels (∆RON) 0.05 Ω typ VS = 0 V to 4.5 V, IS = −10 mA
0.09 0.12 0.15 Ω max
On Resistance Flatness (R
) 0.4 Ω typ VS = 0 V to 4.5 V, IS = −10 mA
FLAT(ON)
0.53 0.55 0.6 Ω max
LEAKAGE CURRENTS VDD = 5.5 V, VSS = 0 V
Source Off Leakage, IS (Off) ±0.05 nA typ VS = 1 V/4.5 V, VD = 4.5 V/1 V; see Figure 24
±0.25 ±1 ±4 nA max
Drain Off Leakage, ID (Off) ±0.05 nA typ VS = 1 V/4.5 V, VD = 4.5 V/1 V; see Figure 24
±0.25 ±2 ±10 nA max
Channel On Leakage, ID, IS (On) ±0.1 nA typ VS = VD = 1 V or 4.5 V; see Figure 25
±0.6 ±2 ±12 nA max
DIGITAL INPUTS
Input High Voltage, V
Input Low Voltage, V
Input Current, I
INL
2.0 V min
INH
0.8 V max
INL
or I
0.001 μA typ VIN = V
INH
±0.1 μA max
Digital Input Capacitance, CIN 5 pF typ
DYNAMIC CHARACTERISTICS1
Transition Time, t
160 ns typ RL = 300 Ω, CL = 35 pF
TRANSITION
271 319 355 ns max VS = 2.5 V; see Figure 30
tON (EN) 132 ns typ RL = 300 Ω, CL = 35 pF
172 185 201 ns max VS = 2.5 V; see Figure 30
t
(EN) 210 ns typ RL = 300 Ω, CL = 35 pF
OFF
268 313 345 ns max VS = 2.5 V; see Figure 30
Break-Before-Make Time Delay, tD 30 ns typ RL = 300 Ω, CL = 35 pF
17 ns min VS1 = VS2 = 2.5 V; see Figure 31
Charge Injection 70 pC typ VS = 2.5 V, RS = 0 Ω, CL = 1 nF; see Figure 32
Off Isolation 70 dB typ
Channel-to-Channel Crosstalk 90 dB typ
Total Harmonic Distortion + Noise (THD + N) 0.09 % typ
−3 dB Bandwidth 26 MHz typ RL = 50 Ω, CL = 5 pF; see Figure 27
CS (Off) 76 pF typ VS = 2.5 V, f = 1 MHz
CD (Off) 145 pF typ VS = 2.5 V, f = 1 MHz
CD, CS (On) 237 pF typ VS = 2.5 V, f = 1 MHz
POWER REQUIREMENTS VDD = 5.5 V
IDD 0.001 μA typ Digital inputs = 0 V or VDD
1.0 1.0 μA max
VDD 3.3/16 V min/max
1
Guaranteed by design, not subject to production test.
−40°C to
125°C Unit Test Conditions/Comments
or VDD
GND
= 50 Ω, CL = 5 pF, f = 100 kHz;
R
L
see Figure 26
= 50 Ω, CL = 5 pF, f = 100 kHz;
R
L
see Figure 28
= 110 Ω, f = 20 Hz to 20 kHz, VS = 3.5 V p-p;
R
L
see Figure 29
Rev. A | Page 5 of 16
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