0.5 Ω on resistance flatness
Fully specified at ±15 V/+12 V/±5 V
3 V logic-compatible inputs
Up to 115 mA continuous current per channel
Rail-to-rail operation
Break-before-make switching action
16-/20-lead TSSOP and 4 mm × 4 mm LFCSP_VQ packages
APPLICATIONS
Relay replacement
Audio and video routing
Automatic test equipment
Data acquisition systems
Temperature measurement systems
Avio nics
Battery-powered systems
Communication systems
Medical equipment
±15 V/+12 V/±5 V iCMOS Switches
ADG1433/ADG1434
FUNCTIONAL BLOCK DIAGRAMS
D1
D2
D1
IN1
ADG1433
LOGIC
IN1 IN2 IN3 EN
ADG1434
S3B
D3
S3A
S4A
D4
S4B
IN4
06181-001
S1A
S1B
S2B
S2A
SWITCHES SHOWN FOR
A 1 INPUT LO GIC.
Figure 1. ADG1433 TSSOP and LFCSP_VQ
S1
S1B
GENERAL DESCRIPTION
The ADG1433 and ADG1434 are monolithic industrial CMOS
(iCMOS®) analog switches comprising three independently
selectable single-pole, double-throw (SPDT) switches and
four independently selectable SPDT switches, respectively.
All channels exhibit break-before-make switching action that
prevents momentary shorting when switching channels. An
input on the ADG1433 (LFCSP and TSSOP packages) and
ADG1434 (LFCSP package only) is used to enable or disable
the device. When disabled, all channels are switched off.
The iCMOS modular manufacturing process combines high
voltage, complementary metal-oxide semiconductor (CMOS),
and bipolar technologies. It enables the development of a wide
range of high performance analog ICs capable of 33 V operation
in a footprint that no other generation of high voltage parts has
been able to achieve. Unlike analog ICs using a conventional
CMOS process, iCMOS components can tolerate high supply
voltages while providing increased performance, dramatically
lower power consumption, and reduced package size.
The ultralow on resistance and on resistance flatness of these
switches make them ideal solutions for data acquisition and gain
switching applications, where low distortion is critical. iCMOS
construction ensures ultralow power dissipation, making the parts
ideally suited for portable and battery-powered instruments.
EN
IN2
S2B
D2
S2
SWITCHES S HOWN FOR
1 INPUT LOGIC.
Figure 2. ADG1434 TSSOP
S1A
S1B
S2B
S2A
SWITCHES SHOWN F OR
A 1 INPUT LO GIC.
ADG1434
D1
D2
LOGIC
IN1
IN2 IN3 IN4 EN
Figure 3. ADG1434 LFCSP_VQ
IN3
S3B
D3
S3A
S4A
D4
S4B
S3B
D3
S3A
06181-002
06181-101
Rev. A
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
±15 V Dual Supply ....................................................................... 3
12 V Single Supply ........................................................................ 5
±5 V Dual Supply ......................................................................... 6
REVISION HISTORY
6/08—Rev. 0 to Rev. A
Added Continuous Current per Channel Parameter (Table 1) .. 4
Added Continuous Current per Channel Parameter (Table 2) .. 5
Added Continuous Current per Channel Parameter (Table 3) .. 6
Changes to Table 4 ............................................................................ 7
Changes to Figure 30 ...................................................................... 13
VDD = +15 V ± 10%, VSS = –15 V ± 10%, GND = 0 V, unless otherwise noted.
Table 1.
−40°C to
Parameter +25°C
ANALOG SWITCH
Analog Signal Range VSS to VDD V
On-Resistance, RON 4 Ω typ VS = ±10 V, IS = −10 mA; see Figure 25
4.7 5.7 6.7 Ω max VDD = +13.5 V, VSS = −13.5 V
On-Resistance Match Between 0.5 Ω typ VS = ±10 V, IS = −10 mA
Channels, ΔRON 0.78 0.85 1.1 Ω max
On Resistance Flatness, R
0.72 0.77 0.92 Ω max
LEAKAGE CURRENTS VDD = +16.5 V, VSS = −16.5 V
Source Off Leakage, IS (Off) ±0.04 nA typ VD = ±10 V, VS = ±10 V; see Figure 26
±0.3 ±0.6 ±3 nA max
Drain Off Leakage, ID (Off) ±0.04 nA typ VD = ±10 V, VS = ±10 V; see Figure 26
±0.3 ±0.6 ±3 nA max
Channel On Leakage, ID, IS (On) ±0.05 nA typ VS = VD = ±10 V; see Figure 27
±0.4 ±0.8 ±8 nA max
DIGITAL INPUTS
Input High Voltage, VIH 2.0 V min
Input Low Voltage, VIL 0.8 V max
Input Current, IIL or IIH ±0.005 μA typ VIN = V
±0.1 μA max
Digital Input Capacitance, CIN 3 pF typ
DYNAMIC CHARACTERISTICS2
Transition Time, t
170 200 230 ns max VS = 10 V, see Figure 28
Break-Before-Make Time Delay, tD 40 ns typ RL = 100 Ω, CL = 35 pF
30 ns min VS1 = VS2 = 10 V, see Figure 29
tON (EN)
170 200 230 ns max VS = 10 V, see Figure 30
t
(EN)
OFF
75 85 90 ns max VS = 10 V, see Figure 30
Charge Injection −50 pC typ VS = 0 V, RS = 0 Ω, CL = 1 nF, see Figure 31
Off Isolation −70 dB typ RL = 50 Ω, CL = 5 pF, f = 1 MHz, see Figure 32
Channel-to-Channel Crosstalk −70 dB typ RL = 50 Ω, CL = 5 pF, f = 1 MHz, see Figure 34
Total Harmonic Distortion, THD + N 0.025 % typ
−3 dB Bandwidth
Insertion Loss 0.24 dB typ RL = 50 Ω, CL = 5 pF, f = 1 MHz, see Figure 33
CS (Off) 12 pF typ f = 1 MHz
CD (Off) 22 pF typ f = 1 MHz
CD, CS (On) 72 pF typ f = 1 MHz
140 ns typ RL = 100 Ω, CL = 35 pF
TRANS
0.5 Ω typ VS = ±10 V, IS = −10 mA
FLAT(ON)
140 ns typ R
60 ns typ R
200 MHz typ RL = 50 Ω, CL = 5 pF, see Figure 33
+85°C
−40°C to
+125°C1 Unit Test Conditions/Comments
or VDD
GND
= 100 Ω, CL = 35 pF
L
= 100 Ω, CL = 35 pF
L
= 110 Ω, 15 V p-p, f = 20 Hz to 20 kHz, see
R
L
Figure 35
Rev. A | Page 3 of 20
ADG1433/ADG1434
www.BDTIC.com/ADI
−40°C to
Parameter +25°C
POWER REQUIREMENTS
IDD 0.001 μA typ Digital inputs = 0 V or VDD
1 μA max
IDD 260 μA typ Digital inputs = 5 V
440 μA max
ISS 0.001 μA typ Digital inputs = 0 V, 5 V, or VDD
1 μA max
VDD/VSS ±4.5/±16.5 V min/max GND = 0 V
Continuous Current per Channel
ADG1433 115 75 40 mA max
ADG1434 100 65 40 mA max
1
Temperature range for Y version: −40°C to +125°C.
2
Guaranteed by design, not subject to production test.
6 Ω typ
8 9.5 11.2 Ω max VDD = 10.8 V, VSS = 0 V
On-Resistance Match Between 0.55 Ω typ VS = 0 V to 10 V, IS = −10 mA
Channels, ΔRON 0.82 0.85 1.1 Ω max
On Resistance Flatness, R
1.5 Ω typ VS = 0 V to 10 V, IS = −10 mA
FLAT(ON)
2.5 2.5 2.8 Ω max
LEAKAGE CURRENTS VDD = 13.2 V
Source Off Leakage, IS (Off) ±0.04 nA typ
±0.3 ±0.6 ±3 nA max
Drain Off Leakage, ID (Off) ±0.04 nA typ
±0.3 ±0.6 ±3 nA max
Channel On Leakage, ID, IS (On) ±0.06 nA typ
±0.4 ±0.8 ±8 nA max
DIGITAL INPUTS
Input High Voltage, VIH 2.0 V min
Input Low Voltage, VIL 0.8 V max
Input Current, IIL or IIH ±0.005 μA typ VIN = V
±0.1 μA max
Digital Input Capacitance, CIN 4 pF typ
DYNAMIC CHARACTERISTICS2
Transition Time, t
200 ns typ RL = 100 Ω, CL = 35 pF
TRANS
255 310 350 ns max
Break-Before-Make Time Delay, tD 80 ns typ RL = 100 Ω, CL = 35 pF
55 ns min
tON (EN)
210 ns typ
270 320 360 ns max
t
OFF
(EN)
70 ns typ
86 95 105 ns max
Charge Injection
−10 pC typ
Off Isolation –70 dB typ
Channel-to-Channel Crosstalk –70 dB typ
−3 dB Bandwidth
135
Insertion Loss 0.5 dB typ
CS (Off) 25 pF typ f = 1 MHz
CD (Off) 45 pF typ f = 1 MHz
CD, CS (On) 80 pF typ f = 1 MHz
POWER REQUIREMENTS VDD = 13.2 V
IDD 0.002 μA typ Digital inputs = 0 V or VDD
1 μA max
IDD 260 μA typ Digital inputs = 5 V
440 μA max
VDD 5/16.5 V min/max VSS = 0 V, GND = 0 V
Continuous Current per Channel2
V
ADG1433 100 65 40 mA max
ADG1434 85 60 35 mA max
1
Temperature range for Y version: −40°C to +125°C.
2
Guaranteed by design, not subject to production test.
−40°C to
+125°C
1
Unit Test Conditions/Comments
V
= 0 V to 10 V, IS = −10 mA, see Figure 25
S
V
= 1 V/10 V, VD = 10 V/1 V, see Figure 26
S
V
= 1 V/10 V, VD = 10 V/1 V, see Figure 26
S
V
= VD = 1 V or 10 V, see Figure 27
S
or VDD
GND
V
= 8 V, see Figure 28
S
V
= VS2 = 8 V, see Figure 29
S1
= 100 Ω, CL = 35 pF
R
L
V
= 8 V, see Figure 30
S
= 100 Ω, CL = 35 pF
R
L
V
= 8 V, see Figure 30
S
V
= 6 V, RS = 0 Ω, CL = 1 nF, see Figure 31
S
R
= 50 Ω, CL = 5 pF, f = 1 MHz, see Figure 32
L
R
= 50 Ω, CL = 5 pF, f = 1 MHz, see Figure 34
L
R
MHz typ
= 50 Ω, CL = 5 pF, see Figure 33
L
R
= 50 Ω, CL = 5 pF, f = 1 MHz, see Figure 33
L
= +10.8 V, VSS = 0 V
DD
Rev. A | Page 5 of 20
ADG1433/ADG1434
www.BDTIC.com/ADI
±5 V DUAL SUPPLY
VDD = +5 V ± 10%, VSS = −5 V ± 10%, GND = 0 V, unless otherwise noted.
Table 3.
Parameter +25°C
+85°C
ANALOG SWITCH
Analog Signal Range VSS to VDD V
On Resistance (RON) 7 Ω typ
9 10.5 12 Ω max VDD = +4.5 V, VSS = −4.5 V
On-Resistance Match Between 0.55 Ω typ VS = ±4.5 V, IS = −10 mA
Channels (ΔRON) 0.78 0.91 1.1 Ω max
−40°C to
On-Resistance Flatness, R
1.5 Ω typ VS = ±4.5 V, IS = −10 mA
FLAT(ON)
2.5 2.5 3 Ω max
LEAKAGE CURRENTS VDD = +5.5 V, VSS = −5.5 V
Source Off Leakage, IS (Off) ±0.02 nA typ
±0.3 ±0.6 ±3 nA max
Drain Off Leakage, ID (Off) ±0.02 nA typ
±0.3 ±0.6 ±3 nA max
Channel On Leakage, ID, IS (On) ±0.04 nA typ
±0.4 ±0.8 ±8 nA max
DIGITAL INPUTS
Input High Voltage, VIH 2.0 V min
Input Low Voltage, VIL 0.8 V max
Input Current, IIL or IIH ±0.005 μA typ VIN = V
±0.1 μA max
Digital Input Capacitance, CIN 4 pF typ
DYNAMIC CHARACTERISTICS2
Transition Time, t
315 ns typ RL = 100 Ω, CL = 35 pF
TRANS
430 480 550 ns max
Break-Before-Make Time Delay, tD 90 ns typ RL = 100 Ω, CL = 35 pF
55 ns min
tON (EN)
325 ns typ R
425 490 545 ns max
t
(EN)
OFF
150 ns typ R
200 225 240 ns max
Charge Injection −10 pC typ
Off Isolation −70 dB typ
Channel-to-Channel Crosstalk −70 dB typ
Total Harmonic Distortion, THD + N 0.06 % typ
−3 dB Bandwidth
145 MHz typ
Insertion Loss 0.5 dB typ
CS (Off) 18 pF typ f = 1 MHz
CD (Off) 32 pF typ f = 1 MHz
CD, CS (On) 80 pF typ f = 1 MHz
POWER REQUIREMENTS
IDD 0.002 μA typ Digital inputs = 0 V, 5 V, or VDD
1 μA max
ISS 0.001 μA typ Digital inputs = 0 V, 5 V, or VDD
1 μA max
VDD/VSS ±4.5/±16.5 V min/max GND = 0 V
Continuous Current per Channel2
ADG1433 95 60 35 mA max
ADG1434 85 55 35 mA max
1
Temperature range for Y version: −40°C to +125°C.
2
Guaranteed by design, not subject to production test.
−40°C to
1
+125°C
Rev. A | Page 6 of 20
Unit Test Conditions/Comments
V
= ±4.5 V, IS = −10 mA, see Figure 25
S
V
= ±4.5 V, VS = ±4.5 V, see Figure 26
D
V
= ±4.5 V, VS = ±4.5 V, see Figure 26
D
V
= VD = ±4.5 V, see Figure 27
S
or VDD
GND
V
= 5 V, see Figure 28
S
V
= VS2 = 5 V, see Figure 29
S1
= 100 Ω, CL = 35 pF
L
V
= 5 V, see Figure 30
S
= 100 Ω, CL = 35 pF
L
V
= 5 V, see Figure 30
S
V
= 0 V, RS = 0 Ω, CL = 1 nF, see Figure 31
S
R
= 50 Ω, CL = 5 pF, f = 1 MHz, see Figure 32
L
R
= 50 Ω, CL = 5 pF, f = 1 MHz, see Figure 34
L
R
= 110 Ω, 5 V p-p, f = 20 Hz to 20 kHz, see Figure 35
L
R
= 50 Ω, CL = 5 pF, see Figure 33
L
R
= 50 Ω, CL = 5 pF, f = 1 MHz, see Figure 33
L
V
= +5.5 V, VSS = −5.5 V
DD
V
= +4.5 V, VSS = −4.5 V
DD
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