3.5 pF on capacitance
1 pC charge injection
33 V supply range
120 Ω on resistance
Fully specified at +12 V, ±15 V
supply required
No V
L
3 V logic-compatible inputs
Rail-to-rail operation
16-lead TSSOP and 12-lead LFCSP packages
Typical power consumption: <0.03 μW
APPLICATIONS
Automatic test equipment
Data acquisition systems
Battery-powered systems
Sample-and-hold systems
Audio/video signal routing
Communication systems
GENERAL DESCRIPTION
±15 V/12 V iCMOS™, Dual SPDT Switch
ADG1236
FUNCTIONAL BLOCK DIAGRAM
S1A
S1B
IN1
IN2
S2A
S2B
SWITCHES SHOWN FOR A LOGIC 1 INPUT
ADG1236
Figure 1.
D1
D2
04776-001
The ADG1236 is a monolithic CMOS device containing two
independently selectable SPDT switches. It is designed on an
iCMOS process. iCMOS (industrial CMOS) is a modular
manufacturing process combining high voltage complementary
metal-oxide semiconductor (CMOS) and bipolar technologies.
It enables the development of a wide range of high performance
analog ICs capable of 33 V operation in a footprint that no
previous generation of high voltage parts has been able to
achieve. Unlike analog ICs using conventional CMOS processes,
iCMOS components can tolerate high supply voltages while
providing increased performance, dramatically lower power
consumption, and reduced package size.
The ultralow capacitance and charge injection of the part make
it an ideal solution for data acquisition and sample-and-hold
applications, where low glitch and fast settling are required. Fast
switching speed coupled with high signal bandwidth makes the
part suitable for video signal switching. iCMOS construction
ensures ultralow power dissipation, making the part ideally
suited for portable and battery-powered instruments.
Each switch conducts equally well in both directions when on
and has an input signal range that extends to the supplies. In the
off condition, signal levels up to the supplies are blocked. Both
switches exhibit break-before-make switching action for use in
multiplexer applications.
PRODUCT HIGHLIGHTS
1. 1.3 pF off capacitance (±15 V supply).
2. 1 pC charge injection.
3. 3 V logic-compatible digital inputs: V
4. No V
logic power supply required.
L
5. Ultralow power dissipation: <0.03 μW.
6. 16-lead TSSOP and 12-lead 3 mm × 3 mm LFCSP packages.
= 2.0 V, VIL = 0.8 V.
IH
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Anal og Devices for its use, nor for any infringements of patents or ot her
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
VDD = 15 V ± 10%, VSS = −15 V ± 10%, GND = 0 V, unless otherwise noted.
Table 1.
Y Version1
−40°C to
Parameters 25°C
+85°C
ANALOG SWITCH
Analog Signal Range VDD to VSS V
On Resistance (RON) 120 Ω typ VS = ±10 V, IS = −1 mA; Figure 20
190 230 260 Ω max VDD = +13.5 V, VSS = −13.5 V
On Resistance Match Between
Channels (∆R
)
ON
3.5 Ω typ VS = ±10 V, IS = −1 mA
6 10 12 Ω max
On Resistance Flatness (R
) 20 Ω typ VS = −5 V, 0 V, +5 V; IS = −1 mA
FLAT(ON)
57 72 79 Ω max
LEAKAGE CURRENTS VDD = +16.5 V, VSS = −16.5 V
Source Off Leakage, IS (Off) ±0.02 nA typ
±0.1 ±0.6 ±1 nA max
Drain Off Leakage, ID (Off) ±0.02 nA typ
±0.1 ±0.6 ±1 nA max
Channel On Leakage, ID, IS (On) ±0.02 nA typ VS = VD = ±10 V; Figure 22
±0.2 ±0.6 ±1 nA max
DIGITAL INPUTS
Input High Voltage, V
Input Low Voltage, V
Input Current, I
INL
2.0 V min
INH
0.8 V max
INL
or I
0.005 μA typ VIN = V
INH
±0.1 μA max
Digital Input Capacitance, CIN 2 pF typ
DYNAMIC CHARACTERISTICS2
Transition Time, t
TRANS AOFF BON
125 ns typ RL = 300 Ω, CL = 35 pF
150 200 ns max VS = 10 V; Figure 23
Transition Time, t
TRANS BOFF AON
70 ns typ RL = 300 Ω, CL = 35 pF
90 115 ns max VS = 10 V; Figure 23
Break-Before-Make Time Delay, tD 25 ns typ RL = 300 Ω, CL = 35 pF
10 ns min VS1 = VS2 = 10 V; Figure 24
Charge Injection −1 pC typ VS = 0 V, RS = 0 Ω, CL = 1 nF; Figure 25
Off Isolation 80 dB typ RL = 50 Ω, CL = 5 pF, f = 1 MHz; Figure 26
Channel-to-Channel Crosstalk 85 dB typ RL = 50 Ω, CL = 5 pF, f = 1 MHz; Figure 27
Total Harmonic Distortion + Noise 0.15 % typ RL = 10 kΩ, 5 V rms, f = 20 Hz to 20 kHz
−3 dB Bandwidth 1000 MHz typ RL = 50 Ω, CL = 5 pF; Figure 28
CS (Off) 1.3 pF typ f = 1 MHz; VS = 0 V
1.6 pF max f = 1 MHz; VS = 0 V
CD, CS (On) 3.5 pF typ f = 1 MHz; VS = 0 V
4.3 pF max f = 1 MHz; VS = 0 V
−40°C to
+125°C
Unit Test Conditions/Comments1
VS = ±10 V, VS = ∓10 V; Figure 21
VS = ±10 V, VS = ∓10 V; Figure 21
or V
INH
INL
Rev. 0 | Page 3 of 16
ADG1236
Y Version1
−40°C to
Parameters 25°C
+85°C
POWER REQUIREMENTS VDD = +16.5 V, VSS = −16.5 V
IDD 0.001 μA typ Digital inputs = 0 V or VDD
1.0 μA max
IDD 170 μA typ Digital inputs = 5 V
230 μA max
ISS 0.001 μA typ Digital inputs = 0 V or VDD
1.0 μA max
ISS 0.001 μA typ Digital inputs = 5 V
1.0 μA max
1
Temperature range for Y version is −40°C to +125°C.
2
Guaranteed by design; not subject to production test.
Analog Signal Range 0 V to VDD V
On Resistance (RON) 300 Ω typVS = 0 V to 10 V, IS = −1 mA; Figure 20
On Resistance Match Between
Channels (∆R
)
ON
475 567 625 Ω maxV
4.5 Ω typV
16 26 27 Ω max
On Resistance Flatness (R
) 60 Ω typVS = 3 V, 6 V, 9 V, IS = −1 mA
FLAT(ON)
LEAKAGE CURRENTS
Source Off Leakage, IS (Off) ±0.02 nA typ VS = 1 V/10 V, VD = 10 V/1 V; Figure 21
±0.1 ±0.6 ±1 nA max
Drain Off Leakage, ID (Off) ±0.02 nA typ VS = 1 V/10 V, VD = 10 V/1 V; Figure 21
±0.1 ±0.6 ±1 nA max
Channel On Leakage, ID, IS (On) ±0.02 nA typ VS = VD = 1 V or 10 V, Figure 22
±0.2 ±0.6 ±1 nA max
DIGITAL INPUTS
Input High Voltage, V
Input Low Voltage, V
Input Current, I
INL
Digital Input Capacitance, CIN 3
DYNAMIC CHARACTERISTICS2
Transition Time, t
2.0 V min
INH
0.8 V max
INL
or I
0.001 μA typ VIN = V
INH
±0.1 μA max
TRANS BOFF AON
105 ns typ RL = 300 Ω, CL = 35 pF
140 175 ns max VS = 8 V; Figure 23
Transition Time, t
TRANS AOFF BON
155 ns typ RL = 300 Ω, CL = 35 pF
190 255 ns max VS = 8 V; Figure 23
Break-Before-Make Time Delay, tD 50
Charge Injection −0.8
Off Isolation 75
Channel-to-Channel Crosstalk 85
−3 dB Bandwidth 800
10 ns min V
CS (Off) 1.6 pF typ f = 1 MHz; VS = 6 V
1.9 pF max f = 1 MHz; VS = 6 V
CD, CS (On) 4 pF typ f = 1 MHz; VS = 6 V
4.9 pF max f = 1 MHz; VS = 6 V
POWER REQUIREMENTS
IDD 0.001 μA typ Digital inputs = 0 V or VDD
1.0 μA max
IDD 170 μA typ Digital inputs = 5 V
1
Temperature range for Y version is −40°C to +125°C.
2
Guaranteed by design; not subject to production test.
230 μA max
−40°C to
+125°C
Unit Test Conditions/Comments
= 10.8 V, VSS = 0 V
DD
= 0 V to 10 V, IS = −1 mA
S
VDD = 13.2 V
or V
INH
INL
pF typ
ns typ RL = 300 Ω, CL = 35 pF
= VS2 = 8 V; Figure 24
S1
pC typ VS = 6 V, RS = 0 Ω, CL = 1 nF; Figure 25
dB typ RL = 50 Ω, CL = 5 pF, f = 1 MHz; Figure 26;
dB typ RL = 50 Ω, CL = 5 pF, f = 1 MHz; Figure 27
MHz typ RL = 50 Ω, CL = 5 pF; Figure 28
VDD = 13.2 V
Rev. 0 | Page 5 of 16
ADG1236
ABSOLUTE MAXIMUM RATINGS
TA = 25°C, unless otherwise noted.
Table 3.
Parameter Rating
VDD to VSS 35 V
VDD to GND −0.3 V to +25 V
VSS to GND +0.3 V to −25 V
Analog Inputs1
Digital Inputs1
Peak Current, S or D
Continuous Current per
Channel, S or D
Operating Temperature Range
Automotive (Y Version) −40°C to +125°C
Storage Temperature Range −65°C to +150°C
Junction Temperature 150°C
16-Lead TSSOP, θJA Thermal
Impedance
12-Lead LFCSP, θJA Thermal
Impedance
Reflow Soldering Peak
Temperature, Pb Free
1
Over voltages at IN, S, or D are clamped by internal diodes. Current should
be limited to the maximum ratings given.
− 0.3 V to VDD + 0.3 V or
V
SS
30 mA, whichever occurs first
GND − 0.3 V to V
30 mA, whichever occurs first
100 mA (pulsed at 1 ms,
10% duty cycle max)
25 mA
112°C/W
80°C/W
260°C
+ 0.3 V or
DD
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
TRUTH TABLE FOR SWITCHES
Table 4.
IN Switch A Switch B
0 Off On
1 On Off
ESD CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on
the human body and test equipment and can discharge without detection. Although this product features
proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy
electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance
degradation or loss of functionality.
Rev. 0 | Page 6 of 16
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