0.5 pC charge injection
33 V supply range
120 Ω on resistance
Fully specified at ±15 V/+12 V
3 V logic-compatible inputs
Rail-to-rail operation
Break-before-make switching action
16-lead TSSOP, 20-lead TSSOP, and 4 mm × 4 mm LFCSP
Typical power consumption (<0.03 μW)
APPLICATIONS
Audio and video routing
Automatic test equipment
Data acquisition systems
Battery-powered systems
Sample-and-hold systems
Communication systems
±15 V/+12 V i CMOS™ Switches
ADG1233/ADG1234
FUNCTIONAL BLOCK DIAGRAMS
S1A
D1
S1B
S2B
D2
S2A
SWITCHES SHOWN FO R A LOGIC 1 INPUT
S1A
D1
S1B
ADG1233
LOGIC
IN2IN1IN3
Figure 1.
ADG1234
EN
S3B
D3
S3A
S4A
D4
S4B
05743-001
GENERAL DESCRIPTION
The ADG1233 and ADG1234 are monolithic iCMOS analog
switches comprising three independently selectable single-pole,
double throw SPDT switches and four independently selectable
SPDT switches, respectively.
All channels exhibit break-before-make switching action
preventing momentary shorting when switching channels.
EN
An
input on the ADG1233 and ADG1234 is used to
enable or disable the device. When disabled, all channels are
switched off.
The iCMOS (industrial-CMOS) modular manufacturing process
combines a high voltage complementary metal-oxide semiconductor (CMOS) and bipolar technologies. It enables the
development of a wide range of high performance analog ICs
capable of 33 V operation in a footprint that no other generation of
high voltage parts has been able to achieve. Unlike analog ICs
using conventional CMOS processes, iCMOS components can
tolerate high supply voltages while providing increased performance, dramatically lowered power consumption, and reduced
package size.
The ultralow capacitance and charge injection of these multiplexers
make them ideal solutions for data acquisition and sample-andhold applications, where low glitch and fast settling are required.
S2B
D2
S2A
LOGIC
IN2IN1IN3
SWITCHES SHOWN FO R A LOGIC 1 INPUT
IN4
Figure 2.
EN
S3B
D3
S3A
05743-038
Fast switching speed coupled with high signal bandwidth make the
parts suitable for video signal switching. iCMOS construction
ensures ultralow power dissipation, making the parts ideally
suited for portable and battery-powered instruments.
PRODUCT HIGHLIGHTS
1. 1.5 pF off capacitance (±15 V supply).
2. 0.5 pC charge injection.
3. 3 V logic-compatible digital input, V
4. 16-lead TSSOP, 20-lead TSSOP, and 4 mm × 4 mm LFCSP.
= 2.0 V, VIL = 0.8 V.
IH
Rev. B
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
VDD = +15 V ± 10%, VSS = −15 V ± 10%, GND = 0 V, unless otherwise noted.
Table 1.
Y Version
Parameter
ANALOG SWITCH
Analog Signal Range VSS to VDD V
On Resistance (RON) 120 Ω typ VS = ±10 V, IS = −1 mA; see Figure 24
190 230 260 Ω max VDD = +13.5 V, VSS = −13.5 V
On Resistance Match Between
Channels (∆R
)
ON
3.5 Ω typ V
6 10 12 Ω max
On Resistance Flatness (R
) 20 Ω typ VS = −5 V, 0 V, +5 V; IS = −1 mA
FLAT (ON)
60 72 79 Ω max
LEAKAGE CURRENTS VDD = +16.5 V, VSS = −16.5 V
Source Off Leakage IS (Off) ±0.02 nA typ VD = ±10 V, VS = −10 V; see Figure 25
±0.1 ±0.6 ±1 nA max
Drain Off Leakage ID (Off) ±0.02 nA typ
±0.1 ±0.6 ±1 nA max
Channel On Leakage ID, IS (On) ±0.02 nA typ VS = VD = ±10 V; see Figure 26
±0.2 ±0.6 ±1 nA max
DIGITAL INPUTS
Input High Voltage, V
Input Low Voltage, V
2.0 V min
INH
0.8 V max
INL
Input Current
I
or I
±0.005 μA typ VIN = V
INL
INH
±0.1 μA max
Digital Input Capacitance, CIN 3 pF typ
DYNAMIC CHARACTERISTICS
t
110 ns typ RL = 300 Ω, CL = 35 pF
TRANSITION
2
130 150 170 ns max VS = 10 V; see Figure 27
t
25 ns typ RL = 300 Ω, CL = 35 pF
BBM
10 ns min VS1 = VS2 = +10 V; see Figure 28
tON (EN) 120 ns typ RL = 300 Ω, CL = 35 pF
140 170 195 ns max VS = 10 V; see Figure 29
t
(EN) 40 ns typ RL = 300 Ω, CL = 35 pF
OFF
45 55 60 ns max VS = 10 V; see Figure 29
Charge Injection 0.5 pC typ
Off Isolation −80 dB typ
Channel-to-Channel Crosstalk −85 dB typ
Total Harmonic Distortion, THD + N 0.14 % typ
−3 dB Bandwidth 900 MHz typ RL = 50 Ω, CL = 5 pF; see Figure 32
CS (Off) 1.5 pF typ f = 1 MHz; VS = 0 V
1.7 pF max f = 1 MHz; VS = 0 V
CD (Off) 1.6 pF typ f = 1 MHz; VS = 0 V
1.8 pF max f = 1 MHz; VS = 0 V
CD, CS (On) 3.5 pF typ f = 1 MHz; VS = 0 V
4 pF max f = 1 MHz; VS = 0 V
1
Unit Test Conditions/Comments +25°C −40°C to +85°C −40°C to +125°C
= ±10 V, IS = −1 mA
S
V
= 1 V/10 V, VD = 10 V/1 V;
S
see Figure 25
V
= 0 V, RS = 0 Ω, CL = 1 nF;
S
see Figure 30
R
= 50 Ω, CL = 5 pF, f = 1 MHz; see
L
Figure 31
R
= 50 Ω, CL = 5 pF, f = 1 MHz;
L
see Figure 33
R
= 10 kΩ, 5 V rms, f = 20 Hz to
L
20 kHz; see Figure 34
INL
or V
INH
Rev. B | Page 3 of 16
ADG1233/ADG1234
Y Version
Parameter
1
Unit Test Conditions/Comments +25°C −40°C to +85°C −40°C to +125°C
POWER REQUIREMENTS VDD = +16.5 V, VSS = −16.5 V
IDD 0.002 μA typ Digital inputs = 0 V or VDD
1.0 μA max
IDD 260 μA typ Digital inputs = 5 V
475 μA max
ISS 0.002 μA typ Digital inputs = 0 V or VDD
1.0 μA max
ISS 0.002 μA typ Digital inputs = 5 V
1.0 μA max
VDD/VSS ±5/±16.5 V min/max GND = 0 V
1
Temperature range for the Y version: −40°C to +125°C.
2
Guaranteed by design, not subject to production test.