ANALOG DEVICES ADG1221, ADG1222, ADG123 Service Manual

Low Capacitance, Low Charge Injection,

FEATURES

<0.5 pC charge injection over full signal range
Off capacitance: 2 pF
Off leakage: 20 pA
Supply range: 33 V
On resistance: 120 Ω
Fully specified at ±15 V, +12 V
No V

supply required

L

3 V logic-compatible inputs
Rail-to-rail operation
10-lead MSOP package

APPLICATIONS

Automatic test equipment
Data acquisition systems
Battery-powered systems
Sample-and-hold systems
Audio signal routing
Video signal routing
Communication systems

±15 V/+12 V iCMOS

ADG1221/ADG1222/ADG1223

FUNCTIONAL BLOCK DIAGRAM

ADG1221

S1

D1

IN2

®

Dual SPST Switches

ADG1222

S1

IN1

D1

D2

IN2

S2

ADG1223

S1

D1

IN2

SWITCHES SHOW N FOR A LOGIC 0 INPUT

Figure 1.

IN1

D2

S2

IN1

D2

S2

06574-001

GENERAL DESCRIPTION

The ADG1221/ADG1222/ADG1223 are monolithic, complemen­tary metal-oxide semiconductor (CMOS) devices containing
four independently selectable switches designed on an iCMOS
(industrial CMOS) process. iCMOS is a modular manufacturing
process combining high voltage CMOS and bipolar technologies.
It enables the development of a wide range of high performance
analog ICs, capable of 33 V operation, in a footprint that no
previous generation of high voltage parts has been able to achieve.
Unlike analog ICs using conventional CMOS processes, iCMOS
components can tolerate high supply voltages while providing
increased performance, dramatically lower power consumption,
and reduced package size.

The ultralow capacitance and exceptionally low charge injection
of these switches make them ideal solutions for data acquisition
and sample-and-hold applications, where low glitch and fast
settling are required.
charge injection over the full signal range of the device.

The ADG1221/ADG1222/ADG1223 contain two independent
single-pole/single-throw (SPST) switches. The ADG1221 and
ADG1222 differ only in that the digital control logic is inverted.
The ADG1221 switches are turned on with Logic 1 on the appro­priate control input, and Logic 0 is required for the

Figure 2 shows that there is minimum

ADG1222. The ADG1223 has one switch with digital control
logic similar to that of the ADG1221; the logic is inverted on
the other switch. The ADG1223 exhibits break-before-make
switching action for use in multiplexer applications. Each
switch conducts equally well in both directions when on and
has an input signal range that extends to the supplies. In the off
condition, signal levels up to the supplies are blocked.

0.5
TA = 25ºC

0.4

0.3

0.2

0.1

0

–0.1

–0.2

CHARGE INJECTI ON (pC)

–0.3

–0.4

–0.5

–15 15

Figure 2. Charge Injection vs. Input Voltage

VDD = +15V

= –15V

V

SS

VDD = 12V
V

SS

VDD = +5V

= –5V

V

SS

–10 –5 0 5 10

INPUT VOLTAGE (V)

= 0V

06574-041

Rev. 0

Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Anal og Devices for its use, nor for any infringements of patents or ot her
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: [phone] www.analog.com
Fax: [phone] ©2007 Analog Devices, Inc. All rights reserved.

ADG1221/ADG1222/ADG1223

TABLE OF CONTENTS

Features.............................................................................................. 1

Applications....................................................................................... 1

Functional Block Diagram .............................................................. 1

General Description ......................................................................... 1

Revision History ............................................................................... 2

Specifications..................................................................................... 3

Dual Supply................................................................................... 3

Single Supply................................................................................. 4

Absolute Maximum Ratings............................................................ 6

Thermal Resistance ...................................................................... 6

ESD Caution.................................................................................. 6

REVISION HISTORY

2/07—Rev. 0: Initial Version

Pin Configuration and Function Descriptions..............................7

Terminology.......................................................................................8

Typical Performance Characteristics..............................................9

Test Circuits..................................................................................... 13

Outline Dimensions....................................................................... 15

Ordering Guide......................................................................... 15

Rev. 0 | Page 2 of 16

ADG1221/ADG1222/ADG1223

SPECIFICATIONS

DUAL SUPPLY

VDD = 15 V ± 10%, VSS = –15 V ± 10%, GND = 0 V, unless otherwise noted.

Table 1.

Temperature
Parameter 25°C –40°C to +85°C –40°C to +125°C Unit Test Conditions/Comments

ANALOG SWITCH

Analog Signal Range VDD to VSS V

On Resistance, RON

120 Ω typ
200 240 270 Ω max

On Resistance Match

Between Channels, ∆R

ON

V

2.5 Ω typ
6 10 12 Ω max

On Resistance Flatness, R

VS = –5 V/0 V/+5 V; IS = –1 mA

FLAT(ON)

20 Ω typ
64 76 83 Ω max
LEAKAGE CURRENTS VDD = +16.5 V, VSS = –16.5 V

Source Off Leakage, IS (Off) VS = ±10 V, VD = ±10 V (see Figure 24)
±0.002 nA typ
±0.1 ±0.6 ±1 nA max
Drain Off Leakage, ID (Off) VS = ±10 V, VD = ±10 V (see Figure 24)
±0.002 nA typ
±0.1 ±0.6 ±1 nA max

Channel On Leakage, ID, IS (On) VS = VD = ±10 V (see Figure 25)
±0.01 nA typ
±0.2 ±0.6 ±1 nA max
DIGITAL INPUTS

Input High Voltage, V

Input Low Voltage, V

Input Current, I

INL

2.0 V min

INH

0.8 V max

INL

or I

V

INH

0.005 μA typ
±0.1 μA max

Digital Input Capacitance, CIN 2.5 pF typ
DYNAMIC CHARACTERISTICS

1

tON

130 ns typ

170 210 240 ns max

t

OFF

85 ns typ

105 130 140 ns max

Break-Before-Make Time Delay

(ADG1223 Only), t

BBM

40 ns typ
10 ns min

Charge Injection, Q

0.1 pC typ VS = 0 V, RS = 0 Ω, CL = 1 nF (see Figure 28)

INJ

Off Isolation 75 dB typ

= +13.5 V, VSS = –13.5 V,

V

DD

V

= ±10 V, IS = –1 mA (see Figure 23)

S

= ±10 V, IS = –1 mA

S

= V

or V

IN

INL

= 300 Ω, CL = 35 pF, VS = 10 V

R

L

Figure 26)

(see

= 300 Ω, CL = 35 pF, VS = 10 V

R

L

Figure 26)

(see

= 300 Ω, CL = 35 pF, VS1 = VS2 = 10 V

R

L

(see

Figure 27)

= 50 Ω, CL = 1 pF, f = 1 MHz

R

L

Figure 29)

(see

INH

Rev. 0 | Page 3 of 16

ADG1221/ADG1222/ADG1223

Temperature
Parameter 25°C –40°C to +85°C –40°C to +125°C Unit Test Conditions/Comments

Channel-to-Channel

Crosstalk

Tot al H a r m onic

Distortion + Noise, THD + N
–3 dB Bandwidth 960 MHz typ RL = 50 Ω, CL = 1 pF (see Figure 31)
CS (Off) VS = 0 V, f = 1 MHz

1.7 pF typ

2.2 pF max
CD (Off) VS = 0 V, f = 1 MHz

1.7 pF typ

2.2 pF max
CD, CS (On) VS = 0 V, f = 1 MHz

3 pF typ
4 pF max

POWER REQUIREMENTS VDD = +16.5 V, VSS = –16.5 V

IDD

0.001 μA typ Digital inputs = 0 V or VDD

1.0 μA max Digital inputs = 0 V or VDD
140 μA typ Digital inputs = 5 V
170 μA max Digital inputs = 5 V
ISS Digital inputs = 0 V, 5 V, or VDD

0.001 μA typ

1.0 μA max
VDD/VSS ±5/±16.5 V min/max GND = 0 V

1

Guaranteed by design, not subject to production test.

90 dB typ

0.15 % typ R

RL = 50 Ω, CL = 1 pF, f = 1 MHz
(see

Figure 30)

= 10 kΩ, 5 V rms, f = 20 Hz to 20 kHz

L

SINGLE SUPPLY

VDD = 12 V ± 10%, VSS = 0 V, GND = 0 V, unless otherwise noted.

Table 2.

Temperature
Parameter 25°C –40°C to +85°C –40°C to +125°C Unit Test Conditions/Comments

ANALOG SWITCH

Analog Signal Range 0 V to VDD V

On Resistance, RON

300 Ω typ
475 567 625 Ω max

On Resistance Match

Between Channels, ∆R

ON

V

4.5 Ω typ
16 26 27 Ω max

On Resistance Flatness, R

60 Ω typ VS = 3 V/6 V/9 V, IS = –1 mA

FLAT(ON)

LEAKAGE CURRENTS VDD = 13.2 V, VSS = 0 V

Source Off Leakage, IS (Off)

±0.002 nA typ
±0.1 ±0.6 ±1 nA max
Drain Off Leakage, ID (Off)

±0.002 nA typ
±0.1 ±0.6 ±1 nA max

= 10.8 V, VSS = 0 V, VS = 0 V to 10 V,

V

DD

= –1 mA (see Figure 23)

I

S

= 0 V to 10 V, IS = –1 mA

S

= 1 V/10 V, VD = 10 V/1 V

V

S

Figure 24)

(see

= 1 V/10 V, VD = 10 V/1 V

V

S

Figure 24)

(see

Rev. 0 | Page 4 of 16

ADG1221/ADG1222/ADG1223

Temperature
Parameter 25°C –40°C to +85°C –40°C to +125°C Unit Test Conditions/Comments

Channel On Leakage, ID, IS (On) VS = VD = 1 V or 10 V (see Figure 25)
±0.01 nA typ
±0.2 ±0.6 ±1 nA max
DIGITAL INPUTS

Input High Voltage, V

Input Low Voltage, V

Input Current, I

INL

0.001 μA typ
±0.1 μA max

Digital Input Capacitance, CIN 3 pF typ
DYNAMIC CHARACTERISTICS

tON

120 ns typ

150 190 210 ns max

t

OFF

120 ns typ

150 190 225 ns max

Break-Before-Make Time Delay

(ADG1223 Only), t

70 ns typ
10 ns min

Charge Injection, Q

Off Isolation 75 dB typ

Channel-to-Channel Crosstalk 90 dB typ

−3 dB Bandwidth 550 MHz typ RL = 50 Ω, CL = 1 pF (see Figure 31)
CS (Off) VS = 6 V, f = 1 MHz

2.1 pF typ

2.6 pF max
CD (Off) VS = 6 V, f = 1 MHz

2.1 pF typ

2.6 pF max
CD, CS (On) VS = 6 V, f = 1 MHz

3.8 pF typ

4.6 pF max

POWER REQUIREMENTS VDD = 13.2 V

IDD 0.001 μA typ Digital inputs = 0 V or VDD

1.0 μA max Digital inputs = 0 V or VDD
140 μA typ Digital inputs = 5 V

170 μA max Digital inputs = 5 V

VDD 5/16.5 V min/max VSS = 0 V, GND = 0 V

1

Guaranteed by design, not subject to production test.

2.0 V min

INH

0.8 V max

INL

or I

V

INH

1

IN

R

L

(see

R

L

(see

BBM

0.2 pC typ

INJ

R

L

(see

V

S

(see
R

L

(see
R

L

(see

= V

or V

INH

INL

= 300 Ω, CL = 35 pF, VS = 8 V

Figure 26)

= 300 Ω, CL = 35 pF, VS = 8 V

Figure 26)

= 300 Ω, CL = 35 pF, VS1 = VS2 = 8 V

Figure 27)

= 6 V, RS = 0 Ω, CL = 1 nF

Figure 28)

= 50 Ω, CL =1 pF, f = 1 MHz

Figure 29)

= 50 Ω, CL = 1 pF, f = 1 MHz

Figure 30)

Rev. 0 | Page 5 of 16