ANALOG DEVICES ADG1206, ADG1207 Service Manual

S
查询ADG1206供应商
Low Capacitance, 16- and 8-Channel
FEATURES
<1 pC charge injection over full signal range
1.5 pF off capacitance 33 V supply range 120 Ω on resistance Fully specified at ±15 V/+12 V 3 V logic-compatible inputs Rail-to-rail operation Break-before-make switching action 28-lead TSSOP and 32-lead, 5 mm × 5 mm LFCSP_VQ
APPLICATIONS
Audio and video routing Automatic test equipment Data acquisition systems Battery-powered systems Sample-and-hold systems Communication systems
GENERAL DESCRIPTION
The ADG1206 and ADG1207 are monolithic iCMOS analog multiplexers comprising sixteen single channels and eight differential channels, respectively. The ADG1206 switches one of sixteen inputs to a common output, as determined by the 4­bit binary address lines A0, A1, A2, and A3. The ADG1207 switches one of eight differential inputs to a common differential output, as determined by the 3-bit binary address lines A0, A1, and A2. An EN input on both devices is used to enable or disable the device. When disabled, all channels are switched off. When on, each channel conducts equally well in both directions and has an input signal range that extends to the supplies.
The iCMOS (industrial CMOS) modular manufacturing process combines high voltage CMOS (complementary metal­oxide semiconductor) and bipolar technologies. It enables the development of a wide range of high performance analog ICs capable of 33 V operation in a footprint that no other generation of high voltage parts has been able to achieve. Unlike analog ICs using conventional CMOS processes, iCMOS components can tolerate high supply voltages while providing increased perfor­mance, dramatically lower power consumption, and reduced package size.
±15 V/+12 V iCMOS™ Multiplexers
ADG1206/ADG1207
FUNCTIONAL BLOCK DIAGRAMS
ADG1206
S1
16
1-OF-16
DECODER
A0 A1 A2 A3 EN
S1A
S8A
D
S1B
S8B
Figure 1.
The ultralow capacitance and exceptionally low charge injection of these multiplexers make them ideal solutions for data acquisition and sample-and-hold applications, where low glitch and fast settling are required.
Figure 2 shows that there is minimum charge injection over the entire signal range of the device. iCMOS construction also ensures ultralow power dissipation, making the parts ideally suited for portable and battery-powered instruments.
1.0 MUX (SOURCE TO DRAIN)
T
= 25°C
A
0.9
0.8
0.7
0.6
0.5
0.4
0.3
CHARGE INJECTI ON (pC)
0.2
0.1
0
Figure 2. Source-to-Drain Charge Injection vs. Source Voltage
–10 –5 0 5 10
–15 15
= +5V
V
DD
= –5V
V
SS
VS (V)
ADG1207
1-OF-8
DECODER
A0 A1 A2 EN
= +15V
V
DD
= –15V
V
SS
V V
DD SS
= +12V = 0V
DA
DB
06119-001
6119-002
Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Anal og Devices for its use, nor for any infringements of patents or ot her rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.461.3113 ©2006 Analog Devices, Inc. All rights reserved.
ADG1206/ADG1207
TABLE OF CONTENTS
Features.............................................................................................. 1
Absolute Maximum Ratings ............................................................7
Applications....................................................................................... 1
Functional Block Diagrams............................................................. 1
General Description ......................................................................... 1
Revision History ............................................................................... 2
Specifications..................................................................................... 3
Dual Supply................................................................................... 3
Single Supply................................................................................. 5
REVISION HISTORY
7/06—Revision 0: Initial Version
ESD Caution...................................................................................7
Pin Configurations and Function Descriptions............................8
Typical Performance Characteristics........................................... 12
Terminology.................................................................................... 16
Test Circuits..................................................................................... 17
Outline Dimensions....................................................................... 19
Ordering Guide .......................................................................... 19
Rev. 0 | Page 2 of 20
ADG1206/ADG1207
SPECIFICATIONS
DUAL SUPPLY
VDD = +15 V ± 10%, VSS = –15 V ± 10%, GND = 0 V, unless otherwise noted.
Table 1.
−40°C to
Parameter +25°C
+85°C
−40°C to +125°C
ANALOG SWITCH
Analog Signal Range VSS to VDD V On Resistance, RON 120 Ω typ VS = ±10 V, IS = −1 mA; see Figure 28 200 240 270 Ω max VDD = +13.5 V, VSS = −13.5 V On Resistance Match Between
Channels, ∆R
ON
3.5 Ω typ V
6 10 12 Ω max On Resistance Flatness, R
(On) 20 Ω typ VS = −5 V, 0 V, +5 V; IS = −1 mA
FLAT
64 76 83 Ω max LEAKAGE CURRENTS
Source Off Leakage, IS (Off) ±0.03 nA typ
±0.2 ±0.6 ±1 nA max Drain Off Leakage, ID (Off) ±0.05 nA typ VS = 1 V, 10 V; VD = 10 V, 1 V; see Figure 29
±0.2 ±0.6 ±2 nA max
Channel On Leakage, ID, IS (On) ±0.08 nA typ VS = VD = ±10 V; see Figure 30
±0.2 ±0.6 ±2 nA max
DIGITAL INPUTS
Input High Voltage, V Input Low Voltage, V Input Current, I
INL
2.0 V min
INH
0.8 V max
INL
or I
±0.005 μA typ VIN = V
INH
±0.1 μA max Digital Input Capacitance, CIN 2 pF typ
DYNAMIC CHARACTERISTICS2
Transition Time, t
80 ns typ RL = 300 Ω, CL = 35 pF
TRANSITION
130 165 185 ns max VS = 10 V; see Figure 31
tON (EN) 75 ns typ RL = 300 Ω, CL = 35 pF
95 105 115 ns max VS = 10 V; see Figure 33
t
(EN) 85 ns typ RL = 300 Ω, CL = 35 pF
OFF
100 125 140 ns max VS = 10 V; see Figure 33
Break-Before-Make Time Delay, t
20 ns typ RL = 300 Ω, CL = 35 pF
BBM
10 ns min VS1 = VS2 = 10 V; see Figure 32 Charge Injection 0.5 pC typ VS = 0 V, RS = 0 Ω, CL = 1 nF; see Figure 34 Off Isolation −85 dB typ RL = 50 Ω, CL = 5 pF, f = 1 MHz; see Figure 35 Channel-to-Channel Crosstalk −85 dB typ RL = 50 Ω, CL = 5 pF, f = 1 MHz; see Figure 37 Total Harmonic Distortion + Noise 0.15 % typ
−3 dB Bandwidth ADG1206 280 MHz typ RL = 50 Ω, CL = 5 pF; see Figure 36
−3 dB Bandwidth ADG1207 490 MHz typ RL = 50 Ω, CL = 5 pF; see Figure 36 CS (Off) 1.5 pF typ f = 1 MHz, VS = 0 V 2 pF max f = 1 MHz, VS = 0 V CD (Off) ADG1206 11 pF typ f = 1 MHz, VS = 0 V 12 pF max f = 1 MHz, VS = 0 V CD (Off) ADG1207 7 pF typ f = 1 MHz, VS = 0 V 9 pF max f = 1 MHz, VS = 0 V
1
Unit Test Conditions/Comments
= ±10 V, IS = −1 mA
S
VD = ±10 V, VS = 10 V; see Figure 29
or V
INH
INL
= 10 kΩ, 5 V rms, f = 20 Hz to 20 kHz;
R
L
see
Figure 38
Rev. 0 | Page 3 of 20
ADG1206/ADG1207
−40°C to
Parameter +25°C
+85°C
CD, CS (On) ADG1206 13 pF typ f = 1 MHz, VS = 0 V 15 pF max f = 1 MHz, VS = 0 V CD, CS (On) ADG1207 8 pF typ f = 1 MHz, VS = 0 V 10 pF max f = 1 MHz, VS = 0 V
POWER REQUIREMENTS VDD = +16.5 V, VSS = −16.5 V
IDD 0.002 μA typ Digital inputs = 0 V or VDD
1.0 μA max IDD 260 μA typ Digital inputs = 5 V 420 μA max ISS 0.002 μA typ Digital inputs = 0 V, 5 V, or VDD
1.0 μA max VDD/VSS ±5/±16.5 V min/max GND = 0V
1
Temperature range for Y version is 40°C to +125°C.
2
Guaranteed by design, not subject to production test.
−40°C to +125°C Unit Test Conditions/Comments
Rev. 0 | Page 4 of 20
ADG1206/ADG1207
SINGLE SUPPLY
VDD = 12 V ± 10%, VSS = 0 V, GND = 0 V, unless otherwise noted.1
Table 2.
−40°C to
Parameter +25°C
+85°C
ANALOG SWITCH
Analog Signal Range 0 to VDD V On Resistance, RON 300 Ω typ VS = 0 V to10 V, IS = −1 mA; see Figure 28 475 567 625 Ω max VDD = 10.8 V, VSS = 0 V On Resistance Match Between
Channels, ∆R
ON
5 Ω typ V
16 26 27 Ω max On Resistance Flatness, R
(On) 60 Ω typ VS = 3 V, 6 V, 9 V; IS = −1 mA
FLAT
LEAKAGE CURRENTS VDD = 13.2 V
Source Off Leakage, IS (Off) ±0.02 nA typ VS = 1 V/10 V, VD = 10 V/1 V; see Figure 29 ±0.2 ±0.6 ±1 nA max Drain Off Leakage, ID (Off) ±0.05 nA typ VS = 1 V/10 V, VD = 10 V/1 V; see Figure 29
±0.2 ±0.6 ±2 nA max
Channel On Leakage, ID, IS (On) ±0.08 nA typ VS = VD = 1 V or 10 V; see Figure 30
±0.2 ±0.6 ±2 nA max
DIGITAL INPUTS
Input High Voltage, V Input Low Voltage, V Input Current, I
INL
2.0 V min
INH
0.8 V max
INL
or I
±0.001 μA typ
INH
±0.1 μA max VIN = V
Digital Input Capacitance, CIN 3 pF typ
DYNAMIC CHARACTERISTICS
Transition Time, t
TRANSITION
2
100 ns typ RL = 300 Ω, CL = 35 pF
140 175 200 ns max VS = 8 V; see Figure 31
tON (EN) 80 ns typ RL = 300 Ω, CL = 35 pF 100 120 130 ns max VS = 8 V; see Figure 33 t
(EN) 90 ns typ RL = 300 Ω, CL = 35 pF
OFF
110 130 155 ns max VS = 8 V; see Figure 33
Break-Before-Make Time Delay, t
25 ns typ RL = 300 Ω, CL = 35 pF
BBM
15 ns min VS1 = VS2 = 8 V; see Figure 32 Charge Injection 0.2 pC typ VS = 6 V, RS = 0 Ω, CL = 1 nF; see Figure 34 Off Isolation −85 dB typ RL = 50 Ω, CL = 5 pF, f = 1 MHz; see Figure 35 Channel-to-Channel Crosstalk −85 dB typ RL = 50 Ω, CL = 5 pF, f = 1 MHz; see Figure 37
−3 dB Bandwidth ADG1206 185 MHz typ RL = 50 Ω, CL = 5 pF; see Figure 36
−3 dB Bandwidth ADG1207 300 MHz typ RL = 50 Ω, CL = 5 pF; see Figure 36 CS (Off) 1.5 pF typ f = 1 MHz, VS = 6 V 2 pF max f = 1 MHz, VS = 6 V CD (Off) ADG1206 13 pF typ f = 1 MHz, VS = 6 V 15 pF max f = 1 MHz, VS = 6 V CD (Off) ADG1207 9 pF typ f = 1 MHz, VS = 6 V 11 pF max f = 1 MHz, VS = 6 V CD, CS (On) ADG1206 15 pF typ f = 1 MHz, VS = 6 V 17 pF max f = 1 MHz, VS = 6 V CD, CS (On) ADG1207 10 pF typ f = 1 MHz, VS = 6 V 12 pF max f = 1 MHz, VS = 6 V
−40°C to +125°C
Unit Test Conditions/Comments
= 0 V to 10 V, IS = −1 mA
S
or V
INH
INL
Rev. 0 | Page 5 of 20
ADG1206/ADG1207
−40°C to
Parameter +25°C
+85°C
POWER REQUIREMENTS VDD = 13.2 V
IDD 0.002 μA typ Digital inputs = 0 V or VDD
1.0 μA max IDD 260 μA typ Digital inputs = 5
420 μA max
VDD 5/16.5 V min/max VSS = 0 V, GND = 0 V
1
Temperature range for Y version is −40°C to +125°C.
2
Guaranteed by design, not subject to production test.
−40°C to +125°C Unit Test Conditions/Comments
Rev. 0 | Page 6 of 20
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