ANALOG DEVICES ADG1204 Service Manual

Low Capacitance, Low Charge Injection,

±15 V/+12 V 4:1 iCMOS™ Multiplexer

FEATURES

1.5 pF off source capacitance <1 pC charge injection 33 V supply range 120 Ω on resistance Fully specified at ±15 V, +12 V

supply required

No V

3 V logic-compatible inputs Rail-to-rail operation 14-lead TSSOP and 12-lead LFCSP Typical power consumption: <0.03 μW

APPLICATIONS

Automatic test equipment Data acquisition systems Battery-powered systems Sample-and-hold systems Audio signal routing Video signal routing Communication systems

GENERAL DESCRIPTION

The ADG1204 is a complementary metal-oxide semiconductor (CMOS) analog multiplexer, comprising four single channels designed on an iCMOS (industrial CMOS) process. iCMOS is a modular manufacturing process that combines high voltage CMOS and bipolar technologies. It enables the development of a wide range of high performance analog ICs capable of 33 V operation in a footprint that no previous generation of high voltage parts has been able to achieve. Unlike analog ICs using conventional CMOS processes, iCMOS components can tolerate high supply voltages while providing increased performance, dramatically lower power consumption, and reduced package size.

The ultralow capacitance and charge injection of this multiplexer makes it an ideal solution for data acquisition and sample-andhold applications, where low glitch and fast settling are required. Fast switching speed coupled with high signal bandwidth make the part suitable for video signal switching. iCMOS construction ensures ultralow power dissipation, making the part ideally suited for portable and battery-powered instruments.

ADG1204

FUNCTIONAL BLOCK DIAGRAM

The ADG1204 switches one of four inputs to a common output, D, as determined by the 3-bit binary address lines, A0, A1, and EN. Logic 0 on the EN pin disables the device. Each switch conducts equally well in both directions when on and has an input signal range that extends to the supplies. In the off condition, signal levels up to the supplies are blocked. All switches exhibit break-before-make switching action.

PRODUCT HIGHLIGHTS

1. 1.5 pF off capacitance (±15 V supply).

2. <1 pC charge injection.

3. 3 V logic-compatible digital inputs: V

4. No V

5. Ultralow power dissipation: <0.03 μW.

6. 14-lead TSSOP and 12-lead 3 mm × 3 mm LFCSP packages.

logic power supply required.

ADG1204

1 OF 4

DECODER

Figure 1.

ENA1A0

04779-001

= 2.0 V, VIL = 0.8 V.

Rev. 0

Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners.

ADG1204

TABLE OF CONTENTS

Specifications..................................................................................... 3

Pin Configurations and Function Descriptions ............................7

Dual Supply ................................................................................... 3

Single Supply ................................................................................. 5

Absolute Maximum Ratings............................................................ 6

Truth Ta b l e .................................................................................... 6

ESD Caution.................................................................................. 6

REVISION HISTORY

7/05—Revision 0: Initial Version

Te r mi n ol o g y .......................................................................................8

Typical Perfor m a n c e Characte r istics ..............................................9

Test Cir c ui t s ..................................................................................... 12

Outline Dimensions ....................................................................... 14

Ordering Guide .......................................................................... 14

Rev. 0 | Page 2 of 16

ADG1204

SPECIFICATIONS

DUAL SUPPLY

VDD = 15 V ± 10%, VSS = −15 V ± 10%, GND = 0 V, unless otherwise noted.

Table 1.

Y Version

−40°C to

Parameter 25°C

+85°C

ANALOG SWITCH

Analog Signal Range VDD to VSS V On Resistance (RON) 120 Ω typ VS = ±10 V, IS = −1 mA; Figure 21

190 230 260 Ω max VDD = +13.5 V, VSS = −13.5 V

On Resistance Match Between

Channels (ΔR

)

3.5 Ω typ VS = ±10 V, IS = −1 mA

6 10 12 Ω max On Resistance Flatness (R

) 20 Ω typ VS = −5 V, 0 V, +5 V; IS = −1 mA

FLAT(ON)

57 72 79 Ω max LEAKAGE CURRENTS VDD = +16.5 V, VSS = −16.5 V

Source Off Leakage, IS (Off) ±0.02 nA typ

±0.1 ±0.6 ±1 nA max Drain Off Leakage, ID (Off) ±0.02 nA typ

±0.1 ±0.6 ±1 nA max

Channel On Leakage, ID, IS (On) ±0.02 nA typ VS = VD = ±10 V; Figure 23 ±0.2 ±0.6 ±1 nA max DIGITAL INPUTS

Input High Voltage, V

Input Low Voltage, V

Input Current, I

INL

2.0 V min

INH

0.8 V max

INL

or I

0.005 μA typ VIN = V ±0.1 μA max Digital Input Capacitance, C

DYNAMIC CHARACTERISTICS

Transition Time, t

120 ns typ RL = 300 Ω, CL = 35 pF

TRANS

2.5 pF typ

150 180 200 ns max VS = 10 V; Figure 24

tON (EN) 70 ns typ RL = 300 Ω, CL = 35 pF

85 100 110 ns max VS = 10 V; Figure 26

(EN) 90 ns typ RL = 300 Ω, CL = 35 pF

OFF

110 135 155 ns max VS = 10 V; Figure 26

Break-Before-Make Time Delay, tD 25 ns typ RL = 300 Ω, CL = 35 pF 10 ns min VS1 = VS2 = 10 V; Figure 25 Charge Injection −0.7 pC typ VS = 0 V, RS = 0 Ω, CL = 1 nF; Figure 27 Off Isolation 85 dB typ RL = 50 Ω, CL = 5 pF, f = 1 MHz; Figure 28 Channel-to-Channel Crosstalk 80 dB typ RL = 50 Ω, CL = 5 pF, f = 1 MHz; Figure 30 Total Harmonic Distortion + Noise 0.15 % typ

−3 dB Bandwidth 800 MHz typ RL = 50 Ω, CL = 5 pF; Figure 29 CS (Off) 1.2 pF typ f = 1 MHz, VS = 0 V

1.5 pF max f = 1 MHz, VS = 0 V CD (Off) 3.6 pF typ f = 1 MHz, VS = 0 V

4.2 pF max f = 1 MHz, VS = 0 V CD, CS (On) 5.5 pF typ f = 1 MHz, VS = 0 V

6.5 pF max f = 1 MHz, VS = 0 V

−40°C to +125°C

Unit Test Conditions/Comments

VS = ±10 V, VS = ∓10 V; Figure 22

or V

INH

INL

= 10 kΩ, 5 V rms, f = 20 Hz to 20 kHz;

Figure 31

Rev. 0 | Page 3 of 16

ADG1204

Y Version

−40°C to

Parameter 25°C

+85°C

−40°C to +125°C

Unit Test Conditions/Comments

POWER REQUIREMENTS VDD = +16.5 V, VSS = −16.5 V

IDD 0.001 μA typ Digital inputs = 0 V or VDD

1.0 μA max IDD 170 μA typ Digital inputs = 5 V 230 μA max ISS 0.001 μA typ Digital inputs = 0 V or VDD

1.0 μA max I

0.001 μA typ Digital inputs = 5 V

1.0 μA max

Y version temperature range is −40°C to +125°C.

Guaranteed by design, not subject to production test.

Rev. 0 | Page 4 of 16

ADG1204

SINGLE SUPPLY

VDD = 12 V ± 10%, VSS = 0 V, GND = 0 V, unless otherwise noted.

Table 2.

Y Version

−40°C to

Parameter 25°C

+85°C

ANALOG SWITCH

Analog Signal Range 0 V to V On Resistance (RON) 300 Ω typ VS = 0 V to 10 V, IS = −1 mA; Figure 21 475 567 625 Ω max VDD = 10.8 V, VSS = 0 V On Resistance Match Between

Channels (ΔR

)

5 Ω typ V

16 26 27 Ω max

On Resistance Flatness (R

) 60 Ω typ VS = 3 V, 6 V, 9 V; IS = −1 mA

FLAT(ON)

LEAKAGE CURRENTS VDD = 13.2 V

Source Off Leakage, IS (Off) ±0.02 nA typ VS = 1 V/10 V, VD = 10 V/1 V; Figure 22 ±0.1 ±0.6 ±1 nA max Drain Off Leakage, ID (Off) ±0.02 nA typ VS = 1 V/10 V, VD = 10 V/1 V; Figure 22 ±0.1 ±0.6 ±1 nA max Channel On Leakage, ID, IS (On) ±0.02 nA typ VS = VD = 1 V or 10 V; Figure 23

±0.2 ±0.6 ±1 nA max DIGITAL INPUTS

Input High Voltage, V Input Low Voltage, V Input Current, I

INL

2.0 V min

INH

0.8 V max

INL

or I

0.001 μA typ VIN = V

INH

±0.1 μA max

Digital Input Capacitance, C

DYNAMIC CHARACTERISTICS

Transition Time, t

150 ns typ RL = 300 Ω, CL = 35 pF

TRANS

2.5 pF typ

190 240 265 ns max VS = 8 V; Figure 24

tON (EN) 95 ns typ RL = 300 Ω, CL = 35 pF 120 150 170 ns max VS = 8 V; Figure 26 t

(EN) 100 ns typ RL = 300 Ω, CL = 35 pF

OFF

125 155 170 ns max VS = 8 V; Figure 26 Break-Before-Make Time Delay, tD 50 ns typ RL = 300 Ω, CL = 35 pF 10 ns min VS1 = VS2 = 8 V; Figure 25 Charge Injection −0.4 pC typ VS = 6 V, RS = 0 Ω, CL = 1 nF; Figure 27 Off Isolation 85 dB typ RL = 50 Ω, CL = 5 pF, f = 1 MHz; Figure 28 Channel-to-Channel Crosstalk 80 dB typ RL = 50 Ω, CL = 5 pF, f = 1 MHz; Figure 30

−3 dB Bandwidth 550 MHz typ RL = 50 Ω, CL = 5 pF; Figure 29 CS (Off) 1.2 pF typ f = 1 MHz; VS = 6 V

1.5 pF max f = 1 MHz; VS = 6 V CD (Off) 3.6 pF typ f = 1 MHz; VS = 6 V

4.2 pF max f = 1 MHz; VS = 6 V CD, CS (On) 5.5 pF typ f = 1 MHz; VS = 6 V

6.5 pF max f = 1 MHz; VS = 6 V

POWER REQUIREMENTS VDD = 13.2 V

IDD 0.001 μA typ Digital inputs = 0 V or VDD

1.0 μA max IDD 170 μA typ Digital inputs = 5 V

230 μA max

Y version temperature range is −40°C to +125°C.

Guaranteed by design, not subject to production test.

−40°C to +125°C

Unit Test Conditions/Comments

= 0 V to 10 V, IS = −1 mA

or V

INH

INL

Rev. 0 | Page 5 of 16

+ 11 hidden pages