ANALOG DEVICES ADF5002 Service Manual

4 GHz to 18 GHz

FEATURES

Divide-by-8 prescaler High frequency operation: 4 GHz to 18 GHz Integrated RF decoupling capacitors Low power consumption
Active mode: 30 mA
Power-down mode: 7 mA Low phase noise: −153 dBc/Hz Single dc supply: 3.3 V compatible with ADF4xxx PLLs Temperature range: −40°C to +105°C Small package: 3 mm × 3 mm LFCSP

APPLICATIONS

PLL frequency range extender Point-to-point radios VSAT radios Communications test equipment

GENERAL DESCRIPTION

The ADF5002 prescaler is a low noise, low power, fixed RF divider block that can be used to divide down frequencies as high as 18 GHz to a lower frequency suitable for input to a PLL IC, such as the ADF4156 or the ADF4106. The ADF5002 provides a divide-by-8 function. The ADF5002 operates from a 3.3 V supply and has differential 100 Ω RF outputs to allow direct interface to the differential RF inputs of PLLs such as the ADF4156 and ADF4106.
Divide-by-8 Prescaler
ADF5002

FUNCTIONAL BLOCK DIAGRAM

CE
BIAS
3pF
RFIN
50
GND
DIVIDE
BY 8
Figure 1.
ADF5002
100
1pF
100
1pF
VDDx
RFOUT
RFOUT
08753-001
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners.
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ADF5002

TABLE OF CONTENTS

Features .............................................................................................. 1
Applications ....................................................................................... 1
General Description ......................................................................... 1
Functional Block Diagram .............................................................. 1
Revision History ............................................................................... 2
Specifications ..................................................................................... 3
Absolute Maximum Ratings ............................................................ 4
ESD Caution .................................................................................. 4

REVISION HISTORY

6/10—Revision 0: Initial Version
Pin Configuration and Function Descriptions ..............................5
Typical Performance Characteristics ..............................................6
Evaluation Board PCB ......................................................................7
PCB Material Stack-Up ................................................................7
Bill of Materials ..............................................................................7
Application Circuit ............................................................................8
Outline Dimensions ..........................................................................9
Ordering Guide .............................................................................9
Rev. 0 | Page 2 of 12
ADF5002

SPECIFICATIONS

VDD1 = VDD2 = 3.3 V ± 10%, GND = 0 V; dBm referred to 50 Ω; TA = T range is −40°C to +105°C.
Table 1.
Parameter Min Typ Max Unit Test Conditions/Comments
RF CHARACTERISTICS
Input Frequency 4 18 GHz
RF Input Sensitivity −10 +10 dBm 4 GHz to 18 GHz
Output Power −10 −5 dBm Single-ended output connected into a 50 Ω load
−7 −2 dBm
Output Voltage Swing 200 330 mV p-p
400 660 mV p-p
1000 mV p-p
Phase Noise −153 dBc/Hz Input frequency (fIN) = 12 GHz, offset = 100 kHz
Reverse Leakage −60 dBm RF input power (PIN) = 0 dBm, RF
Second Harmonic Content −38 dBc
Third Harmonic Content −12 dBc
Fourth Harmonic Content −20 dBc
Fifth Harmonic Content −19 dBc
CE INPUT
Input High Voltage, VIH 2.2 V
Input Low Voltage, VIL 0.3 V
POWER SUPPLIES
Voltage Supply 3.0 3.3 3.6 V
IDD (I
+ I
DD1
)
DD2
Active 30 60 mA CE is high Power-Down 7 25 mA CE is low
MIN
to T
, unless otherwise noted. Operating temperature
MAX
Differential outputs connected into a 100 Ω differential load
Peak-to-peak voltage swing on each single-ended output, connected into a 50 Ω load
Peak-to-peak voltage swing on differential output, connected into a 100 Ω differential load
Peak-to-peak voltage swing on each single-ended output, no load condition
= 4 GHz
OUT
Rev. 0 | Page 3 of 12
ADF5002

ABSOLUTE MAXIMUM RATINGS

Table 2.
Parameter Rating
VDDx to GND −0.3 V to +3.9 V RFIN 10 dBm Operating Temperature Range
Industrial (B Version) −40°C to +105°C Storage Temperature Range −65°C to +150°C Maximum Junction Temperature 150°C LFCSP Thermal Impedance
Junction-to-Ambient (θJA) 90°C/W
Junction-to-Case (θJC) 30°C/W Peak Temperature 260°C Time at Peak Temperature 40 sec
Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
This device is a high performance RF integrated circuit with an ESD rating of 2 kV, human body model (HBM), and is ESD sensitive. Proper precautions should be taken for handling and assembly.

ESD CAUTION

Rev. 0 | Page 4 of 12
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