ANALOG DEVICES ADE7761A Service Manual

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V
Energy Metering IC with On-Chip Fault and
FEATURES
High accuracy, active energy measurement IC supports
IEC 62053-21 Less than 0.1% error over a dynamic range of 500 to 1 Supplies active power on the frequency outputs, F1 and F2 High frequency output CF is intended for calibration and
supplies instantaneous active power Continuous monitoring of the phase and neutral current
allows fault detection in 2-wire distribution systems Current channels input level best suited for shunt and
current transformer sensors Uses the larger of the two currents (phase or neutral) to
bill—even during a fault condition Continuous monitoring of the voltage and current inputs
allows missing neutral detection Uses one current input (phase or neutral) to bill when
missing neutral is detected Two logic outputs (FAULT and REVP) can be used to indicate
a potential miswiring, fault, or missing neutral condition Direct drive for electromechanical counters and 2-phase
stepper motors (F1 and F2) Proprietary ADCs and DSP provide high accuracy over large
variations in environmental conditions and time Reference 2.5 V ± 8% (drift 30 ppm/°C typical) with external
overdrive capability Single 5 V supply, low power
Missing Neutral Detection
ADE7761A
GENERAL DESCRIPTION
The ADE7761A is a high accuracy, fault-tolerant, electrical energy measurement IC intended for use with 2-wire distribution systems. The part specifications surpass the accuracy requirements as quoted in the IEC 62053-21 standard. The only analog circuitry used on the ADE7761A is in the ADCs and reference circuit. All other signal processing (such as multiplication and filtering) is carried out in the digital domain. This approach provides superior stability and accuracy over extremes in environmental conditions and over time. The ADE7761A incorporates a fault detection scheme similar to the ADE7751 by continuously monitoring both phase and neutral currents. A fault is indicated when the currents differ by more than 6.25%.
The ADE7761A incorporates a missing neutral detection scheme by continuously monitoring the input voltage. When a missing neutral condition is detected—no voltage input—the ADE7761A continues billing based on the active current signal (see the condition is indicated when the FAULT pin goes high. The ADE7761A supplies average active power information on the low frequency outputs, F1 and F2. The CF logic output gives instantaneous active power information.
The ADE7761A includes a power-supply monitoring circuit on the V that the voltage and current channels are matched. An internal no-load threshold ensures that the ADE7761A does not exhibit any creep when there is no load.
Missing Neutral Mode section). The missing neutral
supply pin. Internal phase matching circuitry ensures
DD
FUNCTIONAL BLOCK DIAGRAM
AGND FAULT
PGA
13
V
2
1A
4
V
1N
3
V
1B
7
MISCAL
6
V
2P
5
V
2N
2.5V
REFERENCE
Rev. 0
ADC
ADC
ADC
ADC
3kΩ
OSCILLATOR
9 14 17 10 11 12
IN/OUT
A>B
B>A A<>B
MISSING NEUT RAL
INTERNAL
HPF
GAIN ADJUST
15 18
ZERO CROSSING
DETECTI ON
MISSING NEUTRAL
DETECTI ON
DIGITAL-TO-FREQUENCY CONV ERTER
DD
POWER
SUPPLY MONITOR
ADE7761A
SIGNAL PROCESSING
BLOCK
LPF
16 18 19 20
F1F2CFREVPS0S1SCFDGNDRCLKINRE F
05040-0-001
Figure 1.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.461.3113 ©2006 Analog Devices, Inc. All rights reserved.
ADE7761A
TABLE OF CONTENTS
Features .............................................................................................. 1
Analog Inputs ............................................................................. 11
General Description......................................................................... 1
Functional Block Diagram .............................................................. 1
Revision History ............................................................................... 2
Specifications..................................................................................... 3
Timing Characteristics ................................................................ 4
Absolute Maximum Ratings............................................................ 5
Performance Issues That May Affect Billing Accuracy........... 5
ESD Caution.................................................................................. 5
Pin Configuration and Function Descriptions............................. 6
Te r mi n ol o g y ...................................................................................... 8
Typical Performance Characteristics............................................. 9
Test Circ uit ...................................................................................... 10
Operation.........................................................................................11
Power Supply Monitor ............................................................... 11
Internal Oscillator ...................................................................... 12
Analog-to-Digital Conversion.................................................. 13
Active Power Calculation .......................................................... 14
Digital-to-Frequency Conversion............................................ 16
Transfer Fu nction .......................................................................16
Fault Detection ........................................................................... 17
Missing Neutral Mode............................................................... 18
Applications..................................................................................... 21
Interfacing to a Microcontroller for Energy Measurement.. 21
Selecting a Frequency for an Energy Meter Application ......21
Negative Power Information..................................................... 22
Outline Dimensions .......................................................................23
Ordering Guide .......................................................................... 23
REVISION HISTORY
7/06—Revision 0: Initial Version
Rev. 0 | Page 2 of 24
ADE7761A
SPECIFICATIONS
VDD = 5 V ± 5%, AGND = DGND = 0 V, on-chip reference, on-chip oscillator, T
Table 1.
Parameter Value Unit Test Conditions/Comments
ACCURACY
Measurement Error
1
2
0.1 % of reading, typ Over a dynamic range of 500 to 1
Phase Error Between Channels
PF = 0.8 Capacitive ±0.05 Degrees, max Phase lead 37° PF = 0.5 Inductive ±0.05 Degrees, max Phase lag 60°
AC Power Supply Rejection
2
Output Frequency Variation 0.01 %, typ V1A = V1B = V2P = ±100 mV rms
DC Power Supply Rejection
2
Output Frequency Variation 0.01 %, typ V1A = V1B = V2P = ±100 mV rms
FAU LT D ETEC TION
2, 3
See the Fault Detection section
Fault Detection Threshold
Inactive Input <> Active Input 6.25 %, typ V1A or V1B active
Input Swap Threshold
Inactive Input <> Active Input 6.25 % of larger, typ V1A or V1B active
Accuracy Fault Mode Operation
V1A Active, V1B = AGND 0.1 % of reading, typ Over a dynamic range of 500 to 1
V1B Active, V1A = AGND 0.1 % of reading, typ Over a dynamic range of 500 to 1 Fault Detection Delay 3 Seconds, typ Swap Delay 3 Seconds, typ
MISSING NEUTRAL MODE
2, 4
See the Missing Neutral Detection section
Missing Neutral Detection Threshold
V2P − V
2N
59.4 mV peak, min
Accuracy Missing Neutral Mode
V1A Active, V1B = V2P = AGND 0.1 % of reading, typ Over a dynamic range of 500 to 1
V1B Active, V1A = V2P = AGND 0.1 % of reading, typ Over a dynamic range of 500 to 1 Missing Neutral Detection Delay 3 Seconds, typ
ANALOG INPUTS V1A − V1N, V1B − V1N, V2P − V
Maximum Signal Levels ±660 mV peak, max Differential input 660 mV peak, max Differential input MISCAL − V Input Impedance (DC) 400 kΩ, min Bandwidth (−3 dB) 7 kHz, typ ADC Offset Error
2
15 mV, typ Uncalibrated error, see the Terminology section for details Gain Error ±4 %, typ External 2.5 V reference Gain Error Match
2
±3 %, typ External 2.5 V reference
REFERENCE INPUT
REF
Input Voltage Range 2.7 V, max 2.5 V + 8%
IN/OUT
2.3 V, min 2.5 V − 8% Input Impedance 3 kΩ, min Input Capacitance 10 pF, max
ON-CHIP REFERENCE
Reference Error ±200 mV, max Temperature Coefficient 30 ppm/°C, typ Current Source 20 µA, min
ON-CHIP OSCILLATOR
Oscillator Frequency 450 kHz Oscillator Frequency Tolerance ±12 % of reading, typ Temperature Coefficient 30 ppm/°C, typ
MIN
to T
= −40°C to +85°C.
MAX
2N
2N
Rev. 0 | Page 3 of 24
ADE7761A
Parameter Value Unit Test Conditions/Comments
LOGIC INPUTS
PGA, SCF, S1, and S0
Input High Voltage, V Input Low Voltage, V Input Current, I Input Capacitance, C
LOGIC OUTPUTS
CF, REVP, and FAULT
Output High Voltage, V Output Low Voltage, V
F1 and F2
Output High Voltage, V Output Low Voltage, V
POWER SUPPLY For specified performance
V
DD
5.25 V, max 5 V + 5% V
DD
1
See plots in the Typical Performance Characteristics section.
2
See the Terminology section for explanation of specifications.
3
See the Fault Detection section for explanation of fault detection functionality.
4
See the Missing Neutral Detection section for explanation of missing neutral detection functionality.
5
Sample tested during initial release and after any redesign or process change that might affect this parameter.
TIMING CHARACTERISTICS
VDD = 5 V ± 5%, AGND = DGND = 0 V, on-chip reference, on-chip oscillator, T initial release and after any redesign or process change that might affect this parameter. See
Table 2.
Parameter Value Unit Test Conditions/Comments
1
t
1
t
2
t
3
1
t
4
t
5
t
6
1
The pulse widths of F1, F2, and CF are not fixed for higher output frequencies. See the Transfer Function section.
5
INH
INL
IN
IN
5
OH
OH
OH
OH
2.4 V, min VDD = 5 V ± 5%
0.8 V, max VDD = 5 V ± 5% ±3 µA, max Typical 10 nA, VIN = 0 V to V 10 pF, max
4 V, min VDD = 5 V ± 5% 1 V, max VDD = 5 V ± 5%
4 V, min VDD = 5 V ± 5%, I 1 V, max VDD = 5 V ± 5%, I
SOURCE
SINK
4.75 V, min 5 V − 5%
3 mA, max
MIN
to T
= −40°C to +85°C. Sample tested during
MAX
Figure 2.
120 ms F1 and F2 Pulse Width (Logic High). See Tab le 7 s Output Pulse Period. See the Transfer Function section. 1/2 t
2
s Time Between F1 Falling Edge and F2 Falling Edge. 90 ms CF Pulse Width (Logic High). See Tab le 8 s CF Pulse Period. See the Transfer Function section. CLKIN/4 s Minimum Time Between F1 and F2 Pulse.
t
1
DD
= 10 mA
= 10 mA
F1
t
6
t
2
t
F2
t
4
CF
3
t
5
05040-002
Figure 2. Timing Diagram for Frequency Outputs
Rev. 0 | Page 4 of 24
ADE7761A
ABSOLUTE MAXIMUM RATINGS
TA = 25°C, unless otherwise noted.
Table 3.
Parameter Rating
VDD to AGND −0.3 V to +7 V Analog Input Voltage to AGND
, V1B, V1N, V2N, V2P, MISCAL
V
1A
Reference Input Voltage to AGND −0.3 V to VDD + 0.3 V Digital Input Voltage to DGND −0.3 V to VDD + 0.3 V Digital Output Voltage to DGND −0.3 V to VDD + 0.3 V Operating Temperature Range
Industrial −40°C to +85°C Storage Temperature Range −65°C to +150°C Junction Temperature 150°C 20-Lead SSOP, Power Dissipation 450 mW θJA Thermal Impedance 112°C/W Lead Temperature, Soldering
Vapor Phase (60 sec) 215°C
Infrared (15 sec) 220°C
−6 V to +6 V
Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those listed in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
PERFORMANCE ISSUES THAT MAY AFFECT BILLING ACCURACY
The ADE7761A provides pulse outputs—CF, F1, and F2— intended to be used for the billing of active energy. Pulses are generated at these outputs in two different situations.
Case 1: When the analog input V conditions described in
Figure 34, CF, F1, and F2 frequencies are proportional to active power and can be used to bill active energy.
Case 2: When the analog input V the conditions described in measure active energy but a quantity proportional to kAh. This quantity is used to generate pulses on the same CF, F1, and F2. This situation is indicated when the FAULT pin is high.
Analog Devices, Inc. cautions users of the ADE7761A about the following:
Billing active energy in Case 1 is consistent with the
understanding of the quantity represented by pulses on CF, F1, and F2 outputs (watt-hour).
Billing active energy while the ADE7761A is in Case 2 must
be decided knowing that the entity measured by the ADE7761A in this case is ampere-hour and not watt-hour. Users should be aware of this limitation and decide if the ADE7761A is appropriate for their application.
– V2N complies with the
2P
– V2N does not comply with
2P
Figure 34, the ADE7761A does not
ESD CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although this product features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality.
Rev. 0 | Page 5 of 24
ADE7761A
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
1
V
DD
2
V
1A
3
V
1B
V
4
1N
V
5
ADE7761A
MISCAL
REF
V
AGND
IN/OUT
SCF
2N
2P
6
7
8
9
10
TOP VIEW
(Not to Scale)
Figure 3. Pin Configuration (SSOP)
Table 4. Pin Function Descriptions
Pin No. Mnemonic Description
1 V
DD
Power Supply. This pin provides the supply voltage for the digital circuitry in the ADE7761A. The supply voltage should be maintained at 5 V ± 5% for specified operation. This pin should be decoupled with a 10 µF capacitor in parallel with a ceramic 100 nF capacitor.
2, 3 V1A, V
1B
Analog Inputs for Channel 1 (Current Channel). These inputs are fully differential voltage inputs with maximum differential input signal levels of ±660 mV with respect to V at these pins is ±1 V with respect to AGND. Both inputs have internal ESD protection circuitry, and an overvoltage of ±6 V can also be sustained on these inputs without risk of permanent damage.
4 V
1N
Negative Input for Differential Voltage Inputs, V1A and V1B. The maximum signal level at this pin is ±1 V with respect to AGND. The input has internal ESD protection circuitry, and an overvoltage of ±6 V can also be sustained on this input without risk of permanent damage. The input should be directly connected to the burden resistor and held at a fixed potential, that is, AGND. See the
5 V
2N
Negative Input for Differential Voltage Inputs, V2P and MISCAL. The maximum signal level at this pin is ±1 V with respect to AGND. The input has internal ESD protection circuitry, and an overvoltage of ±6 V can also be sustained on this input without risk of permanent damage. The input should be held at a fixed potential, that is, AGND. See the
Analog Inputs section.
6 V
2P
Analog Input for Channel 2 (Voltage Channel). This input is a fully differential voltage input with maximum differential input signal levels of ±660 mV with respect to V this pin is ±1 V with respect to AGND. This input has internal ESD protection circuitry, and an overvoltage of ±6 V can also be sustained on this input without risk of permanent damage.
7 MISCAL
Analog Input for Missing Neutral Calibration. This pin can be used to calibrate the CF-F1-F2 frequencies in the missing neutral condition. This input is a fully differential voltage input with maximum differential input signal levels of 660 mV with respect to V
for specified operation. The maximum signal level at this pin is ±1 V with
2N
respect to AGND. This input has internal ESD protection circuitry, and an overvoltage of ±6 V can also be sustained on this input without risk of permanent damage.
8 AGND
This pin provides the ground reference for the analog circuitry in the ADE7761A, that is, ADCs and reference. This pin should be tied to the analog ground plane of the PCB. The analog ground plane is the ground reference for all analog circuitry, such as antialiasing filters, and current and voltage transducers. For good noise suppression, the analog ground plane should be connected only to the digital ground plane at the DGND pin.
9 REF
IN/OUT
This pin provides access to the on-chip voltage reference. The on-chip reference has a nominal value of
2.5 V ± 8% and a typical temperature coefficient of 30 ppm/°C. An external reference source can also be connected at this pin. In either case, this pin should be decoupled to AGND with a 1 F ceramic capacitor and 100 nF ceramic capacitor.
10 SCF
Select Calibration Frequency. This logic input is used to select the frequency on the calibration output CF. Table 7 shows how the calibration frequencies are selected.
11, 12 S1, S0
These logic inputs are used to select one of four possible frequencies for the digital-to-frequency conversion. This offers the designer greater flexibility when designing the energy meter. See the Energy Meter Application
section. 13 PGA This logic input is used to select the gain for the analog inputs, V1A and V1B. The possible gains are 1 and 16. 14 RCLKIN
To enable the internal oscillator as a clock source on the chip, a precise low temperature drift resistor at nominal value of 6.2 kΩ must be connected from this pin to DGND.
20
F1
19
F2
18
CF
17
DGND
16
REVP
15
FAU LT
14
RCLKIN
13
PGA
12
S0
11
S1
05040-003
for specified operation. The maximum signal level
1N
Analog Inputs section.
for specified operation. The maximum signal level at
2N
Selecting a Frequency for an
Rev. 0 | Page 6 of 24
ADE7761A
Pin No. Mnemonic Description
15 FAULT
16 REVP
17 DGND
18 CF
19, 20 F2, F1
This logic output goes active high when a fault or missing neutral condition occurs. A fault is defined as a condition under which the signals on V defined when the chip is powered up with no voltage at the input. The logic output is reset to zero when a fault or missing neutral condition is no longer detected. See the Fault Detection section and the Missing Neutral Mode section.
This logic output goes logic high when negative power is detected, that is, when the phase angle between the voltage and current signals is greater than 90°. This output is not latched and is reset when positive power is once again detected. The output goes high or low at the same time as a pulse is issued on CF.
This pin provides the ground reference for the digital circuitry in the ADE7761A, that is, multiplier, filters, and digital-to-frequency converters. This pin should be tied to the digital ground plane of the PCB. The digital ground plane is the ground reference for all digital circuitry, such as counters (mechanical and digital), MCUs, and indicator LEDs. For good noise suppression, the analog ground plane should be connected only to the digital ground plane at the DGND pin.
Calibration Frequency Logic Output. The CF logic output, active high, gives instantaneous active power information. This output is used for operational and calibration purposes. See the section.
Low Frequency Logic Outputs. F1 and F2 supply average active power information. The logic outputs can be used to directly drive electromechanical counters and 2-phase stepper motors.
and V1B differ by more than 6.25%. A missing neutral condition is
1A
Digital-to-Frequency Conversion
Rev. 0 | Page 7 of 24
ADE7761A
r
e
TERMINOLOGY
Measurement Error
The error associated with the energy measurement made by the ADE7761A is defined by
=
Percentag
⎛ ⎜ ⎜ ⎝
Phase Error Between Channels
The high-pass filter (HPF) in the current channel has a phase lead response. To offset this phase response and equalize the phase response among channels, a phase correction network is also placed in the current channel. The phase correction network ensures a phase match between the current channels and voltage channels to within ±0.1° over a range of 45 Hz to 65 Hz and ±0.2° over a range of 40 Hz to 1 kHz.
Power Supply Rejection (PSR)
PSR quantifies the ADE7761A measurement error as a percentage of reading when the power supplies are varied. For the ac PSR measurement, a reading at nominal supplies (5 V) is taken. A second reading is obtained with the same input signal levels when an ac (175 mV rms/100 Hz) signal is introduced onto the supplies. Any error introduced by this ac signal is expressed as a percentage of reading (see the Error
definition).
Erro
EnergyTrueADE7761AbyregisteredEnergy
EnergyTrue
Measurement
×
%100
⎟ ⎠
For the dc PSR measurement, a reading at nominal supplies (5 V) is taken. A second reading is obtained with the same input signal levels when the power supplies are varied ±5%. Any error introduced is again expressed as a percentage of reading.
ADC Offset Error
The dc offset associated with the analog inputs to the ADCs. With the analog inputs connected to AGND, the ADCs still see a dc analog input signal. The magnitude of the offset depends on the input gain and range selection (see the Characteristics the offset is removed from the current channels and the power calculation is not affected by this offset.
Gain Error
The gain error in the ADE7761A ADCs is defined as the difference between the measured output frequency (minus the offset) and the ideal output frequency. It is measured with a gain of 1 in Channel V percentage of the ideal frequency, which is obtained from the transfer function (see the
Gain Error Match
The gain error match is defined as the gain error (minus the offset) obtained when switching between a gain of 1 or 16. It is expressed as a percentage of the output ADC code obtained under a gain of 1.
section). However, when HPFs are switched on,
. The difference is expressed as a
1A
Transfer Functi on section).
Typical Performance
Rev. 0 | Page 8 of 24
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