ANALOG DEVICES ADE7752, ADE7752A Service Manual

Polyphase Energy Metering IC
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FEATURES

High accuracy, supports 50 Hz/60 Hz IEC62053-2x Less than 0.1% error over a dynamic range of 500 to 1 Compatible with 3-phase/3-wire delta and 3-phase/4-wire
Wye configurations
The ADE7752
outputs F1 and F2
High frequency output CF is intended for calibration and
supplies instantaneous real power
Logic output REVP indicates a potential miswiring or
nega
Direct drive for electromechanical counters and 2-phase
epper motors (F1 and F2)
st
Proprietary ADCs and DSP provide high accuracy over large
ariations in environmental conditions and time
v On-chip power supply monitoring On-chip creep protection (no load threshold) On-chip reference 2.4 V ±8% (20 ppm/°C typical) with
external overdrive capability Single 5 V supply, low power
60 mW t
30 mW typical: ADE7752A Low cost CMOS process

GENERAL DESCRIPTION

The ADE7752 is a high accuracy polyphase electrical energy measurement IC. The ADE7752A is a pin-to-pin compatible low power version of ADE7752. The functions of ADE7752 and
Rev. C
Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Anal og Devices for its use, nor for any infringements of patents or ot her rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners.
1
supplies average real power on frequency
tive power for each phase
ypical: ADE7752
5
IAP IAN
6
16
VAP
IBP
7 8
IBN
15
VBP
9
ICP
10
ICN
VCP
14 13
VN
Ω
2.4V REF
4k
11 12 4 18 21 22 23 24 1
AGND

FUNCTIONAL BLOCK DIAGRAM

ADC
ADC
ADC
ADC
ADC
ADC
REF
IN/OUT
Figure 1. 24-Lead Standard Small Outline Package [SOIC]
HPF
Φ
PHASE
CORRECTION
HPF
Φ
PHASE
CORRECTION
HPF
Φ
PHASE
CORRECTION
with Pulse Output
ADE7752/ADE7752A
ADE7752A are the same. Both products are referred to in the text of this data sheet as ADE7752.
The part specifications surpass the accuracy requirements as
uoted in the IEC62053-2x standard. The only analog circuitry
q used in the ADE7752 is in the analog-to-digital converters (ADCs) and reference circuit. All other signal processing (such as multi­plication, filtering, and summation) is carried out in the digital domain. This approach provides superior stability and accuracy over extremes in environmental conditions and over time.
The ADE7752 supplies average real power information on the lo
w frequency outputs, F1 and F2. These logic outputs may be used to directly drive an electromechanical counter or to interface with an MCU. The CF logic output gives instanta­neous real power information. This output is intended to be used for calibration purposes.
The ADE7752 includes a power supply monitoring circuit on
pin. The ADE7752 remains inactive until the supply
the V
DD
voltage on V pulses are issued on F1, F2, and CF. Internal phase matching circuitry ensures that the voltage and current channels are phase matched. An internal no load threshold ensures the part does not exhibit any creep when there is no load. The ADE7752 is available in a 24-lead SOIC package.
1
Patent pending.
LPF
LPF
LPF
DIGITAL-TO-FREQUENCY CONVERTER
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.461.3113 © 2005 Analog Devices, Inc. All rights reserved.
reaches 4 V. If the supply falls below 4 V, no
DD
POWER SUPPLY
MONITOR
ADE7752/ ADE7752A
Σ
V
DD
3
2
DGND
19
CLKIN
CLKOUT
20
CFS1 F1F2S0SCFREVP
02676-A-001
ABS
17
X
X
X
ADE7752/ADE7752A
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TABLE OF CONTENTS
Specifications..................................................................................... 3
Voltage Channels Connection .................................................. 15
Timing Characteristics..................................................................... 4
Absolute Maximum Ratings............................................................ 5
ESD Caution.................................................................................. 5
Pin Configuration and Function Descriptions............................. 6
Typical Performance Characteristics ............................................. 8
Test C irc uit ...................................................................................... 10
Te r mi n ol o g y .................................................................................... 11
Theory of Operation ...................................................................... 12
Power Factor Considerations.................................................... 12
Nonsinusoidal Voltage and Current ........................................ 13
Analog Inputs.................................................................................. 14
Current Channels ....................................................................... 14
Voltage Channels ........................................................................14
Typical Con ne c tion Diagrams ...................................................... 15
Current Channel Connection ...................................................15
Meter Connections..................................................................... 15
Power Supply Monitor ................................................................... 17
HPF and Offset Effects .............................................................. 17
Digital-to-Frequency Conversion ................................................ 18
Mode Selection of the Sum of the Three Active Energies..... 19
Power Measurement Considerations....................................... 19
Transfer F u n c tion ........................................................................... 20
Frequency Outputs F1 and F2 .................................................. 20
Frequency Output CF ................................................................ 21
Selecting a Frequency for an Energy Meter Application........... 22
Frequency Outputs..................................................................... 22
No Load Threshold .................................................................... 22
Negative Power Information..................................................... 23
Outline Dimensions ....................................................................... 24
Ordering Guide .......................................................................... 24
REVISION HISTORY
7/05—Rev. B to Rev. C
Added ADE7752A.............................................................. Universal
Changed NEGP Pin Name to REVP................................ Universal
Changes to Table 1.............................................................................3
Changes to Table 6, Table 7 ............................................................21
Changes to Table 8, Table 9, Table 10............................................22
Updated Outline Dimensions........................................................24
Changes to Ordering Guide...........................................................24
9/03—Rev. A to Rev. B
U
pdated Format.................................................................. Universal
Change to Figure 19 ........................................................................15
5/03—Rev. 0 to Rev. A
to F
anged F
Ch
Change to Figure 6 .......................................................................... 10
Changes to Frequency Outputs F1 and F2 section .....................13
Replaced Table II .............................................................................13
Changes to Examples 1, 2, and 3 ...................................................14
Replaced Table III............................................................................14
Replaced Tables IV, V, and VI ........................................................15
Changes to SELECTING A FREQUENCY FOR AN ENERGY
METER APPLICATION section...................................................15
Changes to NO LOAD THRESHOLD section............................16
Replaced Table VII ..........................................................................16
1–5
............................................................ Universal
1–7
Rev. C | Page 2 of 24
ADE7752/ADE7752A
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SPECIFICATIONS

VDD = 5 V ± 5%, AGND = DGND = 0 V, on-chip reference, CLKIN = 10 MHz, T
Table 1.
ADE7752 ADE7752A
Parameter
ACCURACY
1, 2
Measurement Error on Current
Min Typ Max Min Typ Max
0.1 0.1 % Reading
Channel
Phase Error Between Channels
PF = 0.8 Capacitive ±0.1 ±0.1 Degrees PF = 0.5 Inductive ±0.1 ±0.1 Degrees
AC Power Supply Rejection SCF = 0; S0 = S1 = 1
Output Frequency Variation
0.01 0.01 % Reading
(CF)
DC Power Supply Rejection S1 = 1; S0 = SCF = 0
Output Frequency Variation
0.1 0.1 % Reading
(CF)
ANALOG INPUTS See the Analog Inputs section.
Maximum Signal Levels ±0.5 ±0.5
Input Impedance (DC) 370 410 370 450 kΩ CLKIN = 10 MHz Bandwidth (–3 dB) 14 14 kHz CLKIN/256, CLKIN = 10 MHz ADC Offset Error
1, 2
±25 ±25 mV
Gain Error ±9 ±9 % Ideal
REFERENCE INPUT
REF
Input Voltage Range 2.6 2.6 V 2.4 V + 8%
IN/OUT
2.2 2.2 V 2.4 V – 8% Input Impedance 3.3 3.3 kΩ Input Capacitance 10 10 pF
ON-CHIP REFERENCE Nominal 2.4 V
Reference Error ±200 ±200 mV Temperature Coefficient 25 25 ppm/°C
CLKIN All specifications for CLKIN of 10 MHz
Input Clock Frequency 10 10 MHz
LOGIC INPUTS
3
ACF, S0, S1, and ABS
Input High Voltage, V Input Low Voltage, V Input Current, I Input Capacitance, C
LOGIC OUTPUTS
INH
INL
IN
IN
3
2.4 2.4 V VDD = 5 V ±5%
0.8 0.8 V VDD = 5 V ±5% ±3 ±3 A Typically 10 nA, VIN = 0 V to V 10 10 pF
F1 and F2
Output High Voltage, V Output Low Voltage, V
OH
OL
4.5 4.5 V I
0.5 0.5 V I
CF and REVP
Output High Voltage, V Output Low Voltage, V
OH
OL
4 4 V VDD = 5 V, I
0.5 0.5 V VDD = 5 V, I
POWER SUPPLY For specified performance
V
DD
I
DD
1
See the Terminology section for explanation of specifications.
2
See the plots in the Typical Performance Characteristics section.
3
Sample tested during initial release and after any redesign or process change that may affect this parameter.
4.75 5.25 4.75 5.25 V 5 V ±5% 12 16 6 9 mA
MIN
to T
= –40°C to +85°C, unless otherwise noted.
MAX
Unit Conditions
Voltage channel with full-scale signal (±500 mV), 25
°C, over a dynamic range
of 500 to 1
IA = IB = IC = 100 mV rms, VA = VB = VC = ripple on V
100 mV rms, @ 50 Hz,
of 175 mV rms @ 100 Hz
DD
IA = IB = IC = 100 mV rms,
100 mV rms,
CN
Vpeak differential
VA = VB = VC = V
= 5 V ±250 mV
DD
V
to VN, VBP to VN, VCP to VN, IAP to IAN,
AP
I
to IBN, ICP to I
BP
External 2.5 V reference, IA = IB = IC = 50
= 10 mA, V
SOURCE
= 10 mA, VDD = 5 V
SINK
SOURCE
= 5 mA
SINK
0 mV dc
= 5 V
DD
= 5 mA
DD
Rev. C | Page 3 of 24
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TIMING CHARACTERISTICS

VDD = 5 V ± 5%, AGND = DGND = 0 V, on-chip reference, CLKIN = 10 MHz, T
to T = –40°C to +85°C, unless otherwise noted .
MAX
MIN
Table 2.
Parameter Conditions Spec Unit
3
t F1 and F2 Pulse Width (Logic High). 275 ms
1
t Output Pulse Period. See the Transfer Function section. See Table 6. sec
2
t Time between F1 Falling Edge and F2 Falling Edge. 1/2 t
3 2
3, 4
t CF Pulse Width (Logic High). 96
4
5
t CF Pulse Period. See the Transfer Function and the Frequency Outputs sections. See Table 7. sec
5
t Minimum Time Between the F1 and F2 Pulse. CLKIN/4 sec
6
1
Sample tested during initial release and after any redesign or process change that may affect this parameter.
2
See Figure 2.
3
The pulse widths of F1, F2, and CF are not fixed for higher output frequencies. See the Frequency Outputs section.
4
CF is not synchronous to F1 or F2 frequency outputs.
5
The CF pulse is always 1 µs in the high frequency mode.
t
1
1, 2
sec ms
F1
F2
t
4
CF
t
6
t
2
t
3
t
5
02676-A-002
Figure 2. Timing Diagram for Frequency Outputs
Rev. C | Page 4 of 24
ADE7752/ADE7752A
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ABSOLUTE MAXIMUM RATINGS

T = 25°C, unless otherwise noted.
A
Table 3.
Parameter Rating
V to AGND −0.3 V to +7 V
DD
V to DGND −0.3 V to +7 V
DD
Analog Input Voltage to AGND
VAP, VBP, VCP, VN, IAP, IAN, IBP, IBN,
ICP, and ICN −6 V to +6 V Reference Input Voltage to AGND −0.3 V to V + 0.3 V Digital Input Voltage to DGND −0.3 V to V + 0.3 V Digital Output Voltage to DGND −0.3 V to V + 0.3 V Operating Temperature Range
Storage Temperature Range −65°C to +150°C Junction Temperature 150°C 24-Lead SOIC, Power Dissipation 88 mW θJA Thermal Impedance 250°C/W Lead Temperature, Soldering
Vapor Phase (60 sec) 215°C
Infrared (15 sec) 220°C
−40°C to +85°C Industrial
DD
DD
DD
Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those listed in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.

ESD CAUTION

ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although this product features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality.
Rev. C | Page 5 of 24
ADE7752/ADE7752A
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PIN CONFIGURATION AND FUNCTION DESCRIPTIONS

24 23 22 21 20 19 18 17 16 15 14 13
F1 F2 S1 S0 CLKOUT CLKIN SCF ABS VAP VBP VCP VN
02676-A-003
REF
CF
DGND
V
REVP
IAP IAN IBP IBN ICP ICN
AGND
IN/OUT
DD
10 11 12
1 2 3 4
ADE7752/
5
ADE7752A
6
TOP VIEW
(Not to Scale)
7 8 9
Figure 3. Pin Configuration
Table 4. Pin Function Descriptions
Pin No. Mnemonic Description
1 CF Calibration Frequency Logic Output. The CF logic output gives instantaneous real power information.
This output is intended to be used for calibration purposes. See the SCF pin description.
2 DGND This provides the ground reference for the digital circuitry in the ADE7752: the multiplier, filters, and
digital-to-frequency converter. Because the digital return currents in the ADE7752 are small, it is acceptable to connect this pin to the analog ground plane of the whole system.
3 V
DD
Power Supply. This pin provides the supply voltage for the digital circuitry in the ADE7752. The supply voltage should be maintained at 5 V ± 5% for specified operation. This pin should be decoupled to DGND with a 10 µF capacitor in parallel with a 100 nF ceramic capacitor.
4 REVP
This logic output goes logic high when negative power is detected on any of the three phase inputs, that is, when the phase angle between the voltage and the current signals is greater than 90°. This output is not latched and is reset when positive power is once again detected. See the Negative Power Information section.
5, 6; 7, 8; 9, 10
IAP, IAN; IBP, IBN; ICP, ICN
Analog Inputs for Current Channel. This channel is intended for use with the current transducer and is referenced in this document as the current channel. These inputs are fully differential voltage inputs with maximum differential input signal levels of ±0.5 V. See the Analog Inputs section. Both inputs have internal ESD protection circuitry. In addition, an overvoltage of ±6 V can be sustained on these inputs without risk of permanent damage.
11 AGND
This pin provides the ground reference for the analog circuitry in the ADE7752: the ADCs, temperature sensor, and reference. This pin should be tied to the analog ground plane or the quietest ground reference in the system. This quiet ground reference should be used for all analog circuitry, such as antialiasing filters, current and voltage transducers, and so on. To keep ground noise around the ADE7752 to a minimum, the quiet ground plane should connect to the digital ground plane at only one point. It is acceptable to place the entire device on the analog ground plane.
12 REF
IN/OUT
This pin provides access to the on-chip voltage reference. The on-chip reference has a nominal value of
2.4 V ± 8% and a typical temperature coefficient of 20 ppm/°C. An external reference source may also be connected at this pin. In either case, this pin should be decoupled to AGND with a 1 µF ceramic capacitor.
13–16 VN, VCP, VBP,
VAP
Analog Inputs for the Voltage Channel. This channel is intended for use with the voltage transducer and is referenced in this document as the voltage channel. These inputs are single-ended voltage inputs with a maximum signal level of ±0.5 V with respect to VN for specified operation. All inputs have internal ESD protection circuitry. In addition, an overvoltage of ± 6 V can be sustained on these inputs without risk of permanent damage.
17
ABS
This logic input is used to select the way the three active energies from the three phases are summed. This offers the designer the capability to do the arithmetical sum of the three energies (ABS
or the sum of the absolute values (ABS
logic low). See the Mode Selection of the Sum of the Three Active
logic high)
Energies section.
18 SCF Select Calibration Frequency. This logic input is used to select the freq
uency on the calibration output
CF. Table 7 shows how the calibration frequencies are selected.
Rev. C | Page 6 of 24
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Pin No. Mnemonic Description
19 CLKIN Master Clock for ADCs and Digital Signal Processing. An external clock can be provided at this logic input.
Alternatively, a parallel resonant AT crystal can be connected across CLKIN and CLKOUT to provide a clock source for the ADE7752. The clock frequency for specified operation is 10 MHz. Ceramic load capacitors between 22 pF and 33 pF should be used with the gate oscillator circuit. Refer to the crystal manufacturer’s data sheet for load capacitance requirements.
20 CLKOUT A crystal can be connected across this pin and CLKIN as described previously to provide a clock source
for the ADE7752. The CLKOUT pin can drive one CMOS load when an external clock is supplied at CLKIN or when a crystal is being used.
21, 22 S0, S1 These logic inputs are used to select one of four possible frequencies for the digital-to-frequency conver-
sion. This offers the designer greater flexibility when designing the energy meter. See the Selecting a Frequency for an Energy Meter
24, 23 F1, F2 Low Frequency Logic Outputs. F1 and F2 supply average real power information. The logic outputs can
be used to drive electromechanical counters and two-phase stepper motors directly. See the Transfer Function section.
Application section.
Rev. C | Page 7 of 24
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TYPICAL PERFORMANCE CHARACTERISTICS

0.5
WYE CONNECTION ON-CHIP REFERENCE
0.4
0.3
0.2
0.1
PHASE B
0
–0.1
–0.2
ERROR (% of Reading)
–0.3
–0.4
–0.5
0.1 1
1.0
WYE CONNECTION ON-CHIP REFERENCE
0.8
0.6
0.4
0.2
0
–0.2
–0.4
ERROR (% of Reading)
–0.6
–0.8
–1.0
0.1 1
Figure 5. Error as a Percent of Reading over Power Factor
0.5
WYE CONNECTION EXTERNAL REFERENCE
0.4
0.3
0.2
0.1
0
–0.1
–0.2
ERROR (% of Reading)
–0.3
–0.4
–0.5
0.1 1
Figure 6. Error as a Percent of Reading over Power Factor
PHASE C
S
A
E
P
A
H
CURRENT CHANNEL (% of Full Scale)
PHASE A + B + C
Figure 4. Error as a Percent of Reading
with Internal Reference (Wye Connection)
+85°C PF = +0.5
+25°C PF = –0.5
–40°C PF = +0.5
with Inte
+25°C PF = +1
CURRENT CHANNEL (% of Full Scale)
rnal Reference (Wye Connection)
+85°C PF = +0.5
+25°C PF = +1
–40°C PF = +0.5
+25°C PF = –0.5
CURRENT CHANNEL (% of Full Scale)
with Extern
al Reference (Wye Connection)
02676-A-004
10010
02676-A-005
10010
02676-A-006
10010
1.0
WYE CONNECTION ON-CHIP REFERENCE
0.8
0.6
0.4
0.2
0
–0.2
–0.4
ERROR (% of Reading)
–0.6
–0.8
–1.0
0.1 1
+85°C PF = 1
–40°C PF = 1
CURRENT CHANNEL (% of Full Scale)
+25°C PF = 1
Figure 7. Error as a Percent of Reading over Temperature
rnal Reference (Wye Connection)
with Inte
0.5
0.4
0.3
0.2
0.1
0
–0.1
–0.2
ERROR (% of Reading)
–0.3
–0.4
–0.5
0.1 1
DELTA CONNECTION ON-CHIP REFERENCE
PF = –0.5
PF = +1
PF = +0.5
CURRENT CHANNEL (% of Full Scale)
Figure 8. Error as a Percent of Reading over Power Factor
th Internal Reference (Delta Connection)
wi
0.5
WYE CONNECTION EXTERNAL REFERENCE
0.4
0.3
0.2
0.1
0
–0.1
–0.2
ERROR (% of Reading)
–0.3
–0.4
–0.5
0.1 1
+85°C PF = 1
+25°C PF = 1
–40°C PF = 1
CURRENT CHANNEL (% of Full Scale)
Figure 9. Error as a Percent of Reading over Temperature
with Extern
al Reference (Wye Connection)
02676-A-007
10010
02676-A-008
10010
02676-A-009
10010
Rev. C | Page 8 of 24
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