Analog Devices ADCMP565 Datasheet

Dual Ultrafast

FEATURES

300 ps propagation delay input to output
50 ps propagation delay dispersion
Differential ECL compatible outputs
Differential latch control
Robust input protection
Input common-mode range −2.0 V to +3.0 V
Input differential range ±5 V
Power supply sensitivity greater than 65 dB
200 ps minimum pulsewidth
5 GHz equivalent input rise time bandwidth
Typical output rise/fall of 160 ps
SPT 9689 replacement

APPLICATIONS

High speed instrumentation
Scope and logic analyzer front ends
Window comparators
High speed line receivers and signal restoration
Threshold detection
Peak detection
High speed triggers
Patient diagnostics
Disk drive read channel detection
Hand-held test instruments
Zero-crossing detectors
Clock drivers
Automatic test equipment

Voltage Comparator

ADCMP565

FUNCTIONAL BLOCK DIAGRAM

NONINVERTING
INPUT

INVERTING
INPUT

LATCH ENABLE
INPUT

ADCMP565

LATCH ENABLE
INPUT

Figure 1.

GENERAL DESCRIPTION

The ADCMP565 is an ultrafast voltage comparator fabricated
on Analog Devices’ proprietary XFCB process. The device
features 300 ps propagation delay with less than 50 ps overdrive
dispersion. Overdrive dispersion, a particularly important
characteristic of high speed comparators, is a measure of the
difference in propagation delay under differing overdrive
conditions.

A fast, high precision differential input stage permits consis­tent propagation delay with a wide variety of signals in the
common-mode range from −2.0 V to +3.0 V. Outputs are
complementary digital signals fully compatible with ECL 10 K
and 10 KH logic families. The outputs provide sufficient drive
current to directly drive transmission lines terminated in 50 Ω
to −2 V. A latch input is included, which permits tracking,
track-and-hold, or sample-and-hold modes of operation.

The ADCMP565 is available in a 20-lead PLCC package.

Q OUTPUT

Q OUTPUT

02820-0-001

Rev. 0

Information furnished by Analog Devices is believed to be accurate and reliable.
However, no responsibility is assumed by Analog Devices for its use, nor for any
infringements of patents or other rights of third parties that may result from its use.
Specifications subject to change without notice. No license is granted by implication
or otherwise under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective owners.

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Tel: [phone] www.analog.com
Fax: [phone] © 2003 Analog Devices, Inc. All rights reserved.

ADCMP565

TABLE OF CONTENTS

Specifications..................................................................................... 3

Optimizing High Speed Performance ........................................9

Absolute Maximum Ratings............................................................ 5

Thermal Considerations.............................................................. 5

ESD Caution.................................................................................. 5

Pin Configuration and Function Descriptions............................. 6

Timing Information......................................................................... 8

Application Information.................................................................. 9

Clock Timing Recovery ............................................................... 9

REVISION HISTORY

Revision 0: Initial Version

Comparator Propagation Delay Dispersion ..............................9

Comparator Hysteresis .............................................................. 10

Minimum Input Slew Rate Requirement................................ 10

Typical Application Circuits ..................................................... 11

Typical Performance Characteristics........................................... 12

Outline Dimensions....................................................................... 14

Ordering Guide .......................................................................... 14

Rev. 0 | Page 2 of 16

ADCMP565

SPECIFICATIONS

Table 1. ADCMP565 ELECTRICAL CHARACTERISTICS (V

Parameter Symbol Condition Min Typ Max Unit

DC INPUT CHARACTERISTICS (See Note)

Input Common-Mode Range VCM −2.0 +3.0 V
Input Differential Voltage −5 +5 V
Input Offset Voltage VOS −6.0 ±1.5 +6.0 mV
Input Offset Voltage Channel Matching −8 +1 +8 mV
Offset Voltage Tempco DVOS/dT 5.0 µV/°C
Input Bias Current IBC −10.0 +24 +40.0 µA
Input Bias Current Tempco 17 nA/°C
Input Offset Current −5.0 ±0.5 +5.0 µA
Input Capacitance CIN 1.75 pF
Input Resistance, Differential Mode 100 kΩ
Input Resistance, Common Mode 600 kΩ
Open Loop Gain 60 dB
Common-Mode Rejection Ratio CMRR VCM = −2.0 V to +3.0 V 69 dB
Hysteresis ±1.0 mV

LATCH ENABLE CHARACTERISTICS

Latch Enable Common-Mode Range V

−2.0 0 V

LCM

Latch Enable Differential Input Voltage VLD 0.4 2.0 V
Input High Current @ 0.0 V −10 +6 +10 µA
Input Low Current @ −2.0 V −10 +6 +10 µA
Latch Setup Time tS 250 mV overdrive 50 ps
Latch to Output Delay t

PLOH, tPLOL

Latch Pulse Width tPL 250 mV overdrive 150 ps
Latch Hold Time tH 250 mV overdrive 10 ps

OUTPUT CHARACTERISTICS

Output Voltage—High Level VOH ECL 50 Ω to −2.0 V −1.08 −0.81 V
Output Voltage—Low Level VOL ECL 50 Ω to −2.0 V −1.95 −1.61 V
Rise Time tR 20% to 80% 160 ps
Fall Time tF 20% to 80% 145 ps

AC PERFORMANCE

Propagation Delay tPD 1 V overdrive 310 ps
Propagation Delay tPD 20 mV overdrive 375 ps
Propagation Delay Tempco 0.5 ps/°C
Prop Delay Skew—Rising Transition to

±10 ps

Falling Transition
Within Device Propagation Delay Skew—

±10 ps

Channel to Channel
Propagation Delay Dispersion vs.

1 MHz, 1 ns t

Duty Cycle
Propagation Delay Dispersion vs. Overdrive 50 mV to 1.5 V 50 ps
Propagation Delay Dispersion vs. Overdrive 20 mV to 1.5 V 50 ps
Propagation Delay Dispersion vs.

Slew Rate

Propagation Delay Dispersion vs.

1 V swing,

Common-Mode Voltage

Equivalent Input Rise Time Bandwidth BW

= +5.0 V, VEE = −5.2 V, TA = 25°C, unless otherwise noted.)

CC

250 mV overdrive 280 ps

, tF ±10 ps

R

0 V to 1 V swing,

50 ps
20% to 80%,
50 ps and 600 ps t

R

, tF

5 ps

−1.5 V to 2.5 V
0 V to 1 V swing,

CM

5000 MHz
20% to 80%,

, tF

50 ps t

R

Rev. 0 | Page 3 of 16

ADCMP565

Parameter Symbol Condition Min Typ Max Unit

AC PERFORMANCE (continued)

Toggle Rate >50% output swing 5 Gbps
Minimum Pulse Width PW

from 10 ns to

∆t

PD

200 ps

200 ps < ±50 ps

Unit to Unit Propagation Delay Skew ±10 ps

POWER SUPPLY

Positive Supply Current I

Negative Supply Current I

@ +5.0 V 10 13 18 mA

V

CC

@ −5.2 V 60 70 80 mA

V

EE

Positive Supply Voltage VCC Dual 4.75 5.0 5.25 V
Negative Supply Voltage VEE Dual −4.96 −5.2 −5.45 V
Power Dissipation Dual, without load 370 435 490 mW
Power Dissipation Dual, with load 550 mW
Power Supply Sensitivity—VCC PSS

Power Supply Sensitivity—VEE PSS

67 dB

V

CC

83 dB

V

EE

NOTE: Under no circumstances should the input voltages exceed the supply voltages.

Rev. 0 | Page 4 of 16

ADCMP565

ABSOLUTE MAXIMUM RATINGS

Table 2. ADCMP565 Absolute Maximum Ratings

Parameter Rating
Supply

Voltages

Input
Voltages

Output
Temperature

Positive Supply Voltage

to GND)

(V

CC

Negative Supply Voltage

to GND)

(V

EE

Ground Voltage Differential −0.5 V to +0.5 V
Input Common-Mode

Voltage
Differential Input Voltage −7.0 V to +7.0 V
Input Voltage,

Latch Controls
Output Current 30 mA
Operating Temperature,

Ambient
Operating Temperature,

Junction
Storage Temperature Range −55°C to +125°C

−0.5 V to +6.0 V

−6.0 V to +0.5 V

−3.0 V to +4.0 V

to 0.5 V

V

EE

−40°C to +85°C

125°C

Stress above those listed under Absolute Maximum Ratings may
cause permanent damage to the device. This is a stress rating only
and functional operation of the device at these or any other
conditions above those indicated in the operational sections of this
specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability.

THERMAL CONSIDERATIONS

The ADCMP565 20-lead PLCC package option has a θJA
(junction-to-ambient thermal resistance) of 89.4°C/W in
still air.

ESD CAUTION

ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on
the human body and test equipment and can discharge without detection. Although this product features
proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy
electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance
degradation or loss of functionality.

Rev. 0 | Page 5 of 16