ANALOG DEVICES ADCMP551, ADCMP552, ADCMP553 Service Manual

Single Supply High Speed PECL Comparators

Preliminary Technical Data

FEATURES

Single power supply 750 ps propagation delay input to output 100 ps propagation delay dispersion Differential PECL compatible outputs Differential latch control Internal latch pull-up resistors Power supply rejection greater than 70 dB 750 ps minimum pulse width Equivalent input rise time bandwidth > 750 MHz Typical output rise/fall of 500 ps Programmable Hysteresis

APPLICATIONS

Automatic test equipment High speed instrumentation Scope and logic analyzer front ends Window comparators High speed line receivers Threshold detection Peak detection High speed triggers Patient diagnostics Disk drive read channel detection Hand-held test instruments Zero crossing detectors Line receivers and signal restoration Clock drivers

ADCMP551/ADCMP552/ADCMP553

FUNCTIONAL BLOCK DIAGRAM

NONINVERTING

INPUT

INVERTING

INPUT

LATCH ENABLE INPUT

ADCMP551/ ADCMP552/

ADCMP553

LATCH ENABLE INPUT

Figure 1.

GENERAL DESCRIPTION

The ADCMP551/ADCMP552/ADCMP553 are single supply, high speed comparators fabricated on Analog Devices’ proprietary XFCB process. The devices feature a 750 ps propagation delay with less than 150 ps overdrive dispersion. Dispersion, a measure of the difference in propagation delay under differing overdrive conditions, is a particularly important characteristic of high speed comparators. A separate programmable hysteresis pin is available on the ADCMP552.

A differential input stage permits consistent propagation delay with a common-mode range from –0.2 V to VCCI – 2.0 V. Outputs are complementary digital signals are fully compatible with PECL 10 K and 10 KH logic families. The outputs provide sufficient drive current to directly drive transmission lines terminated in 50 Ω to VCCO − 2 V. A latch input is included and permits tracking, track-and-hold, or sample-and-hold modes of operation. The latch input pins contain internal pullups that set the latch in tracking mode when left open.

Q OUTPUT

4722-0-001

Rev. PrB

Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners.

The ADCMP551/ADCMP552/ADCMP553 are specified over the –40°C to +85°C industrial temperature range. The ADCMP551 is available in a 16-lead QSOP package; the ADCMP552 is available in a 20-lead QSOP package; and the ADCMP553 is available in an 8-lead MSOP package.

ADCMP551/ADCMP552/ADCMP553 Preliminary Technical Data

TABLE OF CONTENTS

Specifications..................................................................................... 3

Absolute Maximum Ratings............................................................ 5

Thermal Considerations.............................................................. 5

ESD Caution.................................................................................. 5

Pin Configuration and Function Descriptions............................. 6

Typical Performance Characteristics ............................................. 8

Timing Information ....................................................................... 10

Application Information ................................................................ 11

REVISION HISTORY

Revision PrA: Preliminary Version

Clock Timing Recovery............................................................. 11

Optimizing High Speed Performance ..................................... 11

Comparator Propagation Delay Dispersion ........................... 11

Comparator Hysteresis .............................................................. 12

Minimum Input Slew Rate Requirement................................ 12

Typical Application Ci rc u it s ......................................................... 13

Outline Dimensions ....................................................................... 14

Ordering Guide .......................................................................... 14

Rev. PrB | Page 2 of 14

Preliminary Technical Data ADCMP551/ADCMP552/ADCMP553

SPECIFICATIONS

= 3.3 V, V

CCI

Table 1. ADCMP551/ADCMP552/ADCMP553 Electrical Characteristics

Parameter Symbol Conditions Min Typ Max Unit

DC INPUT CHARACTERISTICS

Input Voltage Range −0.2 V Input Differential Voltage Range −3 +3 V Input Offset Voltage V Input Offset Voltage Channel Matching ±3.0 mV Offset Voltage Tempco ∆VOS/d Input Bias Current I Input Bias Current Tempco 0.5 nA/°C Input Offset Current −3.0 ±1.0 +3.0 µA Input Capacitance C Input Resistance, Differential Mode 100 kΩ Input Resistance, Common Mode 600 kΩ Active Gain A Common-Mode Rejection Ratio CMRR VCM = −0.2 V to +1.3 V 70 dB Hysteresis R

LATCH ENABLE CHARACTERISTICS

Latch Enable Voltage Range Latch Enable Differential Voltage Range 0.4 1.0 V Latch Enable Input High Current @ V Latch Enable Input Low Current @ V LE Voltage, Open Latch inputs not connected V LE

Voltage, Open Latch Setup Time t Latch Hold Time t Latch to Output Delay t Latch Minimum Pulse Width t

DC OUTPUT CHARACTERISTICS

Output Voltage—High Level V Output Voltage—Low Level V Rise Time t Fall Time t

AC PERFORMANCE

Propagation Delay t V Propagation Delay Tempco ∆tPD/d Prop Delay Skew—Rising Transition to

Falling Transition Within Device Propagation Delay

Skew—Channel-to-Channel Overdrive Dispersion 50 mV ≤ VOD ≤ 100 mV 100 ps Overdrive Dispersion 100 mV ≤ VOD ≤ 1.5 V 100 ps Slew Rate Dispersion 0.4 V/ns ≤ SR ≤ 1.33 V/ns 100 ps Pulse Width Dispersion 750 ps ≤ PW ≤ 10 ns 50 ps Duty Cycle Dispersion 33 MHz, 1 V/ns, VCM = 0.5 V 50 ps Common-Mode Voltage Dispersion 1 V swing, 0.3 V ≤ VCM ≤ 0.8 V 100 ps

= 3.3 V, TA = 25°C, unless otherwise noted.

CCO

Latch inputs not connected V

, t

PLOH

PLOL

– 2.0 V

CCI

−IN = 0 V, +IN = 0 V −10.0 ±3.0 +10.0 mV

10.0 µV/°C

−IN = −0.2 V, +IN = +1.3 V −10.0 ±7 +10.0 µA

1.0 pF

60 dB

= ∞ ±0.5 mV

HYS

– 0.8 V −150 +150 µA

CCI

– 1.8 V −150 +150 µA

CCI

– 1.8 V

CCI

– 0.15 V

CCI

/2 – 0.075 V

CCI

– 0.8 V

CCI

/2 + 0.075 V

CCI

VOD = 250 mV 500 ps VOD = 250 mV 500 ps VOD = 250 mV 750 ps VOD = 250 mV 750 ps

PECL 50 Ω to VDD − 2.0 V V PECL 50 Ω to VDD − 2.0 V V

− 1.05 V

CCO

− 1.95 V

CCO

− 0.81 V

CCO

− 1.54 V

CCO

10% to 90% 500 ps 10% to 90% 500 ps

VOD = 1 V 750 ps

= 20 mV 850 ps

VOD = 1 V 0.5 ps/°C

= 1 V 100 ps

Rev. PrB | Page 3 of 14

ADCMP551/ADCMP552/ADCMP553 Preliminary Technical Data

Parameter Symbol Conditions Min Typ Max Unit

AC PERFORMANCE (continued)

Equivalent Input Rise Time Bandwidth1 BW

Maximum Toggle Rate >50% output swing 650 MHz Minimum Pulse Width PW

MIN

Unit-to-Unit Propagation Delay Skew 100 ps

POWER SUPPLY (ADCMP551/ADCMP552)

Input Supply Current I Output Supply Current I

VCCI

VCCO

Output Supply Current @ 3.3 V with load 62 70 mA Input Supply Voltage V Output Supply Voltage V Positive Supply Differential V Power Dissipation P

CCI

CCO

− V

Power Dissipation Dual, with load 115 140 mW DC Power Supply Rejection Ratio—V DC Power Supply Rejection Ratio—V

CCI

CCO

PSRR PSRR

VCCI

VCCO

POWER SUPPLY (ADCMP553)

Positive Supply Current I

VCC

Positive Supply Current @ 3.3 V with load 35 42 mA Positive Supply Voltage V Power Dissipation P

Power Dissipation Dual, with load 60 75 mW DC Power Supply Rejection Ratio — V

PSRR

VCC

HYSTERESIS (ADCMP552 Only)

Programmable Hysteresis 0 40 mV

0 V to 1 V swing, 2 V/ns 750 MHz

∆tPD < 50 ps 750 ps

@ 3.3 V 12.5 16 mA @ 3.3 V without load 6 9 mA

Dual 3.135 3.3 5.25 V Dual 3.135 3.3 5.25 V –0.2 +2.3 V

CCI

Dual, without load 55 70 mW

70 dB 70 dB

@ 3.3 V without load 9 11 mA

Dual 3.135 3.3 5.25 V Dual, without load 30 40 mW

70 dB

Equivalent input rise time bandwidth assumes a first order input response and is calculated by the following formula: BWEQ = .22/√(tr

input transition time applied to the comparator and tr

is the effective transition time as digitized by the comparator input.

COMP

Rev. PrB | Page 4 of 14

-tr

), where trIN is the 20/80

COMP

Preliminary Technical Data ADCMP551/ADCMP552/ADCMP553

ABSOLUTE MAXIMUM RATINGS

Table 2.

Parameter Rating

Supply Voltages

Input Supply Voltage (V Output Supply Voltage (V Ground Voltage Differential −0.5 V to +0.5 V

Input Voltages

Input Common-Mode Voltage −0.5 V to +3.5 V Differential Input Voltage −4.0 V to +4.0 V Input Voltage, Latch Controls −0.5 V to +5.5 V

Output

Output Current 30 mA

Temperature

Operating Temperature, Ambient −40°C to +85°C Operating Temperature, Junction 125°C Storage Temperature Range −65°C to +150°C

to GND) −0.5 V to +6.0 V

CCI

to GND) −0.5 V to +6.0 V

CCO

Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.

THERMAL CONSIDERATIONS

The ADCMP551 16-lead QSOP package has a θJA (junction-toambient thermal resistance) of TBD°C/W in still air.

The ADCMP552 20-lead QSOP package has a θ ambient thermal resistance) of TBD°C/W in still air.

The ADCMP553 8-lead MSOP package has a θ ambient thermal resistance) of TBD°C/W in still air.

(junction-to-

ESD CAUTION

ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although this product features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality.

Rev. PrB | Page 5 of 14

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