ANALOG DEVICES ADA4930-1, ADA4930-2 Service Manual

Ultralow Noise
Drivers for Low Voltage ADCs
ADA4930-1/ADA4930-2

FEATURES

Low input voltage noise: 1.2 nV/√Hz Low common-mode output: 0.9 V on single supply Extremely low harmonic distortion
−104 dBc HD2 at 10 MHz
−79 dBc HD2 at 70 MHz
−73 dBc HD2 at 100 MHz
−101 dBc HD3 at 10 MHz
−82 dBc HD3 at 70 MHz
−75 dBc HD3 at 100 MHz
High speed
−3 dB bandwidth of 1.35 GHz, G = 1 Slew rate: 3400 V/μs, 25% to 75%
0.1 dB gain flatness to 380 MHz Fast overdrive recovery of 1.5 ns
0.5 mV typical offset voltage Externally adjustable gain Differential-to-differential or single-ended-to-differential
operation Adjustable output common-mode voltage Single-supply operation: 3.3 V or 5 V

APPLICATIONS

ADC drivers Single-ended-to-differential converters IF and baseband gain blocks Differential buffers Line drivers

GENERAL DESCRIPTION

The ADA4930-1/ADA4930-2 are very low noise, low distortion, high speed differential amplifiers. They are an ideal choice for driving 1.8 V high performance ADCs with resolutions up to 14 bits from dc to 70 MHz. The adjustable output common mode allows the ADA4930-1/ADA4930-2 to match the input of the ADC. The internal common-mode feedback loop provides exceptional output balance, suppression of even-order harmonic distortion products, and dc level translation.
With the ADA4930-1/ADA4930-2, differential gain configurations are easily realized with a simple external feedback network of four resistors determining the closed-loop gain of the amplifier.
The ADA4930-1/ADA4930-2 are fabricated using Analog Devices, Inc., proprietary silicon-germanium (SiGe), complementary bipolar process, enabling them to achieve very low levels of distortion with an input voltage noise of only 1.2 nV/√Hz.
Rev. A
Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners.
The low dc offset and excellent dynamic performance of the ADA4930-1/ADA4930-2 make them well suited for a wide variety of data acquisition and signal processing applications.
The ADA4930-1 is available in a Pb-free, 3 mm × 3 mm 16-lead LFCSP, and the ADA4930-2 is available in a Pb-free, 4 mm × 4 mm 24-lead LFCSP. The pinout has been optimized to facilitate printed circuit board (PCB) layout and minimize distortion. The ADA4930-1 is specified to operate over the −40°C to +105°C temperature range, and the ADA4930-2 is specified to operate over the −40°C to +105°C temperature range for 3.3 V or 5 V supply voltages.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.461.3113 ©2010 Analog Devices, Inc. All rights reserved.

FUNCTIONAL BLOCK DIAGRAMS

1–FB
2+IN
3–IN
4+FB
S
S
S
–V
–V
–V
14
15
16
ADA4930-1
7
5
6
S
S
S
+V
+V
+V
–V
13
8
+V
S
S
12 PD
11 –OUT
10 +OUT
9V
OCM
09209-001
Figure 1.
S1
S1
–OUT1
–V
–V
–FB1
PD1
+IN1
19
20
21
22
23
24
S1 S1
1–IN1 2+FB1 3+V
ADA4930-2
4+V 5–FB2 6+IN2
9
7
8
S2
–IN2
+V
+FB2
18 +O UT1 17 V
OCM1
16 –V
S2
–V
15
S2
14
PD2
13 –OUT2
11
12
10
2
S2
+V
OCM
V
+OUT2
09209-002
Figure 2.
100
10
hz)
(nV/
N
V
1
0
10 100 1k 10k 100k 1M 10M 100M
FREQUENCY (Hz)
Figure 3. Voltage Noise Spectral Density
09209-003
ADA4930-1/ADA4930-2

TABLE OF CONTENTS

Features .............................................................................................. 1
Applications ....................................................................................... 1
General Description ......................................................................... 1
Functional Block Diagrams ............................................................. 1
Revision History ............................................................................... 2
Specifications ..................................................................................... 3
3.3 V Operation ............................................................................ 3
3.3 V V
OCM
to V
Performance ............................................... 4
O, cm
3.3 V General Performance ......................................................... 4
5 V Operation ............................................................................... 5
5 V V
OCM
to V
Performance .................................................. 6
O, cm
5 V General Performance ............................................................ 6
Absolute Maximum Ratings ............................................................ 7
Thermal Resistance ...................................................................... 7
Maximum Power Dissipation ..................................................... 7
ESD Caution .................................................................................. 7
Pin Configurations and Function Descriptions ........................... 8
Typical Performance Characteristics ............................................. 9
Test Circuits ..................................................................................... 15
Operational Description ................................................................ 16
Definition of Terms .................................................................... 16
Theory of Operation ...................................................................... 17
Analyzing an Application Circuit ............................................ 17
Setting the Closed-Loop Gain .................................................. 17
Estimating the Output Noise Voltage ...................................... 17
Impact of Mismatches in the Feedback Networks ................. 18
Input Common-Mode Voltage Range ..................................... 18
Minimum RG Value .................................................................... 19
Setting the Output Common-Mode Voltage .......................... 19
Calculating the Input Impedance for an Application Circuit
....................................................................................................... 19
Layout, Grounding, and Bypassing .............................................. 23
High Performance ADC Driving ................................................. 24
Outline Dimensions ....................................................................... 25
Ordering Guide .......................................................................... 25

REVISION HISTORY

10/10—Rev. 0 to Rev. A
Changes to General Description .................................................... 1
10/10—Revision 0: Initial Version
Rev. A | Page 2 of 28
ADA4930-1/ADA4930-2

SPECIFICATIONS

3.3 V OPERATION

VS = 3.3 V, V T
= −40°C to +105°C, unless otherwise noted.
MAX
Table 1.
Parameter Test Conditions/Comments Min Typ Max Unit
DYNAMIC PERFORMANCE
−3 dB Small Signal Bandwidth V
−3 dB Large Signal Bandwidth V Bandwidth for 0.1 dB Flatness V
ADA4930-1 380 MHz
ADA4930-2 89 MHz Slew Rate V Settling Time to 0.1% V Overdrive Recovery Time G = 3, V
NOISE/HARMONIC PERFORMANCE
HD2/HD3 V V V V Third-Order IMD V V Input Voltage Noise f = 100 kHz 1.15 nV/√Hz Input Current Noise f = 100 kHz 3 pA/√Hz Crosstalk f = 100 MHz, ADA4930-2, RL = 200 Ω −90 dB
DC PERFORMANCE
Input Offset Voltage VIP = VIN = V Input Offset Voltage Drift T Input Bias Current −36 −24 −16 μA Input Bias Current Drift T
Input Offset Current −1.8 +0.1 +1.8 μA Open-Loop Gain RF = RG = 10 kΩ, ΔVO = 0.5 V, RL = open circuit 64 dB
INPUT CHARACTERISTICS
Input Common-Mode Voltage Range 0.3 1.2 V Input Resistance Differential 150 kΩ Common mode 3 MΩ Input Capacitance Common mode 1 pF CMRR ΔV
OUTPUT CHARACTERISTICS
Output Voltage Each single-ended output; RF = RG = 10 kΩ 0.11 1.74 V Linear Output Current Each single-ended output; f = 1 MHz, TDH ≤ 60 dBc 30 mA Output Balance Error f = 1 MHz 55 dB
= 0.9 V, V
ICM
= 0.9 V, RF = 301 Ω, RG = 301 Ω, R
OCM
= 0.1 V p-p 1430 MHz
O, dm
= 2 V p-p 887 MHz
O, dm
= 0.1 V p-p
O, dm
= 2 V step, 25% to 75% 2877 V/μs
O, dm
= 2 V step, RL = 200 Ω 6.3 ns
O, dm
= 0.7 V p-p pulse 1.5 ns
IN, dm
= 2 V p-p, fC = 10 MHz −98/−97 dB
O, dm
= 2 V p-p, fC = 30 MHz −91/−88 dB
O, dm
= 2 V p-p, fC = 70 MHz −79/−79 dB
O, dm
= 2 V p-p, fC = 100 MHz −73/−73 dB
O, dm
= 1 V p-p/tone, fC = 70.05 MHz ± 0.05 MHz 91 dBc
O, dm
= 1 V p-p/tone, fC = 140.05 MHz ± 0.05 MHz 86 dBc
O, dm
OCM
to T
MIN
MIN
2.75 μV/°C
MAX
to T
−0.05
MAX
= 0.5 V dc; RF = RG = 10 kΩ, RL = open circuit −82 −77 dB
ICM
= 1 kΩ, single-ended input, differential output, TA = 25°C, T
L, dm
= 0 V, RL = open circuit
to
MIN
−3.1 −0.5 +3.1 mV
μA/°C
Rev. A | Page 3 of 28
ADA4930-1/ADA4930-2
3.3 V V
Table 2.
Parameter Test Conditions/Comments Min Typ Max Unit
V
DYNAMIC PERFORMANCE
OCM
−3 dB Bandwidth V Slew Rate V
V
INPUT CHARACTERISTICS
OCM
Input Voltage Range 0.8 1.1 V Input Resistance 7.0 8.3 10.3 kΩ Input Offset Voltage V Input Voltage Noise f = 100 kHz 23.5 nV/√Hz Gain 0.99 1 1.02 V/V CMRR ΔV

3.3 V GENERAL PERFORMANCE

Table 3.
Parameter Test Conditions/Comments Min Typ Max Unit
POWER SUPPLY
Operating Range 3.3 V Quiescent Current per Amplifier Enabled 32 35 40 mA Enabled, T
Disabled 0.44 1.8 2.35 mA +PSRR ΔV
−PSRR ΔV POWER-DOWN (PD) PD Input Voltage
Enabled >1.3 V Turn-Off Time 1 μs Turn-On Time 12 ns PD Pin Bias Current
Enabled
Disabled OPERATING TEMPERATURE RANGE −40 +105 °C
OCM
TO V
PERFORMANCE
O, CM
= 0.1 V p-p 745 MHz
O, cm
= 2 V p-p, 25% to 75% 828 V/μs
O, cm
= V
− V
OS, cm
O, cm
= 0.5 V dc; RF = RG = 10 kΩ, RL = open circuit −83 −77 dB
OCM
MIN
= 0.5 V; RF = RG = 10 kΩ, RL = open circuit −74 −70 dB
ICM
= 0.5 V; RF = RG = 10 kΩ, RL = open circuit −87 −76 dB
ICM
; VIP = VIN = V
OCM
to T
variation 81
MAX
= 0 V −25 +15.4 +31 mV
OCM
μA/°C
Disabled <0.8 V
PD PD
= 3.3 V = 0 V
0.09 μA 97 μA
Rev. A | Page 4 of 28
ADA4930-1/ADA4930-2

5 V OPERATION

VS = 5 V, V T
to T
MIN
Table 4.
Parameter Test Conditions/Comments Min Typ Max Unit
DYNAMIC PERFORMANCE
−3 dB Small Signal Bandwidth V
−3 dB Large Signal Bandwidth V Bandwidth for 0.1 dB Flatness V
ADA4930-1 369 MHz
ADA4930-2 90 MHz Slew Rate V Settling Time to 0.1% V Overdrive Recovery Time G = 3, V
NOISE/HARMONIC PERFORMANCE
HD2/HD3 V V V V Third-Order IMD V V Input Voltage Noise f = 100 kHz 1.2 nV/√Hz Input Current Noise f = 100 kHz 2.8 pA/√Hz Crosstalk f = 100 MHz, ADA4930-2, RL = 200 Ω −90 dB
DC PERFORMANCE
Input Offset Voltage VIP = VIN = V Input Offset Voltage Drift T Input Bias Current −34 −23 −15 μA Input Bias Current Drift T
Input Offset Current −0.82 +0.1 +0.82 μA Open-Loop Gain RF = RG = 10 kΩ, ΔVO = 1 V, RL = open circuit 64 dB
INPUT CHARACTERISTICS
Input Common-Mode Voltage Range 0.3 2.8 V Input Resistance Differential 150 kΩ Common mode 3 MΩ Input Capacitance Common mode 1 pF CMRR ΔV
OUTPUT CHARACTERISTICS
Output Voltage Each single-ended output; RF = RG = 10 kΩ 0.18 3.38 V Linear Output Current Each single-ended output; f = 1 MHz, TDH ≤ 60 dBc 30 mA Output Balance Error f = 1 MHz 55 dB
= 0.9 V, V
ICM
= −40°C to +105°C, unless otherwise noted.
MAX
= 0.9 V, RF = 301 Ω, RG = 301 Ω, R
OCM
= 0.1 V p-p 1350 MHz
O, dm
= 2 V p-p 937 MHz
O, dm
= 0.1 V p-p
O, dm
= 2 V step, 25% to 75% 3400 V/μs
O, dm
= 2 V step, RL = 200 Ω 6 ns
O, dm
IN, dm
= 2 V p-p, fC = 10 MHz −104/−101 dB
O, dm
= 2 V p-p, fC = 30 MHz −91/−93 dB
O, dm
= 2 V p-p, fC = 70 MHz −79/−82 dB
O, dm
= 2 V p-p, fC = 100 MHz −73/−75 dB
O, dm
= 1 V p-p/tone, fC = 70.05 MHz ± 0.05 MHz 94 dBc
O, dm
= 1 V p-p/tone, fC = 140.05 MHz ± 0.05 MHz 90 dBc
O, dm
to T
MIN
MAX
to T
MIN
MAX
= 1 V dc; RF = RG = 10 kΩ, RL = open circuit −82 −77 dB
ICM
= 1 kΩ, single-ended input, differential output, TA= 25°C,
L, dm
= 0.7 V p-p pulse 1.5 ns
= 0 V, RL = open circuit
OCM
−3.1 −0.15 +3.1 mV
1.8 μV/°C
−0.05
μA/°C
Rev. A | Page 5 of 28
ADA4930-1/ADA4930-2
5 V V
Table 5.
Parameter Test Conditions/Comments Min Typ Max Unit
V
OCM
V
OCM

5 V GENERAL PERFORMANCE

Table 6.
Parameter Test Conditions/Comments Min Typ Max Unit
POWER SUPPLY
POWER-DOWN (PD) PD Input Voltage
Turn-Off Time 1 μs Turn-On Time 12 ns PD Pin Bias Current
OPERATING TEMPERATURE RANGE −40 +105 °C
OCM
TO V
PERFORMANCE
O, CM
DYNAMIC PERFORMANCE
−3 dB Bandwidth V Slew Rate V
= 0.1 V p-p 740 MHz
O, cm
= 2 V p-p, 25% to 75% 1224 V/μs
O, cm
INPUT CHARACTERISTICS Input Voltage Range 0.5 2.3 V Input Resistance 7.0 8.3 10.2 kΩ Input Offset Voltage V
OS, cm
= V
O, cm
− V
; VIP = VIN = V
OCM
= 0 V −25 +0.35 +15 mV
OCM
Input Voltage Noise f = 100 kHz 23.5 nV/√Hz Gain 0.99 1 1.02 V/V CMRR ΔV
= 1.5 V; RF = RG = 10 kΩ, RL = open circuit −80 −77 dB
OCM
Operating Range 5 V Quiescent Current per Amplifier Enabled 31.1 34 38.4 mA Enabled, T
MIN
to T
variation 74.5
MAX
μA/°C Disabled 0.45 1.8 2.6 mA +PSRR ΔV
−PSRR ΔV
= 1 V; RF = RG = 10 kΩ, RL = open circuit −74 −71 dB
ICM
= 1 V; RF = RG = 10 kΩ, RL = open circuit −91 −75 dB
ICM
Disabled <2.5 V
Enabled >3 V
Enabled Disabled
PD PD
= 5 V = 0 V
0.09 μA 97 μA
Rev. A | Page 6 of 28
ADA4930-1/ADA4930-2

ABSOLUTE MAXIMUM RATINGS

Table 7.
Parameter Rating
Supply Voltage 5.5 V Power Dissipation See Figure 4 Storage Temperature Range −65°C to +125°C Operating Temperature Range −40°C to +105°C Lead Temperature (Soldering, 10 sec) 300°C Junction Temperature 150°C
Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.

THERMAL RESISTANCE

θJA is specified for the device (including exposed pad) soldered to a high thermal conductivity 2s2p circuit board, as described in EIA/JESD51-7.
Table 8. Thermal Resistance
Package Type θJA Unit
16-Lead LFCSP (Exposed Pad) 98 °C/W 24-Lead LFCSP (Exposed Pad) 67 °C/W

MAXIMUM POWER DISSIPATION

The maximum safe power dissipation in the ADA4930-1/ADA4930-2 packages is limited by the associated rise in junction temperature (T on the die. At approximately 150°C, which is the glass transition temperature, the plastic changes its properties. Even temporarily exceeding this temperature limit can change the stresses that the package exerts on the die, permanently shifting the parametric performance of the ADA4930-1/ADA4930-2. Exceeding a junction temperature of 150°C for an extended period can result in changes in the silicon devices, potentially causing failure.
)
J
The power dissipated in the package (P quiescent power dissipation and the power dissipated in the package due to the load drive. The quiescent power is the voltage between the supply pins (V
) times the quiescent current (IS).
S
The power dissipated due to the load drive depends upon the particular application. The power due to load drive is calculated by multiplying the load current by the associated voltage drop across the device. RMS voltages and currents must be used in these calculations.
Airflow increases heat dissipation, effectively reducing θ addition, more metal directly in contact with the package leads/ exposed pad from metal traces, through holes, ground, and power planes reduces θ
.
JA
Figure 4 shows the maximum safe power dissipation vs. the ambient temperature for the ADA4930-1 single 16-lead LFCSP (98°C/W) and the ADA4930-2 dual 24-lead LFCSP (67°C/W) on a JEDEC standard 4-layer board.
3.5
3.0
2.5
2.0
1.5
1.0
MAXIMUM POWER DISSIPATION (W)
0.5
0
–40 11090 100
Figure 4. Maximum Power Dissipation vs. Ambient Temperature,
ADA4930-1
–30–20–100 1020304050607080
ADA4930-2
TEMPERATURE (° C)
4-Layer Board

ESD CAUTION

) is the sum of the
D
JA
. In
09209-004
Rev. A | Page 7 of 28
ADA4930-1/ADA4930-2

PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS

S
S
S
S
–V
–V
–V
–V
14
13
15
16
PIN 1 INDICATO R
1–FB
2+IN
ADA4930-1
TOP VIEW
3–IN
(Not to Scale)
4+FB
8
7
5
6
S
S
S
S
+V
+V
+V
+V
NOTES
1. EXPOSED PADDLE. THE EXPOSED PAD IS NO T ELECTRICALLY CONNECTED T O THE DEVI CE. IT I S TYPICALLY SOLDERED T O GROUND OR A POWER
PLANE ON THE PCB THAT IS T HERMALLY CONDUCTIVE.
Figure 5. ADA4930-1 Pin Configuration
12 PD
11 –OUT
10 +OUT
9V
OCM
1
–IN1
2
+FB1
3
+V
S1
4
+V
S1
5
–FB2
6
+IN2
NOTES
1. EXPO SED PADDLE. T HE EXPOSED PAD IS NOT ELECTRICALLY CONNECTED T O THE DEVI CE. IT I S
09209-005
TYPICALLY SOLDERED TO GROUND OR A POWER
PLANE ON THE PCB THAT IS THERMALLY CONDUCTIVE.
Figure 6. ADA4930-2 Pin Configuration
–VS1–VS1–FB1
+IN1
20
21
22
23
24
PIN 1 INDICATOR
ADA4930-2
TOP VIEW
(Not to Scale)
9
7
8
11
10
S2
S2
–IN2
+V
+V
+FB2
V
PD1
–OUT1
19
18
+OUT1
17
V
OCM1
16
–V
S2
–V
15
S2
14
PD2
13
–OUT2
12
OCM2
+OUT2
9209-006
Table 9. ADA4930-1 Pin Function Descriptions
Pin No. Mnemonic Description
1 −FB
Negative Output for Feedback
Component Connection. 2 +IN Positive Input Summing Node. 3 −IN Negative Input Summing Node. 4 +FB
Positive Output for Feedback
Component Connection. 5 to 8 +VS Positive Supply Voltage. 9 V
Output Common-Mode Voltage.
OCM
10 +OUT Positive Output for Load Connection. 11 −OUT Negative Output for Load Connection. 12
PD
Power-Down Pin. 13 to 16 −VS Negative Supply Voltage. EPAD
Exposed Paddle. The exposed pad is not
electrically connected to the device. It is
typically soldered to ground or a power
plane on the PCB that is thermally
conductive.
Table 10. ADA4930-2 Pin Function Descriptions
Pin No. Mnemonic Description
1 −IN1 Negative Input Summing Node 1. 2 +FB1 Positive Output Feedback Pin 1. 3, 4 +V 5 −FB2 6 +IN2 7 −IN2 8 +FB2 9, 10 +V 11 V 12 +OUT2 13 −OUT2 14
Positive Supply Voltage 1.
S1
Negative Output Feedback Pin 2. Positive Input Summing Node 2. Negative Input Summing Node 2. Positive Output Feedback Pin 2.
Positive Supply Voltage 2.
S2
Output Common-Mode Voltage 2.
OCM2
Positive Output 2. Negative Output 2.
PD2
Power-Down Pin 2.
15, 16 −VS2 Negative Supply Voltage 2. 17 V 18 +OUT1 19 −OUT1 20
21, 22 −V 23 −FB1 24 +IN1 EPAD
Output Common-Mode Voltage 1.
OCM1
Positive Output 1. Negative Output 1.
PD1
Negative Supply Voltage 1.
S1
Power-Down Pin 1.
Negative Output Feedback Pin 1. Positive Input Summing Node 1. Exposed Paddle. The exposed pad is
not electrically connected to the device. It is typically soldered to ground or a power plane on the PCB that is thermally conductive.
Rev. A | Page 8 of 28
ADA4930-1/ADA4930-2

TYPICAL PERFORMANCE CHARACTERISTICS

TA = 25°C, VS = 5 V, V
3
VIN = 100mV
0
–3
–6
–9
–12
–15
–18
–21
NORMALIZE D CLOSED LO OP GAIN (dB)
–24
–27
1M 10M 100M 1G 10G
Figure 7. Small Signal Frequency Response
at Gain = 1, Gain = 2, and Gain = 5
3
VIN = 100mV
0
–3
–6
–9
–12
–15
–18
CLOSED LOOP GAIN (dB)
–21
–24
–27
1M 10M 100M 1G 10G
Figure 8. Small Signal Frequency Response
3
VIN = 100mV
0
–3
–6
–9
–12
–15
–18
CLOSED LOOP GAIN (dB)
–21
–24
–27
1M 10M 100M 1G 10G
Figure 9. Small Signal Frequency Response
at T
= −40°C, TA = 25°C, and TA = 105°C
A
= 0.9 V, V
ICM
G = 1, RG = 300 G = 2, RG = 150 G = 5, RG = 60
FREQUENCY (Hz)
VS = 3.3V VS = 5.0V
FREQUENCY (Hz)
= 3.3 V and VS = 5 V
at V
S
TA = –40°C TA = +25°C T
= +105°C
A
FREQUENCY (Hz)
= 0.9 V, R
OCM
= 1 kΩ, unless otherwise noted.
L, dm
9209-007
9209-008
9209-009
3
VIN = 2V p-p
0
–3
–6
–9
–12
–15
–18
–21
NORMALIZED CLOSED LOOP GAIN (dB)
–24
–27
1M 10M 100M 1G 10G
G = 1, RG = 300 G = 2, R
= 150
G
G = 5, RG = 60
FREQUENCY (Hz)
Figure 10. Large Signal Frequency Response
at Gain = 1, Gain = 2, and Gain = 5
6
VIN = 2V p-p
3
0
–3
–6
–9
–12
–15
–18
CLOSED LOOP GAIN (dB)
–21
–24
–27
1M 10M 100M 1G 10G
VS = 3.3V VS = 5.0V
FREQUENCY (Hz)
Figure 11. Large Signal Frequency Response
= 3.3 V and VS = 5 V
at V
S
6
VIN = 2V p-p
3
0
–3
–6
–9
–12
–15
–18
CLOSED LOOP GAIN (dB)
–21
–24
–27
1M 10M 100M 1G 10G
TA = –40°C TA = +25°C T
= +105°C
A
FREQUENCY (Hz)
Figure 12. Large Signal Frequency Response
at T
= −40°C, TA = 25°C, and TA = 105°C
A
9209-010
9209-011
9209-012
Rev. A | Page 9 of 28
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