ANALOG DEVICES ADA4927-1, ADA4927-2 Service Manual

Ultralow Distortion

–

Current Feedback Differential ADC Driver

FEATURES

Extremely low harmonic distortion

−105 dBc HD2 @ 10 MHz

−91 dBc HD2 @ 70 MHz

−87 dBc HD2 @ 100 MHz

−103 dBc HD3 @ 10 MHz

−98 dBc HD3 @ 70 MHz

−89 dBc HD3 @ 100 MHz Better distortion at higher gains than VF amplifiers Low input voltage noise: 1.4 nV/√Hz High speed

−3 dB bandwidth of 2.3 GHz

0.1 dB gain flatness: 150 MHz

Slew rate: 5000 V/μs, 25% to 75%

Fast 0.1% settling time: 10 ns Low input offset voltage: 0.3 mV typical Externally adjustable gain Stability and bandwidth controlled by feedback resistor Differential-to-differential or single-ended-to-differential

operation Adjustable output common-mode voltage Wide supply operation: +5 V to ±5 V

APPLICATIONS

ADC drivers Single-ended-to-differential converters IF and baseband gain blocks Differential buffers Differential line drivers

GENERAL DESCRIPTION

The ADA4927 is a low noise, ultralow distortion, high speed, current feedback differential amplifier that is an ideal choice for driving high performance ADCs with resolutions up to 16 bits from dc to 100 MHz. The output common-mode level can easily be matched to the required ADC input common-mode levels. The internal common-mode feedback loop provides exceptional output balance and suppression of even-order distortion products.

Differential gain configurations are easily realized using an external feedback network comprising four resistors. The current feedback architecture provides loop gain that is nearly independent of closed-loop gain, achieving wide bandwidth, low distortion, and low noise at higher gains and lower power consumption than comparable voltage feedback amplifiers.

The ADA4927 is fabricated using the Analog Devices, Inc., silicongermanium complementary bipolar process, enabling very low levels of distortion with an input voltage noise of only 1.3 nV/√Hz.

Rev. A

Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners.

ADA4927-1/ADA4927-2

FUNCTIONAL BLOCK DIAGRAMS

1–FB

2+IN

3–IN

4+FB

1–IN1 2+FB1 3+V

S1

4+V

S1

5–FB2 6+IN2

40

V

= 2V p-p

OUT, dm

–50

–60

–70

–80

–90

–100

–110

–120

SPURIOUS-FREE DYNAMIC RANGE (dBc)

–130

1 10 100 1k

Figure 3. Spurious-Free Dynamic Range vs. Frequency at Various Gains

The low dc offset and excellent dynamic performance of the ADA4927 make it well suited for a wide variety of data acquisition and signal processing applications.

The ADA4927-1 is available in a Pb-free, 3 mm × 3 mm 16-lead LFCSP, and the ADA4927-2 is available in a Pb-free, 4 mm × 4 mm 24-lead LFCSP. The pinouts are optimized to facilitate printed circuit board (PCB) layout and to minimize distortion. They are specified to operate over the −40°C to +105°C temperature range.

One Technology 62-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.461.3113 l rights reserved.

Way, P.O. Box 9106, Norwood, MA 020

S

–V

14

13

15

16

ADA4927-1

8

7

5

6

S

+V

Figure 1.

S1

–V

–FB1

+IN1

24

PD1

20

21

22

23

ADA4927-2

9

7

8

11

10

S2

–IN2

+V

OCM2

+FB2

V

Figure 2.

FREQUENCY (MHz)

S

–OUT1

19

12

+OUT2

12 PD

11 –OUT

10 +OUT

9V

OCM

18 + OUT1 17 V

OCM1

16 – V

S2

–V

15

S2

14

PD2

13 –O UT2

07574-001

07574-002

G = 1 G = 10 G = 20

07574-026

ADA4927-1/ADA4927-2

REVISION HISTORY

8/09—Rev. 0 to Rev. A

Changes to Ordering Guide .......................................................... 24

10/08—Revision 0: Initial Version

Rev. A | Page 2 of 24

ADA4927-1/ADA4927-2

SPECIFICATIONS

±5 V OPERATION

TA = 25°C, +VS = 5 V, −VS = − 5 V, V All specifications refer to single-ended input and differential outputs, unless otherwise noted. Refer to Figure 46 for signal definitions.

±DIN to V

Performance

OUT, dm

Table 1.

Parameter Conditions Min Typ Max Unit

DYNAMIC PERFORMANCE

−3 dB Small Signal Bandwidth V

−3 dB Large Signal Bandwidth V Bandwidth for 0.1 dB Flatness V V Slew Rate V Settling Time to 0.1% V Overdrive Recovery Time VIN = 0 V to 0.9 V step, G = 10 10 ns

NOISE/HARMONIC PERFORMANCE See Figure 45 for distortion test circuit

Second Harmonic V V V Third Harmonic V V V IMD f1 = 70 MHz, f2 = 70.1 MHz, V f Voltage Noise (RTI) f = 100 kHz, G = 28 1.4 nV/√Hz Input Current Noise f = 100 kHz, G = 28 14 pA/√Hz Crosstalk f = 100 MHz, ADA4927-2 −75 dB

INPUT CHARACTERISTICS

Offset Voltage VIP = VIN = V t Input Bias Current −15 +0.5 +15 µA t Input Offset Current −10.5 −0.6 +10.5 µA Input Resistance Differential 14 Ω Common mode 120 kΩ Input Capacitance Differential 0.5 pF Input Common-Mode Voltage Range −3.5 +3.5 V CMRR V Open-Loop Transresistance DC 120 185 kΩ

OUTPUT CHARACTERISTICS

Output Voltage Swing Each single-ended output, RF = RG = 10 kΩ −3.8 +3.8 V Linear Output Current 65 mA p-p Output Balance Error

= 0 V, RF = 301 , RG = 301 , RT = 56.2  (when used), R

OCM

= 0.1 V p-p 2300 MHz

OUT, dm

= 2.0 V p-p 1500 MHz

OUT, dm

= 0.1 V p-p, ADA4927-1 150 MHz

OUT, dm

= 0.1 V p-p, ADA4927-2 120 MHz

OUT, dm

= 2 V step, 25% to 75% 5000 V/µs

OUT, dm

= 2 V step 10 ns

OUT, dm

= 2 V p-p, 10 MHz −105 dBc

OUT, dm

= 2 V p-p, 70 MHz −91 dBc

OUT, dm

= 2 V p-p, 100 MHz −87 dBc

OUT, dm

= 2 V p-p, 10 MHz −103 dBc

OUT, dm

= 2 V p-p, 70 MHz −98 dBc

OUT, dm

= 2 V p-p, 100 MHz −89 dBc

OUT, dm

= 2 V p-p −94 dBc

OUT, dm

= 140 MHz, f2 = 140.1 MHz, V

1

= 0 V −1.3 +0.3 +1.3 mV

OCM

to t

MIN

V

variation ±1.5 µV/°C

MAX

to t

variation ±0.1 µA/°C

MAX

/V

, V

OUT, dm

OUT, cm

/V

IN, cm

OUT, dm

= ±1 V −70 −93 dB

IN, cm

, V

OUT, dm

= 1 V, 10 MHz,

= 2 V p-p −85 dBc

OUT, dm

see Figure 44 for test circuit

= 1 kΩ, unless otherwise noted.

L, dm

−65 dB

Rev. A | Page 3 of 24

ADA4927-1/ADA4927-2

V

to V

OCM

Table 2.

Parameter Conditions Min Typ Max Unit

V

DYNAMIC PERFORMANCE

OCM

Small Signal −3 dB Bandwidth V Slew Rate VIN = −1.0 V to +1.0 V, 25% to 75% 1000 V/µs Input Voltage Noise (RTI) f = 100 kHz 15 nV/√Hz

V

INPUT CHARACTERISTICS

OCM

Input Voltage Range ±3.5 V Input Resistance 3.8 5.0 7.5 kΩ Input Offset Voltage V V

CMRR ∆V

OCM

Gain ∆V

General Performance

Table 3.

Parameter Conditions Min Typ Max Unit

POWER SUPPLY

Operating Range 4.5 11.0 V Quiescent Current per Amplifier 20.0 22.1 mA t Powered down 2.4 mA Power Supply Rejection Ratio ∆V

POWER-DOWN (PD)

PD Input Voltage Enabled >3.2 V Turn-Off Time To 0.1% 15 µs Turn-On Time To 0.1% 400 ns PD Pin Bias Current per Amplifier

Enabled Disabled

OPERATING TEMPERATURE RANGE −40 +105 °C

Performance

OUT, cm

= 100 mV p-p 1300 MHz

OUT, cm

OS, cm

OUT, dm

OUT, cm

= V

OUT, cm

/∆V

, V

= V

DIN+

, ∆V

OCM

, ∆V

OCM

to t

MIN

MAX

/∆VS, ∆VS = 1 V −70 −89 dB

OUT, dm

= +VS/2 −10 −2 +5.2 mV

DIN−

= ±1 V −70 −97 dB = ±1 V 0.90 0.97 1.00 V/V

variation ±9.0 µA/°C

Powered down <1.8 V

PD PD

= 5 V = 0 V

−2 +2 µA

−110 −90 µA

Rev. A | Page 4 of 24

ADA4927-1/ADA4927-2

+5 V OPERATION

TA = 25°C, +VS = 5 V, −VS = 0 V, V All specifications refer to single-ended input and differential outputs, unless otherwise noted. Refer to Figure 46 for signal definitions.

±DIN to V

Performance

OUT, dm

Table 4.

Parameter Conditions Min Typ Max Unit

DYNAMIC PERFORMANCE

−3 dB Small Signal Bandwidth V

−3 dB Large Signal Bandwidth V Bandwidth for 0.1 dB Flatness V V Slew Rate V Settling Time to 0.1% V Overdrive Recovery Time VIN = 0 V to 0.15 V step, G = 10 10 ns

NOISE/HARMONIC PERFORMANCE See Figure 45 for distortion test circuit

Second Harmonic V V V Third Harmonic V V V IMD f1 = 70 MHz, f2 = 70.1 MHz, V f Voltage Noise (RTI) f = 100 kHz, G = 28 1.4 nV/√Hz Input Current Noise f = 100 kHz, G = 28 19 pA/√Hz Crosstalk f = 100 MHz, ADA4927-2 −75 dB

INPUT CHARACTERISTICS

Offset Voltage VIP = VIN = V t Input Bias Current −30 −12 +4.0 µA t Input Offset Current −10.5 −0.8 +10.5 µA Input Resistance Differential 14 Ω Common mode 120 kΩ Input Capacitance Differential 0.5 pF Input Common-Mode Voltage Range 1.3 3.7 V CMRR V Open-Loop Transresistance DC 120 185 kΩ

OUTPUT CHARACTERISTICS

Output Voltage Swing Each single-ended output +1.0 +4.0 V Linear Output Current 50 mA p-p Output Balance Error

= 2.5 V, RF = 301 , RG = 301 , RT = 56.2  (when used), R

OCM

= 0.1 V p-p 2000 MHz

OUT, dm

= 2.0 V p-p 1300 MHz

OUT, dm

= 0.1 V p-p, ADA4927-1 150 MHz

OUT, dm

= 0.1 V p-p, ADA4927-2 110 MHz

OUT, dm

= 2 V step, 25% to 75% 4200 V/µs

OUT, dm

= 2 V step 10 ns

OUT, dm

= 2 V p-p, 10 MHz −104 dBc

OUT, dm

= 2 V p-p, 70 MHz −91 dBc

OUT, dm

= 2 V p-p, 100 MHz −86 dBc

OUT, dm

= 2 V p-p, 10 MHz −95 dBc

OUT, dm

= 2 V p-p, 70 MHz −80 dBc

OUT, dm

= 2 V p-p, 100 MHz −76 dBc

OUT, dm

= 2 V p-p −93 dBc

OUT, dm

= 140 MHz, f2 = 140.1 MHz, V

1

= 0 V −1.3 +0.3 +1.3 mV

OCM

to t

MIN

V

variation ±1.5 µV/°C

MAX

to t

variation ±0.12 µA/°C

MAX

/V

, V

OUT, dm

OUT, cm

/V

IN, cm

OUT, dm

= ±1 V −70 −96 dB

IN, cm

, V

OUT, dm

= 1 V, 10 MHz,

= 2 V p-p −84 dBc

OUT, dm

see Figure 44 for test circuit

= 1 kΩ, unless otherwise noted.

L, dm

−65 dB

Rev. A | Page 5 of 24

ADA4927-1/ADA4927-2

V

to V

OCM

Table 5.

Parameter Conditions Min Typ Max Unit

V

DYNAMIC PERFORMANCE

OCM

Small signal −3 dB Bandwidth V Slew Rate VIN = 1.5 V to 3.5 V, 25% to 75% 1000 V/µs Input Voltage Noise (RTI) f = 100 kHz 15 nV/√Hz

V

INPUT CHARACTERISTICS

OCM

Input Voltage Range 1.5 to 3.5 V Input Resistance 3.8 5.0 7.5 kΩ Input Offset Voltage V V

CMRR ∆V

OCM

Gain ∆V

General Performance

Table 6.

Parameter Conditions Min Typ Max Unit

POWER SUPPLY

Operating Range 4.5 11.0 V Quiescent Current per Amplifier 20 21.6 mA t Powered down 0.6 mA Power Supply Rejection Ratio ∆V

POWER-DOWN (PD)

PD Input Voltage Enabled >3.0 V Turn-Off Time 20 s Turn-On Time 500 ns PD Pin Bias Current per Amplifier

Enabled Disabled

OPERATING TEMPERATURE RANGE −40 +105 °C

Performance

OUT, cm

= 100 mV p-p 1300 MHz

OUT, cm

OS, cm

OUT, dm

OUT, cm

= V

OUT, cm

/∆V /∆V

, V

= V

= +VS/2 −5.0 +2.0 +10 mV

DIN−

= ±1 V −70 −100 dB

= ±1 V 0.90 0.97 1.00 V/V

variation ±7.0 µA/°C

/∆VS, ∆VS = 1 V −70 −89 dB

OCM

MIN

DIN+

, ∆V

to t

OUT, dm

OCM

MAX

Powered down <1.7 V

PD PD

= 5 V = 0 V

−2 +2 µA

−105 −95 µA

Rev. A | Page 6 of 24

ADA4927-1/ADA4927-2

ABSOLUTE MAXIMUM RATINGS

Table 7.

Parameter Rating

Supply Voltage 11 V Power Dissipation See Figure 4

Input Currents +IN, −IN,

PD

±5 mA

Storage Temperature Range −65°C to +125°C Operating Temperature Range −40°C to +105°C Lead Temperature (Soldering, 10 sec) 300°C Junction Temperature 150°C

Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.

THERMAL RESISTANCE

θJA is specified for the device (including exposed pad) soldered to a high thermal conductivity 2s2p circuit board, as described in EIA/JESD 51-7.

Table 8.

Package Type θJA Unit

16-Lead LFCSP (Exposed Pad) 87 °C/W 24-Lead LFCSP (Exposed Pad) 47 °C/W

MAXIMUM POWER DISSIPATION

The maximum safe power dissipation in the ADA4927 package is limited by the associated rise in junction temperature (T the die. At approximately 150°C, which is the glass transition temperature, the plastic changes its properties. Even temporarily exceeding this temperature limit can change the stresses that the package exerts on the die, permanently shifting the parametric performance of the ADA4927. Exceeding a junction temperature of 150°C for an extended period can result in changes in the silicon devices, potentially causing failure.

) on

J

The power dissipated in the package (P quiescent power dissipation and the power dissipated in the package due to the load drive. The quiescent power is the voltage between the supply pins (V

) times the quiescent current (IS).

S

The power dissipated due to the load drive depends upon the particular application. The power due to load drive is calculated by multiplying the load current by the associated voltage drop across the device. RMS voltages and currents must be used in these calculations.

Airflow increases heat dissipation, effectively reducing θ addition, more metal directly in contact with the package leads/ exposed pad from metal traces, throughholes, ground, and power planes reduces θ

.

JA

Figure 4 shows the maximum safe power dissipation in the package vs. the ambient temperature for the single 16-lead LFCSP (87°C/W) and the dual 24-lead LFCSP (47°C/W) on a JEDEC standard 4-layer board with the exposed pad soldered to a PCB pad that is connected to a solid plane.

4.5

4.0

3.5

3.0

2.5

2.0

1.5

1.0

MAXIMUM POWER DISSIPATION (W)

0.5

0 –40 –20 0 20 40

AMBIENT TEMPERATURE (°C)

Figure 4. Maximum Power Dissipation vs.

Ambient Temperature for a 4-Layer Board

ADA4927-2

ADA4927-1

ESD CAUTION

) is the sum of the

D

60 80 100

JA

. In

07574-003

Rev. A | Page 7 of 24

ADA4927-1/ADA4927-2

+

–

PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS

S

–V

14

13

15

16

PIN 1 INDICATO R

1–FB

2+IN

ADA4927-1

TOP VIEW

3–IN

(Not to Scale)

4+FB

5

6

S

+V

NOTES

1. CONNECT THE EXPOSED PADDLE TO ANY PLANE BETWEEN AND INCL UDING +V

Figure 5. ADA4927-1 Pin Configuration

12 PD

11 –OUT

10 +OUT

9V

OCM

8

7

S

+V

AND –VS.

S

07574-005

1

–IN1

FB1

2

+V

3

S1

+V

4

S1

FB2

5

+IN2

6

NOTES

1. CONNECT THE EX POSED PADDLE T O ANY PLANE BETWEEN AND INCL UDING +V

Figure 6. ADA4927-2 Pin Configuration

–VS1–VS1–FB1

+IN1

20

21

22

23

24

PIN 1 INDICATOR

ADA4927-2

TOP VIEW

(Not to Scale)

9

7

8

11

10

S2

B2

–IN2

+V

+F

V

PD1

–OUT1

19

+OUT1

18

V

17

OCM1

–V

16

S2

–V

15

S2

14

PD2 –OUT2

13

12

OCM2

+OUT2

AND –VS.

S

7574-006

Table 9. ADA4927-1 Pin Function Descriptions

Pin No. Mnemonic Description

1 −FB

Negative Output for Feedback

Component Connection 2 +IN Positive Input Summing Node 3 −IN Negative Input Summing Node 4 +FB

Positive Output for Feedback

Component Connection 5 to 8 +VS Positive Supply Voltage 9 V

Output Common-Mode Voltage

OCM

10 +OUT Positive Output for Load Connection 11 −OUT Negative Output for Load Connection 12

PD

Power-Down Pin 13 to 16 −VS Negative Supply Voltage

17 (EPAD)

Exposed Pad (EPAD)

Connect the exposed pad to any

plane between and including

and −VS.

+V

S

Table 10. ADA4927-2 Pin Function Descriptions

Pin No. Mnemonic Description

1 −IN1 Negative Input Summing Node 1 2 +FB1 Positive Output Feedback 1 3, 4 +V 5 −FB2 6 +IN2 7 −IN2 8 +FB2 9, 10 +V 11 V 12 +OUT2 13 −OUT2 14

15, 16 −V 17 V

Positive Supply Voltage 1

S1

Negative Output Feedback 2 Positive Input Summing Node 2 Negative Input Summing Node 2 Positive Output Feedback 2

Positive Supply Voltage 2

S2

Output Common-Mode Voltage 2

OCM2

Positive Output 2 Negative Output 2

PD2

Negative Supply Voltage 2

S2

Output Common-Mode Voltage 1

OCM1

Power-Down Pin 2

18 +OUT1 Positive Output 1 19 −OUT1 20

21, 22 −V

PD1

Negative Supply Voltage 1

S1

23 −FB1 24 +IN1 25 (EPAD)

Exposed Pad (EPAD)

Negative Output 1 Power-Down Pin 1

Negative Output Feedback 1 Positive Input Summing Node 1 Connect the exposed pad to any

plane between and including +VS and −VS.

Rev. A | Page 8 of 24

ANALOG DEVICES ADA4927-1, ADA4927-2 Service Manual

Specifications and Main Features

Frequently Asked Questions

User Manual

FEATURES

APPLICATIONS

GENERAL DESCRIPTION

FUNCTIONAL BLOCK DIAGRAMS

TABLE OF CONTENTS

REVISION HISTORY

SPECIFICATIONS

±5 V OPERATION

General Performance

+5 V OPERATION

General Performance

ABSOLUTE MAXIMUM RATINGS

THERMAL RESISTANCE

MAXIMUM POWER DISSIPATION

ESD CAUTION

PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS