ANALOG DEVICES ADA4922-1 Service Manual
High Voltage, Differential
O
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FEATURES
Single-ended-to-differential conversion
Low distortion (V
−99 dBc HD at 100 kHz
Low differential output referred noise: 12 nV/√Hz
High input impedance: 11 MΩ
Fixed gain of 2
No external gain components required
Low output-referred offset voltage: 1.1 mV max
Low input bias current: 3.5 μA max
Wide supply range
5 V to 26 V
Can produce differential output signals in excess of 40 V p-p
High speed
38 MHz, −3 dB bandwidth @ 0.2 V p-p differential output
Fast settling time
200 ns to 0.01% for 12 V step on ±5 V supplies
Disable feature
Available in space-saving, thermally enhanced packages
3 mm × 3 mm LFCSP
8-lead SOIC_EP
Low supply current: I
APPLICATIONS
High voltage data acquisition systems
Industrial instrumentation
Spectrum analysis
ATE
Medical instruments
GENERAL DESCRIPTION
= 40 V p-p)
O, dm
= 10 mA on ±12 V supplies
S
–84
–87
–90
–93
–96
–99
–102
–105
–108
DISTORTION (dBc)
–111
–114
–117
–120
18-Bit ADC Driver
ADA4922-1
FUNCTIONAL BLOCK DIAGRAM
ADA4922-1
1
NC
2
REF
V
3
S+
4
UT+
NC = NO CONNECT
Figure 1.
RL= 2kΩ
VS = ±5V, V
1 10 100
Figure 2. Harmonic Distortion for Various Power Supplies
= 12V p-p
O, dm
FREQUENCY (kHz)
8
IN
7
DIS
6
V
S–
5
OUT–
SECOND HARMONIC
THIRD HARMONIC
VS = ±12V, V
O, dm
05681-001
= 40V p-p
05681-012
The ADA4922-1 is a differential driver for 16-bit to 18-bit
ADCs that have differential input ranges up to ±20 V.
Configured as an easy-to-use, single-ended-to-differential
amplifier, the ADA4922-1 requires no external components to
drive ADCs. The ADA4922-1 provides essential benefits such as
low distortion and high SNR that are required for driving ADCs
with resolutions up to 18 bits.
With a wide supply voltage range (5 V to 26 V), high input
pedance, and fixed differential gain of 2, the ADA4922-1 is
im
designed to drive ADCs found to in a variety of applications,
including industrial instrumentation.
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Anal og Devices for its use, nor for any infringements of patents or ot her
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
The ADA4922-1 is manufactured on ADI’s proprietary secondg
eneration XFCB process that enables the amplifier to achieve
excellent noise and distortion performance on high supply
voltages.
The ADA4922-1 is available in an 8-lead 3 mm × 3 mm LFCSP
as w
ell as an 8-lead SOIC package. Both packages are equipped
with an exposed paddle for more efficient heat transfer. The
ADA4922-1 is rated to work over the extended industrial
temperature range, −40°C to +85°C.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700 www.analog.com
Fax: 781.461.3113 © 2005 Analog Devices, Inc. All rights reserved.
ADA4922-1
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TABLE OF CONTENTS
Features .............................................................................................. 1
Theory of Operation ...................................................................... 14
Applications....................................................................................... 1
Functional Block Diagram .............................................................. 1
General Description......................................................................... 1
Revision History ............................................................................... 2
Specifications..................................................................................... 3
Absolute Maximum Ratings............................................................ 5
Thermal Resistance ...................................................................... 5
ESD Caution.................................................................................. 5
Pin Configuration and Function Descriptions............................. 6
Typical Performance Characteristics............................................. 7
REVISION HISTORY
10/05—Revision 0: Initial Version
Applications..................................................................................... 16
ADA4922-1 Differential Output Noise Model .......................... 16
Using the REF Pin ...................................................................... 16
Internal Feedback Network Power Dissipation...................... 17
Disable Feature........................................................................... 17
Driving a Differential Input ADC............................................ 17
Printed Circuit Board Layout Considerations ....................... 18
Outline Dimensions .......................................................................19
Ordering Guide .......................................................................... 20
Rev. 0 | Page 2 of 20
ADA4922-1
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SPECIFICATIONS
VS = ±12 V, TA = 25°C, RL = 1 kΩ,
Table 1.
Parameter Conditions Min Typ Max Unit
DYNAMIC PERFORMANCE
–3 dB Bandwidth G = +2, VO = 0.2 V p-p, differential 34 38 MHz
G = +2, VO = 40 V p-p, differential 6.5 7.2 MHz
Overdrive Recovery Time VS+ + 0.5 V to VS− − 0.5 V; +Recovery/−Recovery 180/330 ns
Slew Rate V
V
Settling Time to 0.01% V
NOISE/DISTORTION PERFORMANCE
Harmonic Distortion fC = 5 kHz, VO = 40 V p-p, RL = 2 kΩ, HD2/HD3 −116/−109 dBc
f
Differential Output Voltage Noise f = 100 kHz 12 nV/√Hz
Input Current Noise f = 100 kHz 1.4 pA/√Hz
DC PERFORMANCE
Differential Output Offset Voltage 0.35 1.1 mV
Differential Output Offset Voltage Drift 14 μV/°C
Input Bias Current 1.8 3.5 μA
Gain 2 V/V
Gain Error −0.05 %
Gain Error Drift 0.0002 %/°C
INPUT CHARACTERISTICS
Input Resistance 11 MΩ
Input Capacitance 1 pF
Input Voltage Range
OUTPUT CHARACTERISTICS
Output Voltage Swing Each single-ended output, RL = 1 kΩ
DC Output Current 40 mA
Capacitive Load Drive 30% overshoot 20 pF
POWER SUPPLY
Operating Range 5 26 V
Quiescent Current 9.4 10.1 mA
Quiescent Current (Disabled) 1.5 2.0 mA
Power Supply Rejection Ratio (PSRR)
−PSRR −89 −80 dB
+PSRR −91 −83 dB
DISABLE
DIS Input Voltage Threshold
Enabled ≥ −9 V
Turn-Off Time 160 μs
Turn-On Time 78 ns
DIS Bias Current
Enabled
Disabled
= HIGH, CL = 3 pF, unless otherwise noted.
DIS
= 2 V step 260 V/μs
O, dm
= 40 V step 730 V/μs
O, dm
= 40 V step 580 ns
O, dm
= 100 kHz, VO = 40 V p-p, RL = 2 kΩ, HD2/HD3 −99/−100 dBc
C
Disabled ≤ −11 V
= −9 V
DIS
= −11 V
DIS
±10.7
±10.65 ±10.7
114 μA
−125 μA
V
V
Rev. 0 | Page 3 of 20
ADA4922-1
www.BDTIC.com/ADI
VS = ±5 V, TA = 25°C, RL = 1 kΩ,
Table 2.
Parameter Conditions Min Typ Max Unit
DYNAMIC PERFORMANCE
–3 dB Bandwidth G = +2, VO = 0.2 V p-p, differential 36 40.5 MHz
G = +2, VO = 12 V p-p, differential 6.5 13.5 MHz
Overdrive Recovery Time +Recovery/−Recovery 200/670 ns
Slew Rate V
V
Settling Time to 0.01% V
NOISE/DISTORTION PERFORMANCE
Harmonic Distortion fC = 5 kHz, VO = 12 V p-p, RL = 2 kΩ, HD2/HD3 −102/−108 dBc
f
Differential Output Voltage Noise f = 100 kHz 12 nV/√Hz
Input Current Noise f = 100 kHz 1.4 pA/√Hz
DC PERFORMANCE
Differential Output Offset Voltage 0.4 1.2 mV
Differential Output Offset Voltage Drift 12 μV/°C
Input Bias Current 2.0 3.5 μA
Gain 2 V/V
Gain Error −0.05 %
Gain Error Drift 0.0002 %/°C
INPUT CHARACTERISTICS
Input Resistance 11 MΩ
Input Capacitance 1 pF
Input Voltage Range
OUTPUT CHARACTERISTICS
Output Voltage Swing Each single-ended output, RL = 1 kΩ
DC Output Current 40 mA
Capacitive Load Drive 30% overshoot 20 pF
POWER SUPPLY
Operating Range 5 26 V
Quiescent Current 7.0 7.6 mA
Quiescent Current (Disabled) 0.7 1.6 mA
Power Supply Rejection Ratio (PSRR)
−PSRR −93 −82 dB
+PSRR −91 −83 dB
DISABLE
DIS Input Voltage
Enabled ≥ −2 V
Turn-Off Time 160 μs
Turn-On Time 78 ns
DIS Bias Current
Enabled
Disabled
= HIGH, CL = 3 pF, unless otherwise noted.
DIS
= 2 V step 220 V/μs
O, dm
= 12 V step 350 V/μs
O, dm
= 12 V step 200 ns
O, dm
= 100 kHz, VO = 12 V p-p, RL = 2 kΩ, HD2/HD3 −101/−98 dBc
C
Disabled ≤ −4 V
= −2 V
DIS
= −4 V
DIS
±3.6
±3.55 ±3.6
41 μA
49 μA
V
V
Rev. 0 | Page 4 of 20
ADA4922-1
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ABSOLUTE MAXIMUM RATINGS
Table 3.
Parameter Rating
Supply Voltage 26 V
Power Dissipation See Figure 3
Storage Temperature Range –65°C to +125°C
Operating Temperature Range –40°C to +85°C
Lead Temperature Range (Soldering 10 sec) 300°C
Junction Temperature 150°C
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
THERMAL RESISTANCE
θJA is specified for the worst-case conditions, that is, θJA is
specified for a device soldered in the circuit board with its
exposed paddle soldered to a pad on the PCB surface that is
thermally connected to a copper plane, with zero airflow.
Table 4. Thermal Resistance
Package Type θ
8-Lead SOIC with EP on 4-layer board 79 25
8-Lead LFCSP with EP on 4-layer board 81 17
Maximum Power Dissipation
The maximum safe power dissipation in the ADA4922-1
package is limited by the associated rise in junction temperature
(T
) on the die. At approximately 150°C, which is the glass
J
transition temperature, the plastic changes its properties. Even
temporarily exceeding this temperature limit can change the
stresses that the package exerts on the die, permanently shifting
the parametric performance of the ADA4922-1. Exceeding a
junction temperature of 150°C for an extended period can
result in changes in the silicon devices potentially causing
failure.
θ
JA
Unit
JC
°C/W
°C/W
The power dissipated in the package (P
) is the sum of the
D
quiescent power dissipation and the power dissipated in the
package due to the load drive for all outputs. The quiescent
power is the voltage between the supply pins (V
quiescent current (I
). The power dissipated due to the load
S
) times the
S
drive depends upon the particular application. For each output,
the power due to load drive is calculated by multiplying the load
current by the associated voltage drop across the device. The
power dissipated due to all of the loads is equal to the sum of
the power dissipation due to each individual load. RMS voltages
and currents must be used in these calculations.
Airflow increases heat dissipation, effectively reducing θ
JA
. In
addition, more metal directly in contact with the package leads
from metal traces, through holes, ground, and power planes
reduces the θ
. The exposed paddle on the underside of the
JA
package must be soldered to a pad on the PCB surface that is
thermally connected to a copper plane to achieve the specified θ
.
JA
Figure 3 shows the maximum safe power dissipation in the
ckages vs. the ambient temperature for the 8-lead SOIC
pa
(79°C/W) and for the 8-lead LFCSP (81°C/W) on a JEDEC
standard 4-layer board, each with its underside paddle soldered
to a pad that is thermally connected to a PCB plane. θ
values
JA
are approximations.
3.0
2.5
2.0
1.5
1.0
0.5
MAXIMUM POWER DISSIPATION (W)
0
–40 80
Figure 3. Maximum Power Dissipation vs. Temperature for a 4-Layer Board
SOIC
LFCSP
–20 0 20 40 60
AMBIENT TEMPERATURE (°C)
05681-041
ESD CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on
the human body and test equipment and can discharge without detection. Although this product features
proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy
electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance
degradation or loss of functionality.
Rev. 0 | Page 5 of 20
ADA4922-1
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PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
ADA4922-1
1
NC
2
REF
3
V
S+
4
UT+
NC = NO CONNECT
Figure 4. Pin Configuration
8
IN
7
DIS
6
V
S–
5
OUT–
05681-001
Table 5. Pin Function Descriptions
Pin No. Mnemonic Description
1 NC No Internal Connection
2 REF Reference Voltage for Single-Ended Input Signal
3 V
S+
Positive Power Supply
4 OUT+ Noninverting Side of Differential Output
5 OUT− Inverting Side of Differential Output
6 V
7
S−
DIS
Negative Power Supply
Disable
8 IN Single-Ended Signal Input
Rev. 0 | Page 6 of 20
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