Unity-gain stable
Ultralow noise: 1 nV/√Hz, 2.6 pA/√Hz
Ultralow distortion −117 dBc at 1 MHz
High speed
−3 dB bandwidth: 600 MHz (G = +1)
Slew rate: 310 V/μs
Offset voltage: 230 μV maximum
Low input bias current: 100 nA
Wide supply voltage range: 5 V to 12 V
Supply current: 14.7 mA
High performance pinout
Disable mode
APPLICATIONS
Analog-to-digital drivers
Instrumentation
Filters
IF and baseband amplifiers
DAC buffers
Optical electronics
ADA4899-1
CONNECTION DIAGRAMS
ADA4899-1
DISABLE
FEEDBACK
1
2
3
–IN
4
+IN
NC = NO CONNECT
Figure 1. 8-Lead LFCSP_VD (CP-8-2)
ADA4899-1
–V
–IN
+IN
1
2
3
4
S
FEEDBACK
Figure 2. 8-Lead SOIC_N_EP (RD-8-1)
8
+V
7
V
6
NC
5
–V
8
DISABLE
7
+V
6
V
5
–V
OUT
OUT
S
S
S
S
05720-001
05720-002
GENERAL DESCRIPTION
The ADA4899-1 is an ultralow noise (1 nV/√Hz) and distortion
(<−117 dBc @1 MHz) unity-gain stable voltage feedback op
amp, the combination of which makes it ideal for 16-bit and
18-bit systems. The ADA4899-1 features a linear, low noise
input stage and internal compensation that achieves high slew
rates and low noise even at unity gain. The Analog Devices, Inc.
proprietary next-generation XFCB process and innovative
circuit design enable such high performance amplifiers.
The ADA4899-1 drives 100 Ω loads at breakthrough performance
l
evels with only 15 mA of supply current. With the wide supply
voltage range (4.5 V to 12 V), low offset voltage (230 μV maximum), wide bandwidth (600 MHz), and slew rate (310 V/μs),
the ADA4899-1 is designed to work in the most demanding
applications. The ADA4899-1 also features an input bias current
cancellation mode that reduces input bias current by a factor of 60.
The ADA4899-1 is available in a 3 mm × 3 mm LFCSP and an
-lead SOIC package. Both packages feature an exposed metal
8
paddle that improves heat transfer to the ground plane, which is
a significant improvement over traditional plastic packages. The
ADA4899-1 is rated to work over the extended industrial
temperature range, −40°C to +125°C.
40
G = +1
= ±5V
V
S
–50
= 1kΩ
R
L
= 2V p-p
V
OUT
–60
–70
–80
HD3
05720-071
1001010.1
HARMONIC DISTORTION (dBc)
–90
–100
–110
–120
–130
HD2
FREQUENCY (MHz )
Figure 3. Harmonic Distortion vs. Frequency
Rev. B
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Anal og Devices for its use, nor for any infringements of patents or ot her
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
TA = 25°C, G = +1, RL = 1 kΩ to ground, unless otherwise noted.
Table 1.
Parameter Conditions Min Typ Max Unit
DYNAMIC PERFORMANCE
–3 dB Bandwidth V
V
Bandwidth for 0.1 dB Flatness G = +2, V
Slew Rate V
Settling Time to 0.1% V
NOISE/DISTORTION PERFORMANCE
Harmonic Distortion, HD2/HD3 (dBc) fC = 500 kHz, V
f
Input Voltage Noise f = 100 kHz 1.0 nV/√Hz
Input Current Noise
DC PERFORMANCE
Input Offset Voltage 35 230 μV
Input Offset Voltage Drift 5 μV/°C
Input Bias Current
Input Bias Current Drift 3 nA/°C
Input Bias Offset Current 0.05 0.7 μA
Open-Loop Gain 82 85 dB
INPUT CHARACTERISTICS
Input Resistance Differential mode 4 kΩ
Common mode 7.3 MΩ
Input Capacitance 4.4 pF
Input Common-Mode Voltage Range −3.7 to +3.7 V
Common-Mode Rejection Ratio 98 130 dB
DISABLE PIN
DISABLE Input Threshold Voltage
Turn-Off Time
Turn-On Time
Input Bias Current
OUTPUT CHARACTERISTICS
Output Overdrive Recovery Time (Rise/Fall) VIN = −2.5 V to +2.5 V, G = +2 30/50 ns
Output Voltage Swing RL = 1 kΩ −3.65 to +3.65 −3.7 to +3.7 V
R
Short-Circuit Current Sinking/sourcing 160/200 mA
Off Isolation
POWER SUPPLY
Operating Range 4.5 12 V
Quiescent Current 14.7 16.2 mA
Quiescent Current (Disabled)
Positive Power Supply Rejection Ratio +VS = 4 V to 6 V (input referred) 84 90 dB
Negative Power Supply Rejection Ratio −VS = −6 V to −4 V (input referred) 87 93 dB
= 25 mV p-p 600 MHz
OUT
= 2 V p-p 80 MHz
OUT
= 2 V p-p 35 MHz
OUT
= 5 V step 310 V/μs
OUT
= 2 V step 50 ns
OUT
= 2 V p-p −123/−123 dBc
OUT
= 10 MHz, V
C
f = 100 kHz, DISABLE
f = 100 kHz, DISABLE
DISABLE pin floating
DISABLE
pin = +V
= 2 V p-p −80/−86 dBc
OUT
pin floating
pin = +V
S
2.6 pA/√Hz
5.2 pA/√Hz
−6 −12 μA
S
−0.1 −1 μA
Output disabled <2.4 V
50% of DISABLE
VIN = 0.5 V
50% of DISABLE
voltage to 10% of V
voltage to 90% of V
100 ns
,
OUT
40 ns
,
OUT
VIN = 0.5 V
DISABLE
DISABLE
f = 1 MHz, DISABLE
DISABLE
= +VS (enabled)
= −VS (disabled)
= 100 Ω −3.13 to +3.15 −3.25 to +3.25 V
L
= −V
S
= −V
S
17 21 μA
−35 −44 μA
−48 dB
1.8 2.1 mA
Rev. B | Page 3 of 20
ADA4899-1
www.BDTIC.com/ADI
SPECIFICATIONS WITH +5 V SUPPLY
VS = 5 V @ TA = 25°C, G = +1, RL = 1 kΩ to midsupply, unless otherwise noted.
Table 2.
Parameter Conditions Min Typ Max Unit
DYNAMIC PERFORMANCE
–3 dB Bandwidth V
V
Bandwidth for 0.1 dB Flatness G = +2, V
Slew Rate V
Settling Time to 0.1% V
NOISE/DISTORTION PERFORMANCE
Harmonic Distortion, HD2/HD3 (dBc) fC = 500 kHz, V
f
Input Voltage Noise f = 100 kHz 1.0 nV/√Hz
Input Current Noise
DC PERFORMANCE
Input Offset Voltage 5 210 μV
Input Offset Voltage Drift 5 μV/°C
Input Bias Current
Input Bias Offset Current 0.05 μA
Input Bias Offset Current Drift 2.5 nA/°C
Open-Loop Gain 76 80 dB
INPUT CHARACTERISTICS
Input Resistance Differential mode 4 kΩ
Common mode 7.7 MΩ
Input Capacitance 4.4 pF
Input Common-Mode Voltage Range 1.3 to 3.7 V
Common-Mode Rejection Ratio 90 114 dB
DISABLE PIN
DISABLE Input Threshold Voltage
Turn-Off Time
Turn-On Time
Input Bias Current
OUTPUT CHARACTERISTICS
Overdrive Recovery Time (Rise/Fall) VIN = 0 V to 2.5 V, G = +2 50/70 ns
Output Voltage Swing RL = 1 kΩ 1.25 to 3.75 1.2 to 3.8 V
R
Short-Circuit Current Sinking/sourcing 60/80 mA
Off Isolation
POWER SUPPLY
Operating Range 4.5 12 V
Quiescent Current 14.3 16 mA
Quiescent Current (Disabled)
Positive Power Supply Rejection Ratio +VS = 4.5 V to 5.5 V, −VS = 0 V (input referred) 84 90 dB
Negative Power Supply Rejection Ratio +VS = 5 V, −VS = −0.5 V to +0.5 V (input referred) 86 90 dB
= 25 mV p-p 535 MHz
OUT
= 2 V p-p 60 MHz
OUT
= 2 V p-p 25 MHz
OUT
= 2 V step 185 V/μs
OUT
= 2 V step 50 ns
OUT
= 1 V p-p −100/−113 dBc
OUT
= 10 MHz, V
C
f = 100 kHz, DISABLE
f = 100 kHz, DISABLE
DISABLE
DISABLE
pin floating
pin = +V
= 1 V p-p −89/−100 dBc
OUT
pin floating
pin = +V
S
2.6 pA/√Hz
5.2 pA/√Hz
−6 −12 μA
S
−0.2 −1.5 μA
Output disabled <2.4 V
50% of DISABLE
voltage to 10% of V
OUT
,
100 ns
VIN = 0.5 V
50% of DISABLE
voltage to 90% of V
OUT
,
60 ns
VIN = 0.5 V
DISABLE
DISABLE
f = 1 MHz, DISABLE
DISABLE
= +VS (enabled)
= −VS (disabled)
= 100 Ω 1.4 to 3.6 1.35 to 3.65 V
L
= −V
S
= −V
S
16 18 μA
−33 −42 μA
−48 dB
1.5 1.7 mA
Rev. B | Page 4 of 20
ADA4899-1
(
www.BDTIC.com/ADI
ABSOLUTE MAXIMUM RATINGS
Table 3.
Parameter Rating
Supply Voltage 12.6 V
Power Dissipation See Figure 4
Differential Input Voltage ±1.2 V
Differential Input Current ±10 mA
Storage Temperature Range –65°C to +150°C
Operating Temperature Range –40°C to +125°C
Lead Temperature (Soldering 10 sec) 300°C
Junction Temperature 150°C
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
MAXIMUM POWER DISSIPATION
The maximum safe power dissipation in the ADA4899-1
package is limited by the associated rise in junction temperature
(T
) on the die. The plastic encapsulating the die locally reaches
J
the junction temperature. At approximately 150°C, which is the
glass transition temperature, the plastic changes its properties.
Even temporarily exceeding this temperature limit may change
the stresses that the package exerts on the die, permanently
shifting the parametric performance of the ADA4899-1.
Exceeding a junction temperature of 150°C for an extended
period can result in changes in silicon devices, potentially
causing failure.
The still-air thermal properties of the package and PCB (θ
the ambient temperature (T
the package (P
) determine the junction temperature of the die.
D
), and the total power dissipated in
A
The junction temperature is calculated as
T
= TA + (PD × θJA)
J
The power dissipated in the package (P
) is the sum of the
D
quiescent power dissipation and the power dissipated in the
package due to the load drive for all outputs. The quiescent
power is the voltage between the supply pins (V
quiescent current (I
midsupply, the total drive power is V
). Assuming the load (RL) is referenced to
S
/2 × I
S
dissipated in the package and some in the load (V
) times the
S
, some of which is
OUT
OUT
× I
OUT
),
JA
).
The difference between the total drive power and the load
ower is the drive power dissipated in the package.
p
P
= Quiescent Power + (Total Drive Power – Load Power)
D
⎛
()
D
⎜
IVP
SS
⎜
⎝
V
2
⎞
V
OUTS
⎟
×+×=
⎟
R
L
⎠
RMS output voltages should be considered. If R
V
–, as in single-supply operation, the total drive power is VS ×
S
. If the rms signal levels are indeterminate, consider the