ANALOG DEVICES ADA4858-3 Service Manual

Single-Supply, High Speed,

FEATURES

Integrated charge pump

Supply range: 3 V to 5.5 V
Output range: −3.3 V to −1.8 V
50 mA maximum output current for external use at −3 V

High speed amplifiers

−3 dB bandwidth: 600 MHz
Slew rate: 600 V/μs

0.1 dB flatness: 85 MHz

0.1% settling time: 18 ns

Low power

Total quiescent current: 42 mA
Power-down feature

High input common-mode voltage range

−1.8 V to +3.8 V at +5 V supply
Current feedback architecture
Differential gain error: 0.01%
Differential phase error: 0.02°
Available in 16-lead LFCSP

APPLICATIONS

Professional video
Consumer video
Imaging
Active filters

Triple Op Amp with Charge Pump

ADA4858-3

CONNECTION DIAGRAM

ADA4858-3

OUT1

–IN1

+IN1

16 15 14 13

+V

1

S

2C1_a

CHARGE

PUMP

3

C1_b

CPO

4

5678

S

+V

NOTES

1. NC = NO CONNECT .

2. EXPOSED PAD, CONNECT TO GROUND.

Figure 1.

NC

12

+IN2

–IN2

11

10 OUT2

PD

9

–IN3

+IN3

OUT3

7714-001

GENERAL DESCRIPTION

The ADA4858-3 (triple) is a single-supply, high speed current
feedback amplifier with an integrated charge pump that eliminates
the need for negative supplies to output negative voltages or output
a 0 V level for video applications. The 600 MHz, −3 dB bandwidth
and 600 V/μs slew rate make this amplifier well suited for many
high speed applications. In addition, its 0.1 dB flatness out to
85 MHz at G = 2, along with its differential gain and phase errors
of 0.01% and 0.02° into a 150 Ω load, make it well suited for
professional and consumer video applications.

Rev. A

Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.

This triple operational amplifier is designed to operate on
supply voltages of 3.3 V to 5 V, using only 42 mA of total
quiescent current, including the charge pump. To further
reduce the power consumption, it is equipped with a power­down feature that lowers the total supply current to as low as

2.5 mA when the amplifier is not being used. Even in power­down mode, the charge pump can be used to power external
components. The maximum output current for external use is
50 mA at −3 V. The amplifier also has a wide input common­mode voltage range that extends from 1.8 V below ground to

1.2 V below the positive rail at a 5 V supply.

The ADA4858-3 is available in a 16-lead LFCSP, and it is designed
to work over the extended industrial temperature range of

−40°C to +105°C.

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: [phone] www.analog.com
Fax: [phone] ©2008–2009 Analog Devices, Inc. All rights reserved.

ADA4858-3

TABLE OF CONTENTS

Features .............................................................................................. 1

Applications ....................................................................................... 1 

Connection Diagram ....................................................................... 1

General Description ......................................................................... 1

Revision History ............................................................................... 2

Specifications ..................................................................................... 3

Absolute Maximum Ratings ............................................................ 5

Maximum Power Dissipation ..................................................... 5

ESD Caution .................................................................................. 5

Pin Configuration and Function Descriptions ............................. 6

Typical Performance Characteristics ............................................. 7

Theory of Operation ...................................................................... 13

Overview ...................................................................................... 13

Charge Pump Operation ........................................................... 13

Applications Information .............................................................. 14

Gain Configurations .................................................................. 14

DC-Coupled Video Signal ........................................................ 14

Multiple Video Driver ................................................................ 14

DC Restore Function ................................................................. 15

Clamp Amplifier ......................................................................... 15

PD (Power-Down) Pin .............................................................. 16

Power Supply Bypassing ............................................................ 16

Layout .......................................................................................... 16

Outline Dimensions ....................................................................... 17

Ordering Guide .......................................................................... 17

REVISION HISTORY

5/09—Rev. 0 to Rev. A

Changes to Overview Section and Charge Pump Operation

Section .............................................................................................. 13

Changes to Table 5 and Figure 41 ................................................. 14

Added DC Restore Function Section, Figure 43, Clamp

Amplifier Section, and Figure 44 .................................................. 15

10/08—Revision 0: Initial Version

Rev. A | Page 2 of 20

ADA4858-3

SPECIFICATIONS

TA = 25°C, VS = 5 V, G = 2, RF = 301 Ω, RF = 402 Ω for G = 1, RL = 150 Ω, unless otherwise noted.

Table 1.

Parameter Conditions Min Typ Max Unit

DYNAMIC PERFORMANCE

−3 dB Bandwidth V

V
V
V
Bandwidth for 0.1 dB Flatness V
Slew Rate V
Settling Time to 0.1% V

NOISE/DISTORTION PERFORMANCE

Harmonic Distortion (HD2/HD3) fC = 1 MHz, V
f
Crosstalk f = 5 MHz −60 dB
Input Voltage Noise f = 1 MHz 4 nV/√Hz
Input Current Noise f = 1 MHz (+IN/−IN) 2/9 pA/√Hz
Differential Gain Error 0.01 %
Differential Phase Error 0.02 Degrees

DC PERFORMANCE

Input Offset Voltage −14 +0.5 +14 mV
+ Input Bias Current −2 +0.7 +2 μA

− Input Bias Current −13 +8 +13 μA

Open-Loop Transimpedance 300 390 kΩ

INPUT CHARACTERISTICS

Input Resistance +IN1/+IN2 15 MΩ

−IN1/−IN2 90 Ω

Input Capacitance +IN1/+IN2 1.5 pF
Input Common-Mode Voltage Range Typical −1.8 +3.8 V
Common-Mode Rejection Ratio −61 −54 dB

OUTPUT CHARACTERISTICS

Output Voltage Swing −1.4 to +3.6 −1.7 to +3.7 V
Output Overdrive Recovery Time Rise/fall, f = 5 MHz 15 ns
Maximum Linear Output Current @ V

OUT

= 1 V

fC = 1 MHz, HD2 ≤ −50 dBc 21 mA

PEAK

POWER-DOWN

Input Voltage Enabled 1.9 V
Powered down 2 V
Bias Current −0.1 +0.1 μA
Turn-On Time 0.3 μs
Turn-Off Time 1.6 μs

POWER SUPPLY

Operating Range 3 5.5 V
Total Quiescent Current

Amplifiers 15 19 21 mA
Charge Pump 23 mA

Total Quiescent Current When Powered Down

Amplifiers 0.15 0.25 0.3 mA

Charge Pump 4 mA
Positive Power Supply Rejection Ratio −64 −60 dB
Negative Power Supply Rejection Ratio −58 −54 dB
Charge Pump Output Voltage −3.3 −3 −2.5 V
Charge Pump Sink Current 150 mA

= 0.1 V p-p, G = 1 600 MHz

OUT

= 0.1 V p-p 350 MHz

OUT

= 2 V p-p, G = 1 165 MHz

OUT

= 2 V p-p 175 MHz

OUT

= 2 V p-p 85 MHz

OUT

= 2 V step 600 V/μs

OUT

= 2 V step 18 ns

OUT

= 2 V p-p −86/−94 dBc

OUT

= 5 MHz, V

C

Rev. A | Page 3 of 20

= 2 V p-p −71/−84 dBc

OUT

ADA4858-3

TA = 25°C, VS = 3.3 V, G = 2, RF = 301 Ω, RF = 402 Ω for G = 1, RL = 150 Ω, unless otherwise noted.

Table 2.

Parameter Conditions Min Typ Max Unit

DYNAMIC PERFORMANCE

−3 dB Bandwidth V
V
V
V
Bandwidth for 0.1 dB Flatness V
Slew Rate V
Settling Time to 0.1% V

NOISE/DISTORTION PERFORMANCE

Harmonic Distortion (HD2/HD3) fC = 1 MHz, V
f
Crosstalk f = 5 MHz −60 dB
Input Voltage Noise f = 1 MHz 4 nV/√Hz
Input Current Noise f = 1 MHz (+IN/−IN) 2/9 pA/√Hz
Differential Gain Error 0.02 %
Differential Phase Error 0.03 Degrees

DC PERFORMANCE

Input Offset Voltage −14 +0.7 +14 mV
+ Input Bias Current −2 +0.6 +2 μA

− Input Bias Current −13 +7 +13 μA
Open-Loop Transimpedance 300 350 kΩ

INPUT CHARACTERISTICS

Input Resistance +IN1/+IN2 15 MΩ

−IN1/−IN2 90 Ω
Input Capacitance +IN1/+IN2 1.5 pF
Input Common-Mode Voltage Range Typical −0.9 +2.2 V
Common-Mode Rejection Ratio −60 −54 dB

OUTPUT CHARACTERISTICS

Output Voltage Swing −0.6 to +2.1 −0.9 to +2.2 V
Output Overdrive Recovery Time Rise/fall, f = 5 MHz 15 ns
Maximum Linear Output Current @ V

OUT

= 1 V

fC = 1 MHz, HD2 ≤ −50 dBc 20 mA

PEAK

POWER-DOWN

Input Voltage Enabled 1.25 V
Powered down 1.35 V
Bias Current −0.1 +0.1 μA
Turn-On Time 0.3 μs
Turn-Off Time 1.6 μs

POWER SUPPLY

Operating Range 3 5.5 V
Total Quiescent Current

Amplifiers 14 19 20 mA
Charge Pump 21 mA

Total Quiescent Current When Powered Down

Amplifiers 0.15 0.25 0.3 mA

Charge Pump 2 mA
Positive Power Supply Rejection Ratio −63 −60 dB
Negative Power Supply Rejection Ratio −57 −54 dB
Charge Pump Output Voltage −2.1 −2 −1.8 V
Charge Pump Sink Current 45 mA

= 0.1 V p-p, G = 1 540 MHz

OUT

= 0.1 V p-p 340 MHz

OUT

= 2 V p-p, G = 1 140 MHz

OUT

= 2 V p-p 145 MHz

OUT

= 2 V p-p 70 MHz

OUT

= 2 V step 430 V/μs

OUT

= 2 V step 20 ns

OUT

= 2 V p-p −88/−91 dBc

OUT

= 5 MHz, V

C

Rev. A | Page 4 of 20

= 2 V p-p −75/−78 dBc

OUT

ADA4858-3

ABSOLUTE MAXIMUM RATINGS

Table 3.

Parameter Rating

Supply Voltage 6 V

Internal Power Dissipation1

16-Lead LFCSP See Figure 2
Input Voltage (Common Mode) (−VS − 0.2 V) to (+VS − 1.2 V)
Differential Input Voltage ±VS
Output Short-Circuit Duration Observe power derating curves
Storage Temperature Range −65°C to +125°C
Operating Temperature Range −40°C to +105°C
Lead Temperature

300°C

(Soldering, 10 sec)

1

Specification is for device in free air.

Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.

MAXIMUM POWER DISSIPATION

The maximum power that can be safely dissipated by the
ADA4858-3 is limited by the associated rise in junction
temperature. The maximum safe junction temperature for
plastic encapsulated devices is determined by the glass transition
temperature of the plastic, approximately 150°C. Temporarily
exceeding this limit may cause a shift in parametric performance
due to a change in the stresses exerted on the die by the package.
Exceeding a junction temperature of 175°C for an extended
period can result in device failure.

To ensure proper operation, it is necessary to observe the
maximum power derating curves in Figure 2.

2.5

2.0

1.5

1.0

0.5

MAXIMUM POWER DISSIPATION (W)

0

–40 –20 0 20 40 60 80 100

Figure 2. Maximum Power Dissipation vs. Ambient Temperature

AMBIENT TEMP ERATURE (°C)

07714-002

ESD CAUTION

Rev. A | Page 5 of 20

ADA4858-3

A

PIN CONFIGURATION AND FUNCTION DESCRIPTIONS

DA4858-3

TOP VIEW

(Not to Scale)

OUT1

–IN1

+IN1

16 15 14 13

1

+V

S

2C1_a

CHARGE

PUMP

3

C1_b

CPO

4

5678

S

+V

NOTES

1. NC = NO CONNECT .

2. EXPOSED PAD, CONNECT TO GROUND.

Figure 3. Pin Configuration.

Table 4. Pin Function Descriptions

Pin No. Mnemonic Description

1 +VS Positive Supply for Charge Pump.
2 C1_a Charge Pump Capacitor Side a.
3 C1_b Charge Pump Capacitor Side b.
4 CPO Charge Pump Output.
5 +VS Positive Supply.
6 +IN3 Noninverting Input 3.
7 −IN3 Inverting Input 3.
8 OUT3 Output 3.
9 PD Power-Down.
10 OUT2 Output 2.
11 −IN2 Inverting Input 2.
12 +IN2 Noninverting Input 2.
13 NC No Connect.
14 +IN1 Noninverting Input 1.
15 −IN1 Inverting Input 1.
16 OUT1 Output 1.
EPAD Exposed Pad (EPAD) The exposed pad must be connected to ground.

NC

12

+IN2

–IN2

11

10 OUT2

PD

9

–IN3

+IN3

OUT3

07714-003

Rev. A | Page 6 of 20

ADA4858-3

TYPICAL PERFORMANCE CHARACTERISTICS

TA = 25°C, VS = 5 V, G = 2, RF = 301 Ω, RF = 402 Ω for G = 1, RF = 200 Ω for G = 5, RL = 150 Ω, large signal V
small signal V

2

1

0

–1

–2

–3

–4

–5

–6

NORMALIZED CLOSED-LOOP GAIN (dB)

–7

–8

2

1

0

–1

–2

–3

–4

–5

–6

NORMALIZED CLOSED-LOOP GAIN (dB)

–7

–8

2

1

0

–1

–2

–3

–4

–5

–6

NORMALIZED CLOSED-LOOP GAIN (dB)

–7

–8

Figure 6. Small Signal Frequency Response vs. Feedback Resistor

= 0.1 V p-p, unless otherwise noted.

OUT

G = 1

G = 2

G = 5

1 10 100 1000

FREQUENCY (MHz)

Figure 4. Small Signal Frequency Response vs. Gain

VS = 3.3V

G = 1

G = 2

G = 5

1 10 100 1000

FREQUENCY (MHz)

Figure 5. Small Signal Frequency Response vs. Gain

= 301Ω

R

F

= 402Ω

R

F

= 499Ω

R

F

1 10 100 1000

FREQUENCY (MHz)

RF = 200Ω

2

1

0

–1

–2

–3

–4

–5

–6

NORMALIZED CLOSED-LOOP GAIN (dB)

–7

–8

1 10 100 1000

07714-004

Figure 7. Large Signal Frequency Response vs. Gain

2

VS = 3.3V

1

0

–1

–2

–3

–4

–5

–6

NORMALIZED CLOSED-LOOP GAIN (dB)

–7

–8

1 10 100 1000

07714-005

Figure 8. Large Signal Frequency Response vs. Gain

2

1

0

–1

–2

–3

–4

–5

–6

NORMALIZED CLOSED-LOOP GAIN (dB)

–7

–8

1 10 100 1000

07714-006

Figure 9. Large Signal Frequency Response vs. Feedback Resistor

= 2 V p-p, and

OUT

G = 2

G = 5

FREQUENCY (MHz)

G = 2

G = 5

FREQUENCY (MHz)

R

= 402Ω

F

R

= 499Ω

F

FREQUENCY (MHz)

G = 1

G = 1

RF = 200Ω

R

= 301Ω

F

07714-007

07714-008

07714-009

Rev. A | Page 7 of 20

ADA4858-3

–

0.2

0.1

0

–0.1

–0.2

–0.3

–0.4

–0.5

–0.6

NORMALIZED CLOSED-LOOP GAIN (dB)

–0.7

–0.8

1 10 100 1000

= 3.3V

V

S

FREQUENCY (MHz)

VS = 5V

Figure 10. Large Signal 0.1 dB Flatness vs. Supply Voltage

0

–10

–20

–30

–40

–50

–60

DISTORTION (dBc)

–70

–80

–90

–100

110

HD2

HD3

FREQUENCY (MHz )

Figure 11. Harmonic Distortion vs. Frequency

10

07714-010

100

07714-011

0.2

0.1

0

–0.1

–0.2

–0.3

–0.4

–0.5

–0.6

NORMALIZED CLOSED-LOOP GAIN (dB)

–0.7

–0.8

1 10 100 1000

FREQUENCY (MHz)

R

F

= 301Ω

RF = 200Ω

Figure 13. Large Signal 0.1 dB Flatness vs. Feedback Resistor

0

–10

–20

–30

–40

–50

–60

DISTORTION (dBc)

–70

–80

–90

–100

110

HD2

HD3

FREQUENCY (MHz )

Figure 14. Harmonic Distortion vs. Frequency, VS = 3.3 V

10

07714-013

100

07714-014

0

–10

–20

–30

PSRR (dB)

–40

–50

–60

–70

0.1 1 10010 400

FREQUENCY (MHz )

Figure 12. Power Supply Rejection Ratio (PSRR) vs. Frequency

07714-012

Rev. A | Page 8 of 20

–20

–30

–40

CMRR (dB)

–50

–60

–70

0.1 1 10010 400

FREQUENCY (MHz )

Figure 15. Common-Mode Rejection Ratio (CMRR) vs. Frequency

07714-015

ADA4858-3

–

–

30

20

–40

–50

–60

–70

–80

FORWARD ISOLATIO N (dB)

–90

–100

0.1 1 10010 400

FREQUENCY (MHz )

Figure 16. Forward Isolation vs. Frequency

0.15
V

= 200mV p-p

OUT

0.10

0.05

0

–0.05

OUTPUT VOLTAGE (V)

–0.10

–0.15

TIME (5ns/DIV)

= 5V

V

S

VS = 3.3V

Figure 17. Small Signal Transient Response vs. Supply Voltage

0.15
G = 1

V

= 200mV p-p

OUT

0.10

0.05

–30

–40

–50

–60

CROSSTALK (dB)

–70

–80

–90

0.1 1 10010 400

07714-016

FREQUENCY (MHz )

07714-019

Figure 19. Crosstalk vs. Frequency

1.5

1.0

0.5

= 5V (V)

S

0

–0.5

OUTPUT VO LTAGE, V

–1.0

–1.5

07714-017

Figure 20. Large Signal Transient Response vs. Supply Voltage

V

S

TIME (5ns/DIV)

VS = 3.3V

= 5V

2.0

1.5

1.0

0.5

0

–0.5

–1.0

= 3.3V (V)

S

OUTPUT VO LTAGE, V

07714-020

1.5
CL = 4pF

C

= 10pF

L

1.0

0.5

CL = 6pF

0

–0.05

OUTPUT VOLTAGE (V)

–0.10

–0.15

C

= 10pF

L

TIME (5ns/DIV)

C

= 4pF

L

CL = 6pF

Figure 18. Small Signal Transient Response vs. Capacitive Load

07714-018

0

–0.5

OUTPUT VOLTAGE (V)

–1.0

G = 1

–1.5

TIME (5ns/DIV)

Figure 21. Large Signal Transient Response vs. Capacitive Load

07714-021

Rev. A | Page 9 of 20

ADA4858-3

0.15

0.10

0.05

C

L

= 10pF

CL = 4pF

C

= 6pF

L

1.5

1.0

0.5

C

L

= 10pF

CL = 14pF

C

= 16pF

L

0

–0.05

OUTPUT VOLTAGE (V)

–0.10

V

= 200mV p-p

OUT

–0.15

TIME (5ns/DIV)

Figure 22. Small Signal Transient Response vs. Capacitive Load

2.0

1.6

1.2

0.8

0.4

0

–0.4

AMPLITUDE ( V)

–0.8

–1.2

–1.6

–2.0

–5 4035302520151050

TIME (ns)

OUTPUT

INPUT

ERROR

Figure 23. Settling Time (Rise)

5

V

4

3

2

1

0

OUTPUT VOLTAGE (V)

–1

–2

–3

IN

V

OUT

TIME (20n s/DIV)

Figure 24. Output Overdrive Recovery

0.5

0.4

0.3

0.2

0.1

0

–0.1

–0.2

–0.3

–0.4

–0.5

2.5

2.0

1.5

1.0

0.5

0

–0.5

–1.0

–1.5

0

–0.5

OUTPUT VOLTAGE (V)

–1.0

–1.5

07714-022

TIME (5ns/DIV)

07714-025

Figure 25. Large Signal Transient Response vs. Capacitive Load

2.0

1.6

1.2

0.8

0.4

0

ERROR (%)

07714-023

–0.4

AMPLITUDE (V)

–0.8

–1.2

–1.6

–2.0

–5 4035302520151050

ERROR

INPUT

OUTPUT

TIME (ns)

0.5

0.4

0.3

0.2

0.1

0

–0.1

–0.2

–0.3

–0.4

–0.5

ERROR (%)

07714-026

Figure 26. Settling Time (Fall)

3.0

2.5

2.0

1.5

1.0

0.5

0

INPUT VOLTAGE (V)

07714-024

–0.5

OUTPUT VOLTAGE (V)

–1.0

–1.5

–2.0

V

IN

V

OUT

TIME (20n s/DIV)

VS = 3.3V

1.5

1.0

0.5

0

INPUT VOLTAGE (V)

–0.5

–1.0

07714-027

Figure 27. Output Overdrive Recovery, VS = 3.3 V

Rev. A | Page 10 of 20

ADA4858-3

1000

900

800

700

600

500

400

SLEW RATE (V/ µs)

300

200

100

0

0 0.5 1.0 1.5 2.0 2.5

OUTPUT VO LTAGE (V p-p)

RISE, G = 2

RISE, G = 1

FALL, G = 2

FALL, G = 1

Figure 28. Slew Rate vs. Output Voltage

0

–0.4

–0.8

–1.2

–1.6

CHARGE

PUMP CURRENT

AMPLIFIER

CURRENT

07714-028

24

22

20

18

16

1000

VS = 3.3V

900

800

700

600

500

400

SLEW RATE (V/µ s)

300

200

100

0

0 0.5 1.0 1.5 2.0 2.5

OUTPUT VOLTAGE (V p-p)

RISE, G = 2

RISE, G = 1

FALL, G = 2

FALL, G = 1

Figure 31. Slew Rate vs. Output Voltage, VS = 3.3 V

1.5

V

PD

1.0

0.5

0

V

OUT

07714-031

6

5

4

3

–2.0

–2.4

OUTPUT

–2.8

CHARGE PUMP OUTPUT VOLT AGE (V)

–3.2

2.5 5.04.54.03.53.0

CHARGE PUMP SUPPLY VOLTAGE (V)

VOLTAGE

Figure 29. Charge Pump Output Voltage and Current vs.

Charge Pump Supply Voltage

20

18

16

14

12

10

8

6

4

INPUT VOLTAGE NOISE (nV/ Hz)

2

0

100 1k 10k 100k 1M

FREQUENCY (Hz)

Figure 30. Input Voltage Noise vs. Frequency

14

CURRENT (mA)

12

10

8

07714-029

–0.5

OUTPUT VOLTAGE (V)

–1.0

–1.5

TIME (400ns/DIV)

2

POWER-DOWN VOLTAGE (V)

1

0

07714-032

Figure 32. Enable/Power-Down Time

100

90

80

70

60

50

40

30

20

INPUT CURRENT NOI SE (pA/ Hz)

10

0

100 1k 10k 100k 1M

07714-030

FREQUENCY (Hz)

–IN

+IN

07714-033

Figure 33. Input Current Noise vs. Frequency

Rev. A | Page 11 of 20

ADA4858-3

–

–

100

–105

–110

–115

–120

–125

–130

POWER (dBm)

–135

–140

–145

–150

0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0

CHARGE PUMP HARMONICS

FREQUENCY (MHz )

7714-201

Figure 34. Output Spectrum vs. Frequency

100

–105

–110

–115

–120

–125

–130

POWER (dBm)

–135

–140

–145

–150

0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0

CHARGE PUMP HARMONI CS

FREQUENCY (MHz )

Figure 35. Output Spectrum vs. Frequency, VS = 3.3 V

V

= 3.3V

S

07714-202

Rev. A | Page 12 of 20

ADA4858-3

Φ

Φ

THEORY OF OPERATION

2

OVERVIEW

The ADA4858-3 is a current feedback amplifier designed for
exceptional performance as a triple amplifier with a variable
gain capability. Its specifications make it especially suitable
for SD and HD video applications. The ADA4858-3 provides
HD video output on a single supply as low as 3.0 V while only
consuming 13 mA per amplifier. It also features a power-down
pin (PD) that reduces the total quiescent current to 2 mA when
activated.

The ADA4858-3 can be used in applications that require both
ac- and dc-coupled inputs and outputs. The output stage on the
ADA4858-3 is capable of driving 2 V p-p video signals into two
doubly terminated video loads (150 Ω each) on a single 5 V supply.
The input range of the ADA4858-3 includes ground, and the
output range is limited by the output headroom set by the voltage
drop across the two diodes from each rail, which occurs 1.2 V
from the positive supply and the charge pump negative supply rails.

CHARGE PUMP OPERATION

The on-board charge pump creates a negative supply for the
amplifier. It provides different negative voltages depending on
the power supply voltage. For a +5 V supply, the negative supply
generated is equal to −3 V with 150 mA of output supply current,
and for a +3.3 V supply, the negative supply is equal to −2 V
with 45 mA of output supply current.

Figure 36 shows the charging cycle when the supply voltage +V
charges C1 through Φ
charges to reach the +V
with switching Φ
When C1 = C2, the charge in C1 is divided between the two
capacitors and slowly increases the voltage in C2 until it reaches
a predetermined voltage (−3 V for +5 V supply and −2 V for
+3.3 V supply). The typical charge pump charging and discharging
frequency is 550 kHz with a 150 Ω load and no input signal;
however, this frequency changes with different loads and supply
conditions.

to ground. During this cycle, C1 quickly

1

voltage. The discharge cycle then begins

S

off and switching Φ2 on, as shown in Figure 37.

1

1

+V

S

CPO

C2

Figure 36. C1 Charging Cycle

a

C1

Φ

b

1

07714-137

+V

S

CPO

C2

Figure 37. C1 Discharging Cycle

The ADA4858-3 specifications make it especially suitable for SD
and HD video applications. It also allows dc-coupled video signals
with its black level set to 0 V and its sync tip at −300 mV for
YPbPr video.

The charge pump is always on, even when the power-down pin
(PD) is enabled and the amplifiers are off. However, if a negative
current is not used, the charge pump is in an idle state. Each
amplifier needs −6.3 mA of current, which totals −19 mA for all
three amplifiers. This means additional negative current may be
available by the charge pump for external use. Pin 4 (CPO) is
the charge pump output that provides access to the negative
supply generated by the charge pump.

If the negative supply is used to power another device in the
system, it is only possible for the 5 V supply operation. In the

3.3 V supply operation, the charge pump output current is very
limited. The capacitor C2 placed at the CPO pin, which
regulates the ripple of the negative voltage, can be used as a
coupling capacitor for the external device. However, the charge
pump current should be limited to a maximum of 50 mA for

S

external use. When powering down the ADA4858-3, the charge
pump is not affected and its output voltage and current are still
available for external use.

It is recommended to use 1 μF low ESR and low ESL capacitors
for C1 and C2. These capactiors should be placed very close to
the part. C1 should be placed between Pin C1_a and Pin C1_b,
and C2 should be placed between Pin CPO and ground. If the
charge pump ripple at the CPO pin is too high, larger capacitors
(that is, 4.7 μF) can replace the 1 μF at C1 and C2.

a

C1

Φ

b

2

07714-138

Rev. A | Page 13 of 20

ADA4858-3

V

T

V

V

V

T

V

APPLICATIONS INFORMATION

GAIN CONFIGURATIONS

The ADA4858-3 is a single-supply, high speed, voltage feedback
amplifier. Tab l e 5 provides a convenient reference for quickly
determining the feedback and gain set resistor values and band­width for common gain configurations.

Table 5. Recommended Values and Frequency Performance

Small Signal

Gain RF (Ω) RG (Ω)

−3 dB BW (MHz)

1 402 N/A 600 88
2 301 301 350 85
5 200 40 160 35

1

Conditions: VS = 5 V, TA = 25°C, RL = 150 Ω.

Large Signal 0.1 dB
Flatness (MHz)

The choice of R
maximum flatness vs. power dissipation trade-off. In this case, the
flatness is over 90 MHz, which is more than the high definition
video requirement.

1

and RG should be carefully considered for

F

5

C1

10µF

IN

R1

75Ω

+

ADA4858-3

U1

C2

0.1µF

R4

75Ω

–

R5
75Ω

V

OU

Figure 38 and Figure 39 show the typical noninverting and
inverting configurations and the recommended bypass
capacitor values.

10µF

+V

S

IN

+

ADA4858-3

0.1µF

V

OU

–

R

F

R

G

07714-139

Figure 38. Noninverting Gain Configuration

R

F

R

G

IN

–

ADA4858-3

10µF

+V

S

0.1µF

V

OUT

+

07714-140

Figure 39. Inverting Gain Configuration

DC-COUPLED VIDEO SIGNAL

The ADA4858-3 does not have a rail-to-rail output stage. The
output can be within 1 V of the rails. Having a charge pump on
board that can provide −3 V on a +5 V supply and −2 V on
+3.3 V supply makes this part excellent for video applications. In
dc-coupled applications, the black color has a 0 V voltage reference.
This means that the output voltage should be able to reach 0 V,
which is feasible with the presence of the charge pump. Figure 40
shows the schematic of a dc-coupled, single-supply application.
It is similar to the dual-supply application in which the input is
properly terminated with a 50 Ω resistor to ground. The amplifier
itself is set at a gain of 2 to account for the input termination loss.

249Ω

R2

249Ω

–V

S

07714-141

R3

Figure 40. DC-Coupled, Single-Supply Schematic

MULTIPLE VIDEO DRIVER

In applications requiring that multiple video loads be driven
simultaneously, the ADA4858-3 can deliver 5 V supply operation.
Figure 41 shows the ADA4858-3 configured with two video
loads, and Figure 42 shows the two video load performances.

R

F

301Ω

10µF

+V

S

R

G

301Ω

75Ω

CABLE

IN

–

ADA4858-3

+

75Ω

Figure 41. Video Driver Schematic for Two Video Loads

6.5

6.0

5.5

5.0

4.5

4.0

CLOSED-LOOP GAIN (dB)

3.5

= 5V

V

S

R

= 301Ω

F

3.0
G = 2

V

= 2V p-p

OUT

2.5

1 10 100 1000

Figure 42. Large Signal Frequency Response for Various Loads

0.1µF

RL = 75Ω

FREQUENCY (MHz )

75Ω

75Ω

RL = 150Ω

75Ω

CABLE

75Ω

CABLE

75Ω

75Ω

V

1

OUT

V

2

OUT

7714-142

07714-040

Rev. A | Page 14 of 20

ADA4858-3

A

V

V

R

G

B

H

220µ

220µA

220µA

ADCMP371AKSZ

200kΩ

0.1µF

+5V

4.7nF

75Ω

V1

74AC86

V2

74AC86

2.8kΩ7.15kΩ

V3

74AC86

NTA4153

4.7nF

75Ω

NTA4153

4.7nF

75Ω

NTA4153

ADA4858-3

Figure 43. AC-Coupled Video Input with DC Restored Output

301Ω

301Ω

301Ω

U1

U2

U3

301Ω

301Ω

301Ω

75Ω

75Ω

75Ω

R

G

B

07714-100

DC RESTORE FUNCTION

Having a charge pump gives the ability to take an ac-coupled
input signal and restore its dc 0 V reference. The simplest way
of accomplishing this is to use the blanking interval and the H­sync signal to set the 0 V reference. Use the H-sync to sample the
dc level during the blanking interval to charge a capacitor and
hold the charge during the video signal. Figure 43 shows the
schematic of the dc restored circuit.

The H-sync coming out of the video source can be either positive
or negative. This is why a polarity correction circuit is used to
produce only a positive going H-sync. The H-sync is fed to a
comparator that produces a high voltage if H-sync is negative and
a low voltage if the H-sync is positive. The H-sync is then fed to
an XOR with the output of the comparator. If the original H-sync
was negative, the output of the XOR is positive because of the
logic high coming from the comparator, causing the XOR to act
as an inverter. However, if the original H-sync is positive, it stays
the same because the output of the comparator is low and the
XOR acts as a buffer.

The result is a positive going H-sync triggering the MOSFET
during the blanking interval. This shorts the 4.7 nF capacitor to
ground, which causes it to charge up by the dc level of the current
signal. When the H-sync goes low, the MOSFET opens and the
capacitor holds the charge during the video signal, making the
output signal referenced to ground or 0 V level.

CLAMP AMPLIFIER

In some applications, a current output DAC driving a resistor
may not have a negative supply available. In such case, the YPbPr
video signal may be shifted up by 300 mV to avoid clamping the
sync tip. These applications require a signal dc clamp on the output
of the video driver to restore the dc level to 0 V reference. The
ADA4858-3 has a charge pump that allows the output to swing
negative; twice the sync tip (−600 mV) in G = 2 configuration.

Figure 44 shows the ADA4858-3 in a difference amplifier
configuration. The video signal is connected to the noninverting
side, and a dc bias of 600 mV is injected on the inverting side.

= 5

CC

DAC1

DAC2

DAC3

44.2kΩ

6.02kΩ

V

R10

R11

CC

Y

Pb

Pr

= 5V

ADA4860-1

VCC = 5V

V1

R7

75Ω

R2

301Ω

R8

75Ω

R4

301Ω

R9

75Ω

R6

301Ω

C1

0.1µFC210µF

Figure 44. Clamp Amp

U1

= 5V

V

CC

U2

= 5V

V

CC

U3

ADA4858-3

R1

301Ω

R3

301Ω

R5

301Ω

R12
75Ω

R13
75Ω

R14
75Ω

Y

Pb

Pr

07714-101

Rev. A | Page 15 of 20

ADA4858-3

PD (POWER-DOWN) PIN

The ADA4858-3 is equipped with a PD (power-down) pin for
all three amplifiers. This allows the user to reduce the quiescent
supply current when an amplifier is not active. The power­down threshold levels are derived from ground level. The
amplifiers are powered down when the voltage applied to the
PD pin is greater than a certain voltage from ground. In a 5 V
supply application, the voltage is greater than 2 V, and in a 3.3 V
supply application, the voltage is greater than 1.5 V. The amplifier
is enabled whenever the PD pin is left floating (not connected).
If the PD pin is not used, it is best to leave it floating or connected
to ground. Note that the power-down feature does not control the
charge pump output voltage and current.

Table 6. Power-Down Voltage Control

PD Pin 5 V 3.3 V

Not Active <1.5 V <1 V
Active >2 V >1.5 V

POWER SUPPLY BYPASSING

Careful attention must be paid to bypassing the power supply
pins of the ADA4858-3. High quality capacitors with low
equivalent series resistance (ESR), such as multilayer ceramic
capacitors (MLCCs), should be used to minimize supply
voltage ripple and power dissipation. A large, usually tantalum,
capacitor between 2.2 μF to 47 μF located in proximity to the
ADA4858-3 is required to provide good decoupling for lower
frequency signals. The actual value is determined by the circuit
transient and frequency requirements. In addition, place 0.1 μF
MLCC decoupling capacitors as close to each of the power
supply pins and across from both supplies as is physically
possible, no more than 1/8 inch away. The ground returns
should terminate immediately into the ground plane. Placing
the bypass capacitor return close to the load return minimizes
ground loops and improves performance.

LAYOUT

As is the case with all high speed applications, careful attention
to printed circuit board (PCB) layout details prevents associated
board parasitics from becoming problematic. The ADA4858-3 can
operate at up to 600 MHz; therefore, proper RF design techniques
must be employed. The PCB should have a ground plane covering
all unused portions of the component side of the board to provide a
low impedance return path. Removing the ground plane on all
layers from the area near and under the input and output pins
reduces stray capacitance. Keep signal lines connecting the
feedback and gain resistors as short as possible to minimize the
inductance and stray capacitance associated with these traces. Place
termination resistors and loads as close as possible to their
respective inputs and outputs. Keep input and output traces as
far apart as possible to minimize coupling (crosstalk) through the
board. Adherence to microstrip or stripline design techniques for
long signal traces (greater than 1 inch) is recommended. For
more information on high speed board layout, see “A Practical
Guide to High-Speed Printed-Circuit-Board Layout,” Analog
Dialogue, Volume 39, Number 3, September 2005 at

www.analog.com.

Rev. A | Page 16 of 20

ADA4858-3

OUTLINE DIMENSIONS

PIN 1

INDICATOR

1.00

0.85

0.80

12° MAX

SEATING
PLANE

4.00

BSC SQ

TOP

VIEW

0.80 MAX

0.65 TYP

0.35

0.30

0.25

3.75

BSC SQ

0.20 REF

0.60 MAX

0.65 BSC

0.05 MAX

0.02 NOM

COPLANARITY

0.75

0.60

0.50

0.08

0.60 MAX

(BOTTO M VIEW )

16

13

12

9

8

5

1.95 BSC

FOR PROPER CO NNECTION O F
THE EXPOSED PAD, REFER TO
THE PIN CONF IGURATIO N AND
FUNCTION DES CRIPTIONS
SECTION O F THIS DAT A SHEET.

PIN 1
INDICATOR

1

4

5

2

.

2

0

1

.

2

9

.

1

5

0.25 MIN

Q

S

COMPLIANT TO JEDEC STANDARDS MO-220-VGGC

072808-A

Figure 45.16-Lead Lead Frame Chip Scale Package [LFCSP_VQ]

4 mm × 4 mm Body, Very Thin Quad

(CP-16-4)

Dimensions shown in millimeters

ORDERING GUIDE

Model Temperature Range Package Description Package Option Ordering Quantity

ADA4858-3ACPZ-R21 –40°C to +105°C 16-Lead LFCSP_VQ CP-16-4 250
ADA4858-3ACPZ-R71 –40°C to +105°C 16-Lead LFCSP_VQ CP-16-4 1,500
ADA4858-3ACPZ-RL1 –40°C to +105°C 16-Lead LFCSP_VQ CP-16-4 5,000

1

Z = RoHS Compliant Part.

Rev. A | Page 17 of 20

ADA4858-3

NOTES

Rev. A | Page 18 of 20

ADA4858-3

NOTES

Rev. A | Page 19 of 20

ADA4858-3

NOTES

©2008–2009 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D07714-0-5/09(A)

Rev. A | Page 20 of 20