ANALOG DEVICES ADA4857-2 Service Manual
Ultralow Distortion, Low Power,
A
–V
A
–V
A
www.BDTIC.com/ADI
FEATURES
High speed
850 MHz, −3 dB bandwidth (G = +1, R
750 MHz, −3 dB bandwidth (G = +1, R
2800 V/μs slew rate
Low distortion: −88 dBc @ 10 MHz (G = +1, R
Low power: 5 mA/amplifier @ 10 V
Low noise: 4.4 nV/√Hz
Wide supply voltage range: 5 V to 10 V
Power-down feature
Available in 3 mm × 3 mm 8-lead LFCSP (single), 8-lead SOIC
(single), and 4 mm × 4 mm 16-lead LFCSP (dual)
APPLICATIONS
Instrumentation
IF and baseband amplifiers
Active filters
ADC drivers
DAC buffers
= 1 kΩ, LFCSP)
L
= 1 kΩ, SOIC)
L
= 1 kΩ)
L
Low Noise, High Speed Op Amp
ADA4857-1/ADA4857-2
CONNECTION DIAGRAMS
DA4857-1
TOP VIEW
(Not to Scale)
1PD
2FB
3–IN
4+IN
NC = NO CONNECT
Figure 1. 8-Lead LFCSP (CP)
DA4857-1
TOP VIEW
(Not to Scale)
1
FB
–IN
2
+IN
3
4
S
NC = NO CONNECT
Figure 2. 8-Lead SOIC (R)
DA4857-2
TOP VIEW
(Not to Scale)
FB1
PD1
16
15
8+V
S
7OUT
6NC
5–V
S
07040-001
8
PD
+V
7
S
OUT
6
NC
5
07040-002
S1
OUT1
+V
14
13
GENERAL DESCRIPTION
The ADA4857 is a unity-gain stable, high speed, voltage feedback
amplifier with low distortion, low noise, and high slew rate. With a
spurious-free dynamic range (SFDR) of −88 dBc @ 10 MHz, the
ADA4857 is an ideal solution for a variety of applications, including
ultrasounds, ATE, active filters, and ADC drivers. The Analog
Devices, Inc., proprietary next-generation XFCB process and
innovative architecture enables such high performance amplifiers.
Rev. A
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
1–IN1
2+IN1
3NC
4
S2
5
6
S2
+V
OUT2
NC = NO CONNECT
Figure 3. 16-Lead LFCSP (CP)
12 –V
S1
11 NC
10 +IN2
9–IN2
8
7
FB2
PD2
07040-003
The ADA4857 has 850 MHz bandwidth, 2800 V/μs slew rate, and
settles to 0.1% in 15 ns. With a wide supply voltage range (5 V to
10 V), the ADA4857 is an ideal candidate for systems that require
high dynamic range, precision, and speed.
The ADA4857-1 amplifier is available in a 3 mm × 3 mm, 8-lead
LFCSP and a standard 8-lead SOIC. The ADA4857-2 is available in
a 4 mm × 4 mm, 16-lead LFCSP. The LFCSP features an exposed
paddle that provides a low thermal resistance path to the printed
circuit board (PCB). This path enables more efficient heat transfer
and increases reliability. The ADA4857 works over the extended
industrial temperature range (−40°C to +125°C).
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700 www.analog.com
Fax: 781.461.3113 ©2008 Analog Devices, Inc. All rights reserved.
ADA4857-1/ADA4857-2
www.BDTIC.com/ADI
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications ....................................................................................... 1
Connection Diagrams ...................................................................... 1
General Description ......................................................................... 1
Revision History ............................................................................... 2
Specifications ..................................................................................... 3
±5 V Supply ................................................................................... 3
+5 V Supply ................................................................................... 4
Absolute Maximum Ratings ............................................................ 6
Thermal Resistance ...................................................................... 6
Maximum Power Dissipation ..................................................... 6
ESD Caution .................................................................................. 6
Pin Configurations and Function Descriptions ........................... 7
Typical Performance Characteristics ............................................. 9
Test Circuits ..................................................................................... 15
Applications Information .............................................................. 16
Power-Down Operation ............................................................ 16
Capacitive Load Considerations .............................................. 16
Recommended Values for Various Gains ................................ 16
Active Low-Pass Filter (LPF) .................................................... 17
Noise ............................................................................................ 18
Circuit Considerations .............................................................. 18
PCB Layout ................................................................................. 18
Power Supply Bypassing ............................................................ 18
Grounding ................................................................................... 18
Outline Dimensions ....................................................................... 19
Ordering Guide .......................................................................... 20
REVISION HISTORY
11/08—Rev. 0 to Rev. A
Changes to Table 5 ............................................................................ 7
Changes to Table 7 ............................................................................ 8
Changes to Figure 32 ...................................................................... 13
Added Figure 44; Renumbered Sequentially .............................. 15
Changes to Layout .......................................................................... 15
Changes to Table 8 .......................................................................... 16
Added Active Low-Pass Filter (LFP) Section .............................. 17
Added Figure 48 and Figure 49; Renumbered Sequentially ..... 17
Changes to Grounding Section ..................................................... 18
Exposed Paddle Notation Added to Outline Dimensions ........ 19
Changes to Ordering Guide .......................................................... 20
5/08—Revision 0: Initial Version
Rev. A | Page 2 of 20
ADA4857-1/ADA4857-2
www.BDTIC.com/ADI
SPECIFICATIONS
±5 V SUPPLY
TA = 25°C, G = +2, RG = RF = 499 Ω, RL = 1 kΩ to ground, PD = no connect, unless otherwise noted.
Table 1.
Parameter Conditions Min Typ Max Unit
DYNAMIC PERFORMANCE
–3 dB Bandwidth (LFCSP/SOIC) G = +1, V
G = +1, V
G = +2, V
Full Power Bandwidth G = +1, V
Bandwidth for 0.1 dB Flatness (LFCSP/SOIC) G = +2, V
Slew Rate (10% to 90%) G = +1, V
Settling Time to 0.1% G = +2, V
NOISE/HARMONIC PERFORMANCE
Harmonic Distortion f = 1 MHz, G = +1, V
f = 1 MHz, G = +1, V
f = 10 MHz, G = +1, V
f = 10 MHz, G = +1, V
f = 50 MHz, G = +1, V
f = 50 MHz, G = +1, V
Input Voltage Noise f = 100 kHz 4.4 nV/√Hz
Input Current Noise f = 100 kHz 1.5 pA/√Hz
DC PERFORMANCE
Input Offset Voltage ±2 ±4.5 mV
Input Offset Voltage Drift 2.3 μV/°C
Input Bias Current
−2 −3.3 μA
Input Bias Current Drift 24.5 nA/°C
Input Bias Offset Current 50 nA
Open-Loop Gain V
OUT
PD (POWER-DOWN) PIN
PD Input Voltage Chip powered down ≥(VCC − 2) V
Chip enabled ≤(VCC − 4.2) V
Turn-Off Time 50% off PD to <10% of final V
Turn-On Time 50% off PD to <10% of final V
PD Pin Leakage Current Chip enabled 58 μA
Chip powered down 80 μA
INPUT CHARACTERISTICS
Input Resistance Common mode 8 MΩ
Differential mode 4 MΩ
Input Capacitance Common mode 2 pF
Input Common-Mode Voltage Range ±4 V
Common-Mode Rejection Ratio VCM = ±1 V −78 −86 dB
OUTPUT CHARACTERISTICS
Output Overdrive Recovery Time VIN = ±2.5 V, G = +2 10 ns
Output Voltage Swing RL = 1 kΩ ±4 V
R
= 100 Ω ±3.7 V
L
Output Current 50 mA
Short-Circuit Current Sinking and sourcing 125 mA
Capacitive Load Drive 30% overshoot, G = +2 10 pF
= 0.2 V p-p 650 850/750 MHz
OUT
= 2 V p-p 600/550 MHz
OUT
= 0.2 V p-p 400/350 MHz
OUT
= 2 V p-p, THD < −40 dBc 110 MHz
OUT
= 2 V p-p, RL = 150 Ω 75/90 MHz
OUT
= 4 V step 2800 V/μs
OUT
= 2 V step 15 ns
OUT
= 2 V p-p (HD2) −108 dBc
OUT
= 2 V p-p (HD3) −108 dBc
OUT
= 2 V p-p (HD2) −88 dBc
OUT
= 2 V p-p (HD3) −93 dBc
OUT
= 2 V p-p (HD2) −65 dBc
OUT
= 2 V p-p (HD3) −62 dBc
OUT
= −2.5 V to +2.5 V 57 dB
, VIN = 1 V, G = +2 55 μs
OUT
, VIN = 1 V, G = +2 33 ns
OUT
Rev. A | Page 3 of 20
ADA4857-1/ADA4857-2
www.BDTIC.com/ADI
Parameter Conditions Min Typ Max Unit
POWER SUPPLY
Operating Range 4.5 10.5 V
Quiescent Current 5 5.5 mA
Quiescent Current (Power Down) PD ≥ VCC − 2 V 350 450 μA
Positive Power Supply Rejection +VS = 4.5 V to 5.5 V, −VS = −5 V −59 −62 dB
Negative Power Supply Rejection +VS = 5 V, −VS = −4.5 V to −5.5 V −65 −68 dB
+5 V SUPPLY
TA = 25°C, G = +2, RF = RG = 499 Ω, RL = 1 kΩ to midsupply, PD = no connect, unless otherwise noted.
Table 2.
Parameter Conditions Min Typ Max Unit
DYNAMIC PERFORMANCE
–3 dB Bandwidth (LFCSP/SOIC) G = +1, V
G = +1, V
G = +2, V
Full Power Bandwidth G = +1, V
Bandwidth for 0.1 dB Flatness (LFCSP/SOIC) G = +2, V
Slew Rate (10% to 90%) G = +1, V
Settling Time to 0.1% G = +2, V
NOISE/HARMONIC PERFORMANCE
Harmonic Distortion f = 1 MHz, G = +1, V
f = 1 MHz, G = +1, V
f = 10 MHz, G = +1, V
f = 10 MHz, G = +1, V
f = 50 MHz, G = +1, V
f = 50 MHz, G = +1, V
Input Voltage Noise f = 100 kHz 4.4 nV/√Hz
Input Current Noise f = 100 kHz 1.5 pA/√Hz
DC PERFORMANCE
Input Offset Voltage ±1 ±4.2 mV
Input Offset Voltage Drift 4.6 μV/°C
Input Bias Current
−1.7 −3.3 μA
Input Bias Current Drift 24.5 nA/°C
Input Bias Offset Current 50 nA
Open-Loop Gain V
OUT
PD (POWER-DOWN) PIN
PD Input Voltage Chip powered down ≥(VCC − 2) V
Chip enabled ≤(VCC − 4.2) V
Turn-Off Time 50% off PD to <10% of final V
Turn-On Time 50% off PD to <10% of final V
PD Pin Leakage Current Chip enable 8 μA
Chip powered down 30 μA
INPUT CHARACTERISTICS
Input Resistance Common mode 8 MΩ
Differential mode 4 MΩ
Input Capacitance Common mode 2 pF
Input Common-Mode Voltage Range 1 to 4 V
Common-Mode Rejection Ratio VCM = 2 V to 3 V −76 −84 dB
= 0.2 V p-p 595 800/750 MHz
OUT
= 2 V p-p 500/400 MHz
OUT
= 0.2 V p-p 360/300 MHz
OUT
= 2 V p-p, THD < −40 dBc 95 MHz
OUT
= 2 V p-p, RL = 150 Ω 50/40 MHz
OUT
= 2 V step 1500 V/μs
OUT
= 2 V step 15 ns
OUT
= 2 V p-p (HD2) −92 dBc
OUT
= 2 V p-p (HD3) −90 dBc
OUT
= 2 V p-p (HD2) −81 dBc
OUT
= 2 V p-p (HD3) −71 dBc
OUT
= 2 V p-p (HD2) −69 dBc
OUT
= 2 V p-p (HD3) −55 dBc
OUT
= 1.25 V to 3.75 V 57 dB
, VIN = 1 V, G = +2 38 μs
OUT
, VIN = 1 V, G = +2 30 ns
OUT
Rev. A | Page 4 of 20
ADA4857-1/ADA4857-2
www.BDTIC.com/ADI
Parameter Conditions Min Typ Max Unit
OUTPUT CHARACTERISTICS
Overdrive Recovery Time G = +2 15 ns
Output Voltage Swing RL = 1 kΩ 1 to 4 V
R
Output Current 50 mA
Short-Circuit Current Sinking and sourcing 75 mA
Capacitive Load Drive 30% overshoot, G = +2 10 pF
POWER SUPPLY
Operating Range 4.5 10.5 V
Quiescent Current 4.5 5 mA
Quiescent Current (Power Down) PD ≥ VCC − 2 V 250 350 μA
Positive Power Supply Rejection +VS = 4.5 V to 5.5 V, −VS = 0 V −58 −62 dB
Negative Power Supply Rejection +VS = 5 V, −VS = −0.5 V to +0.5 V −65 −68 dB
= 100 Ω 1.1 to 3.9 V
L
Rev. A | Page 5 of 20
ADA4857-1/ADA4857-2
(
www.BDTIC.com/ADI
ABSOLUTE MAXIMUM RATINGS
Table 3.
Parameter Rating
Supply Voltage 11 V
Power Dissipation See Figure 4
Common-Mode Input Voltage −VS + 0.7 V to +VS − 0.7 V
Differential Input Voltage ±VS
Exposed Paddle Voltage −VS
Storage Temperature Range −65°C to +125°C
Operating Temperature Range −40°C to +125°C
Lead Temperature (Soldering, 10 sec) 300°C
Junction Temperature 150°C
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
THERMAL RESISTANCE
θJA is specified for the worst-case conditions, that is, θJA is specified
for device soldered in circuit board for surface-mount packages.
Table 4.
Package Type θJA θ
Unit
JC
8-Lead SOIC 115 15 °C/W
8-Lead LFCSP 94.5 34.8 °C/W
16-Lead LFCSP 68.2 19 °C/W
MAXIMUM POWER DISSIPATION
The maximum safe power dissipation for the ADA4857 is
limited by the associated rise in junction temperature (T
the die. At approximately 150°C, which is the glass transition
temperature, the properties of the plastic change. Even temporarily
exceeding this temperature limit may change the stresses that
the package exerts on the die, permanently shifting the parametric
performance of the ADA4857. Exceeding a junction temperature of
175°C for an extended period can result in changes in silicon
devices, potentially causing degradation or loss of functionality.
) on
J
The power dissipated in the package (P
quiescent power dissipation and the power dissipated in the
die due to the ADA4857 drive at the output. The quiescent
power is the voltage between the supply pins (V
quiescent current (I
P
= Quiescent Power + (Total Drive Power − Load Power)
D
()
D
).
S
⎛
V
V
⎜
IVP
SS
⎜
⎝
OUTS
×+×=
2
R
L
RMS output voltages should be considered. If R
to −V
, as in single-supply operation, the total drive power is
S
V
× I
. If the rms signal levels are indeterminate, consider the
S
OUT
worst case, when V
()
D
= VS/4 for RL to midsupply.
OUT
2
)
V
4/
S
IVP
+×=
SS
R
L
In single-supply operation with R
case is V
= VS/2.
OUT
Airflow increases heat dissipation, effectively reducing θ
In addition, more metal directly in contact with the package
leads and exposed paddle from metal traces, through holes,
ground, and power planes reduces θ
Figure 4 shows the maximum power dissipation in the package
vs. the ambient temperature for the SOIC and LFCSP packages
on a JEDEC standard 4-layer board. θ
3.0
2.5
2.0
1.5
1.0
ADA4857-1 (LFCSP )
0.5
MAXIMUM POWER DISSIPATION (W)
0
–40 –30 –20 –10 0 10 20 30 40 50 60 70 80 90 100 110 120
AMBIENT TEMPERATURE (°C)
Figure 4. Maximum Power Dissipation vs. Temperature for a 4-Layer Board
ADA4857-1 (SOIC)
) is the sum of the
D
) times the
S
⎞
⎟
⎟
⎠
L
2
V
OUT
–
R
L
is referenced
L
referenced to −VS, the worst
.
JA
.
JA
values are approximations.
JA
ADA4857-2 (LFCSP )
07040-004
Rev. A | Page 6 of 20
ESD CAUTION
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