Output swings to within 200 mV of either rail
Low voltage offset: 1 mV
Wide supply range: 2.65 V to 5 V
APPLICATIONS
Portable multimedia players
Video cameras
Digital still cameras
Consumer video
Clock buffer
GENERAL DESCRIPTION
The ADA4853-1/ADA4853-2/ADA4853-3 are low power, low
cost, high speed, rail-to-rail output op amps with ultralow power
disables that are ideal for portable consumer electronics. Despite
their low price, the ADA4853-1/ADA4853-2/ADA4853-3 provide
excellent overall performance and versatility. The 100 MHz,
−3 dB bandwidth, and 120 V/μs slew rate make these amplifiers
well-suited for many general-purpose, high speed applications.
The ADA4853-1/ADA4853-2/ADA4853-3 voltage feedback op
amps are designed to operate at supply voltages as low as 2.65 V
and up to 5 V using only 1.4 mA of supply current per amplifier.
To further reduce power consumption, the amplifiers are equipped
with a power-down mode that lowers the supply current to less
than 1.5 μA maximum, making them ideal in battery-powered
applications.
The ADA4853-1/ADA4853-2/ADA4853-3 provide users with
a true single-supply capability, allowing input signals to extend
200 mV below the negative rail and to within 1.2 V of the
positive rail. On the output, the amplifiers can swing within
200 mV of either supply rail.
With their combination of low price, excellent differential gain
(0.2%), differential phase (0.10°), and 0.5 dB flatness out to
22 MHz, these amplifiers are ideal for video applications.
The ADA4853-1 is available in a 6-lead SC70, the ADA4853-2 is
available in a 16-lead LFCSP_VQ, and the ADA4853-3 is available
in both a 16-lead LFCSP_VQ and a 14-lead TSSOP. The
ADA4853-1 temperature range is −40°C to +85°C, while the
ADA4853-2/ADA4853-3 temperature range is −40°C to +105°C.
6.5
VS=5V
6.4
= 150Ω
R
L
G=+2
6.3
6.2
6.1
6.0
5.9
5.8
CLOSED-LOOP GAIN (dB)
5.7
5.6
5.5
0.111040
FREQUENC Y (MHz)
Figure 5. 0.5 dB Flatness Frequency Response
2.0V p-p
–
+
+
+
+
0.1V p-p
12
+V
S
11
V
OUT
10
–IN2
9
+IN2
14
V
OUT
13
–IN
–
12
+IN
11
–V
S
10
+IN
–
9
–IN
8
V
OUT
05884-010
2
5884-056
05884-058
Rev. C
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
Changes to Ordering Guide .......................................................... 15
1/06—Revision 0: Initial Version
Rev. C | Page 2 of 16
ADA4853-1/ADA4853-2/ADA4853-3
www.BDTIC.com/ADI
SPECIFICATIONS
SPECIFICATIONS WITH 3 V SUPPLY
TA = 25°C, RF = 1 kΩ, RG = 1 kΩ for G = +2, RL = 150 Ω, unless otherwise noted.
Table 1.
Parameter Conditions Min Typ Max Unit
DYNAMIC PERFORMANCE
−3 dB Bandwidth G = +1, VO = 0.1 V p-p 90 MHz
G = +2, VO = 2 V p-p 32 MHz
Bandwidth for 0.5 dB Flatness G = +2, VO = 2 V p-p, RL = 150 Ω 22 MHz
Settling Time to 0.1% VO = 2 V step 45 ns
Slew Rate G = +2, VO = 2 V step 88 100 V/μs
NOISE/DISTORTION PERFORMANCE
Differential Gain RL = 150 Ω 0.20 %
Differential Phase RL = 150 Ω 0.10 Degrees
Input Voltage Noise f = 100 kHz 22 nV/√Hz
Input Current Noise f = 100 kHz 2.2 pA/√Hz
Crosstalk G = +2, VO = 2 V p-p, RL = 150 Ω, f = 5 MHz −66 dB
DC PERFORMANCE
Input Offset Voltage 1 4 mV
Input Offset Voltage Drift 1.6 μV/°C
Input Bias Current
Input Bias Current Drift 4 nA/°C
Input Bias Offset Current 50 nA
Open-Loop Gain VO = 0.5 V to 2.5 V 72 80 dB
INPUT CHARACTERISTICS
Input Resistance Differential/common mode 0.5/20 MΩ
Input Capacitance 0.6 pF
Input Common-Mode Voltage Range −0.2 to +VCC − 1.2 V
Input Overdrive Recovery Time (Rise/Fall) VIN = −0.5 V to +3.5 V, G = +1 40 ns
Common-Mode Rejection Ratio VCM = 0 V to 1 V −69 −85 dB
POWER-DOWN
Power-Down Input Voltage Power-down 1.2 V
Turn-Off Time 1.4 μs
Turn-On Time 120 ns
Power-Down Bias Current
Enabled Power-down = 3.0 V 25 30 μA
Power-Down Power-down = 0 V 0.01 μA
OUTPUT CHARACTERISTICS
Output Overdrive Recovery Time VIN = −0.25 V to +1.75 V, G = +2 70 ns
Output Voltage Swing RL = 150 Ω 0.3 to 2.7 0.15 to 2.88 V
Short-Circuit Current Sinking/sourcing 150/120 mA
POWER SUPPLY
Operating Range 2.65 5 V
Quiescent Current/Amplifier 1.3 1.6 mA
Quiescent Current (Power-Down)/Amplifier Power-down = low 0.1 1.5 μA
Positive Power Supply Rejection +VS = +1.5 V to +2.5 V, −VS = −1.5 V −76 −86 dB
Negative Power Supply Rejection −VS = −1.5 V to −2.5 V, +VS = +1.5 V −77 −88 dB
1.0 1.7 μA
Rev. C | Page 3 of 16
ADA4853-1/ADA4853-2/ADA4853-3
www.BDTIC.com/ADI
SPECIFICATIONS WITH 5 V SUPPLY
TA = 25°C, RF = 1 kΩ, RG = 1 kΩ for G = +2, RL = 150 Ω, unless otherwise noted.
Table 2.
Parameter Conditions Min Typ Max Unit
DYNAMIC PERFORMANCE
−3 dB Bandwidth G = +1, VO = 0.1 V p-p 100 MHz
G = +2, VO = 2 V p-p 35 MHz
Bandwidth for 0.5 dB Flatness G = +2, VO = 2 V p-p 22 MHz
Settling Time to 0.1% VO = 2 V step 54 ns
Slew Rate G = +2, VO = 2 V step 93 120 V/μs
NOISE/DISTORTION PERFORMANCE
Differential Gain RL = 150 Ω 0.22 %
Differential Phase RL = 150 Ω 0.10 Degrees
Input Voltage Noise f = 100 kHz 22 nV/√Hz
Input Current Noise f = 100 kHz 2.2 pA/√Hz
Crosstalk G = +2, VO = 2 V p-p, RL = 150 Ω, f = 5 MHz −66 dB
DC PERFORMANCE
Input Offset Voltage 1 4.1 mV
Input Offset Voltage Drift 1.6 μV/°C
Input Bias Current
Input Bias Current Drift 4 nA/°C
Input Bias Offset Current 60 nA
Open-Loop Gain VO = 0.5 V to 4.5 V 72 80 dB
INPUT CHARACTERISTICS
Input Resistance Differential/common mode 0.5/20 MΩ
Input Capacitance 0.6 pF
Input Common-Mode Voltage Range −0.2 to +VCC − 1.2 V
Input Overdrive Recovery Time (Rise/Fall) VIN = −0.5 V to +5.5 V, G = +1 40 ns
Common-Mode Rejection Ratio VCM = 0 V to 3 V −71 −88 dB
POWER-DOWN
Power-Down Input Voltage Power-down 1.2 V
Turn-Off Time 1.5 μs
Turn-On Time 120 ns
Power-Down Bias Current
Enabled Power-down = 5 V 40 50 μA
Power-Down Power-down = 0 V 0.01 μA
OUTPUT CHARACTERISTICS
Output Overdrive Recovery Time VIN = −0.25 V to +2.75 V, G = +2 55 ns
Output Voltage Swing RL = 75 Ω 0.55 to 4.5 0.1 to 4.8 V
Short-Circuit Current Sinking/sourcing 160/120 mA
POWER SUPPLY
Operating Range 2.65 5 V
Quiescent Current/Amplifier 1.4 1.8 mA
Quiescent Current (Power-Down)/Amplifier Power-down = low 0.1 1.5 μA
Positive Power Supply Rejection +VS = +2.5 V to +3.5 V, −VS = −2.5 V −75 −80 dB
Negative Power Supply Rejection −VS = −2.5 V to −3.5 V, +VS = +2.5 V −75 −80 dB
1.0 1.7 μA
Rev. C | Page 4 of 16
ADA4853-1/ADA4853-2/ADA4853-3
(
www.BDTIC.com/ADI
ABSOLUTE MAXIMUM RATINGS
Table 3.
Parameter Rating
Supply Voltage 5.5 V
Power Dissipation See Figure 6
Common-Mode Input Voltage −VS − 0.2 V to +VS − 1.2 V
Differential Input Voltage ±VS
Storage Temperature Range −65°C to +125°C
Operating Temperature Range
6-Lead SC70 −40°C to +85°C
16-Lead LFCSP_VQ −40°C to +105°C
14-Lead TSSOP −40°C to +105°C
Lead Temperature JEDEC J-STD-20
Junction Temperature 150°C
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
THERMAL RESISTANCE
θJA is specified for the worst-case conditions, that is, θJA is
specified for the device soldered in the circuit board for
surface-mount packages.
The power dissipated in the package (P
resistor load is the total power consumed from the supply
minus the load power.
= Total Power Consumed − Load Power
P
D
D
IVP
RMS output voltages should be considered.
Airflow increases heat dissipation, effectively reducing θ
In addition, more metal directly in contact with the package
leads and through holes under the device reduces θ
Figure 6 shows the maximum safe power dissipation in the
package vs. the ambient temperature for the 6-lead SC70
(430°C/W), the 14-lead TSSOP (120°C/W), and the 16-lead
LFCSP_VQ (63°C/W) on a JEDEC standard 4-layer board. θ
values are approximations.
The maximum safe power dissipation for the ADA4853-1/
ADA4853-2/ADA4853-3 is limited by the associated rise in
junction temperature (T
) on the die. At approximately 150°C,
J
which is the glass transition temperature, the plastic changes its
properties. Even temporarily exceeding this temperature limit
can change the stresses that the package exerts on the die,
permanently shifting the parametric performance of the
amplifiers. Exceeding a junction temperature of 150°C for an
extended period can result in changes in silicon devices,
potentially causing degradation or loss of functionality.
0.5
MAXIMUM POW ER DISSIPAT ION (W)
0
Figure 6. Maximum Power Dissipation vs. Temperature for a 4-Layer Board
SC70
125105856545255–15–35–55
AMBIENT TEM PERATURE (°C)
ESD CAUTION
05884-059
Rev. C | Page 5 of 16
ADA4853-1/ADA4853-2/ADA4853-3
www.BDTIC.com/ADI
TYPICAL PERFORMANCE CHARACTERISTICS
2
1
0
–1
–2
–3
*ADA4853-1/ADA4853-2
–4
VS = 5V
–5
NORMALIZED CLOSED-LOOP GAIN (dB)
= 150Ω
R
L
V
= 0.1V p-p
OUT
–6
0.1200
110100
ADA4853-3
LFCSP
G = +2*
G = +10*
FREQUENCY (MHz )
Figure 7. Small Signal Frequency Response for Various Gains
3
VS = 5V
G = +1
2
V
= 0.1V p-p
OUT
1
0
–1
–2
–3
CLOSED-LOOP GAIN (dB)
–4
–5
–6
0.1110100 200
FREQUENCY (MHz)
R
= 75Ω
L
R
R
L
= 1kΩ
L
= 150Ω
G = –1*
5
VS = 5V
R
= 150Ω
4
L
V
= 0.1V p-p
OUT
3
G = +1
2
1
0
–1
–2
–3
CLOSED-LOOP GAIN (dB)
–4
–5
–6
0.1110100 200
5884-006
R
SNUB
C
L
R
L
FREQUENCY (MHz)
CL = 10pF/25Ω SNUB
= 10pF
C
L
= 5pF
C
L
C
= 0pF
L
05884-009
Figure 10. Small Signal Frequency Response for Various Capacitive Loads
6.5
VS=5V
R
=150Ω
6.4
L
G=+2
6.3
6.2
6.1
6.0
5.9
5.8
CLOSED-LOOP GAIN (dB)
5.7
5.6
5.5
5884-007
0.111040
FREQUENCY (MHz )
2.0V p-p
0.1V p-p
05884-010
Figure 8. Small Signal Frequency Response for Various Loads
4
G = +1
3
R
= 150Ω
L
V
= 0.1V p-p
OUT
2
1
0
–1
–2
–3
CLOSED-LOOP GAIN (dB)
–4
–5
–6
0.1110100 200
FREQUENCY (MHz)
V
S
= 5V
V
S
Figure 9. Small Signal Frequency Response for Various Supplies
= 3V
05884-008
Figure 12. ADA4853-3 LFCSP_VQ Flatness Response for Various Output Voltages
Rev. C | Page 6 of 16
Figure 11. 0.5 dB Flatness Response for Various Output Voltages
8.0
VS = 5V
7.8
R
= 150Ω
L
G = +2
7.6
7.4
7.2
7.0
6.8
6.6
6.4
6.2
CLOSED-LOOP GAIN (dB)
6.0
5.8
5.6
0.11000
110100
FREQUENCY (MHz )
0.1V p-p
2V p-p
05884-060
ADA4853-1/ADA4853-2/ADA4853-3
T
V
www.BDTIC.com/ADI
1
0
= 150Ω
= 2V p-p
G=+10
–1
–2
–3
–4
VS = 5V
–5
NORMALIZED CLOSED-LOOP GAIN (dB)
R
L
V
OUT
–6
0.1110100 200
G=–1
G=+2
FREQUENCY (MHz)
Figure 13. Large Signal Frequency Response for Various Gains
7
6
5
4
3
2
CLOSED-LOOP GAIN (dB)
VS=5V
1
=2Vp-p
V
OUT
G=+2
0
0.1200
110100
RL=75Ω
RL=150Ω
FREQUENCY (MHz)
RL=1kΩ
Figure 14. Large Signal Frequency Response for Various Loads
5
V
= 3V
S
= 150Ω
R
4
L
= 0.1V p-p
V
OUT
G = +1
3
2
1
0
–1
–2
–3
CLOSED-LOOP GAIN (dB)
–4
–5
–6
0.1110100 200
FREQUENCY (MHz)
+25°C
+85°C
–40°C
Figure 15. Small Signal Frequency Response for Various Temperatures
4
VS = 5V
R
= 150Ω
L
3
V
= 0.1V p-p
OUT
G = +1
2
1
0
–1
–2
–3
CLOSED-LOOP GAIN (dB)
–4
–5
–6
05884-011
0.1110100 200
FREQUENCY (MHz)
+25°C
–40°C
+85°C
05884-014
Figure 16. Small Signal Frequency Response for Various Temperatures
250
VS=5V
= 150Ω
R
L
G=+2
200
/µs)
150
E(
100
SLEW RA
50
0
5884-012
00.51.52.53.51.02.03.04.0
NEGATIVE SLEW RAT E
POSITIVE SLEW RATE
OUTPUT VOLTAGE STEP (V)
5884-015
Figure 17. Slew Rate vs. Output Voltage
= 150Ω
0
–30
–60
–90
–120
–150
–180
–210
–240
5884-029
OPEN-LO OP PHASE (Degrees)
140
120
100
80
60
40
OPEN-LOOP GAIN (dB)
20
0
–20
05884-013
100
1k10k100k1M10M100M
FREQUENCY ( Hz)
PHASE
GAIN
VS=5V
R
L
Figure 18. Open-Loop Gain and Phase vs. Frequency
Rev. C | Page 7 of 16
ADA4853-1/ADA4853-2/ADA4853-3
–
–
R
–
R
www.BDTIC.com/ADI
20
VS = 5V
–30
–40
–50
–60
–70
COMMON-MO DE REJECTIO N (dB)
–80
–90
1001k10k100k1M10M100M
FREQUENCY (Hz)
Figure 19. Common-Mode Rejection vs. Frequency
0
VS = 5V
GAIN = +2
–10
RTO
–20
–30
–40
–50
–60
–70
–80
POWER SUPPLY REJECTI ON (dB)
–90
–100
1001k10k100k1M10M100M
FREQUENCY (Hz)
–PSR
+PSR
Figure 20. Power Supply Rejection vs. Frequency
1000
VS = 5V
G = +1
100
05884-030
05884-031
10M
VS = 5V
G = +1
1M
100k
10k
1k
100
CLOSED-LOOP OUTPUT IMPEDANCE (Ω)
10
1001k10k100k1M10M100M
ADA4853-3
FREQUENCY (Hz)
ADA4853-1/
ADA4853-2
Figure 22. Output Impedance vs. Frequency Disabled
40
G = +2
V
= 3V
S
V
= 2V p-p
OUT
–50
= 150Ω HD3
R
–60
–70
–80
MONIC DISTORTION (dBc)
–90
HA
–100
–110
0.1110
L
FREQUENCY (MHz )
= 150Ω HD2
R
L
R
= 1kΩ HD2
L
Figure 23. Harmonic Distortion vs. Frequency
40
G = +2
V
= 5V
–50
–60
V
S
OUT
= 2V p-p
= 150Ω HD3
R
L
R
= 1kΩ HD3
L
05884-050
05884-016
10
1
0.1
CLOSED-LO OP OUTP UT IMPEDANCE (Ω)
0.01
1001k10k100k1M10M100M
FREQUENCY (Hz)
05884-032
Figure 21. Output Impedance vs. Frequency Enabled
Rev. C | Page 8 of 16
–70
–80
–90
MONIC DISTORTION (dBc)
–100
HA
–110
–120
0.1110
R
= 150Ω HD2
L
FREQUENCY (MHz)
= 1kΩ HD2
R
L
R
Figure 24. Harmonic Distortion vs. Frequency
= 1kΩ HD3
L
05884-017
ADA4853-1/ADA4853-2/ADA4853-3
–
R
–
–
R
www.BDTIC.com/ADI
40
G = +1
V
= 5V
S
V
= 2V p-p
OUT
R
= 75Ω HD2
L
= 75Ω HD3
R
L
0.1110
= 150Ω HD3
R
L
R
= 150Ω HD2
L
1kΩ HD2
=
R
L
FREQUENCY (MHz)
= 1kΩ HD3
R
L
MONICDISTORTION(dBc)
HA
–50
–60
–70
–80
–90
–100
–110
–120
Figure 25. Harmonic Distortion vs. Frequency
30
G=+2
V
=2Vp-p
OUT
R
=75Ω
L
–40
–50
–60
–70
–80
HARMONIC DISTORTION (dBc)
–90
–100
VS=3VHD2
0.110
VS= 3V HD3
VS=5VHD2
VS=5VHD3
1
FREQUENCY (MHz)
Figure 26. Harmonic Distortion vs. Frequency
40
G = +1
V
= 5V
S
R
= 150Ω
–50
L
f = 100kHz
–60
–70
–80
–90
MONIC DIS TORTIO N (dBc)
–100
HA
–110
–120
HD2
HD3
0123
2V
(V p-p)
V
OUT
5V
GND
Figure 27. Harmonic Distortion for Various Output Voltages
5884-018
05884-051
05884-019
4
2.60
G = +2
= 150Ω
R
2.58
L
25ns/DIV
2.56
2.54
2.52
2.50
2.48
2.46
OUTPUT VO LTAGE (V )
2.44
2.42
2.40
= 3V
V
S
V
= 5V
S
Figure 28. Small Signal Pulse Response for Various Supplies
2.60
2.58
2.56
2.54
2.52
2.50
2.48
2.46
OUTPUT VOLTAGE (V)
2.44
VS=5V
R
= 150Ω
2.42
L
25ns/DIV
2.40
G=+1;CL=5pF
G=+2;CL= 0pF, 5pF, 10pF
Figure 29. Small Signal Pulse Response for Various Capacitive Loads
3.75
G = +2
R
= 150Ω
3.50
L
25ns/DIV
3.25
3.00
2.75
2.50
2.25
2.00
OUTPUT VO LTAGE (V )
1.75
1.50
1.25
V
= 3V, 5V
S
Figure 30. Large Signal Pulse Response for Various Supplies
05884-033
05884-034
05884-035
Rev. C | Page 9 of 16
ADA4853-1/ADA4853-2/ADA4853-3
www.BDTIC.com/ADI
3.75
G = +2
V
= 5V
3.50
S
R
= 150Ω
L
25ns/DIV
3.25
3.00
2.75
2.50
2.25
2.00
OUTPUT VO LTAGE (V )
1.75
1.50
1.25
= 0pF, 20p F
C
L
Figure 31. Large Signal Pulse Response for Various Capacitive Loads
The ADA4853-1/ADA4853-2/ADA4853-3 feature a high slew
rate input stage that is a true single-supply topology capable of
sensing signals at or below the minus supply rail. The rail-torail output stage can pull within 100 mV of either supply rail
when driving light loads and within 200 mV when driving
150 Ω. High speed performance is maintained at supply
voltages as low as 2.65 V.
HEADROOM CONSIDERATIONS
The ADA4853-1/ADA4853-2/ADA4853-3 are designed for use
in low voltage systems. To obtain optimum performance, it is
useful to understand the behavior of the amplifiers as input and
output signals approach their headroom limits. The amplifiers’
input common-mode voltage range extends from the negative
supply voltage (actually 200 mV below this) to within 1.2 V of
the positive supply voltage.
Exceeding the headroom limits is not a concern for any
inverting gain on any supply voltage, as long as the reference
voltage at the amplifiers’ positive input lies within the
amplifiers’ input common-mode range.
The input stage is the headroom limit for signals approaching
the positive rail. Figure 50 shows a typical offset voltage vs. the
input common-mode voltage for the ADA4853-1/ADA4853-2/
ADA4853-3 on a 5 V supply. Accurate dc performance is
maintained from approximately 200 mV below the negative
supply to within 1.2 V of the positive supply. For high speed
signals, however, there are other considerations. As the
common-mode voltage gets within 1.2 V of positive supply, the
amplifier responds well but the bandwidth begins to drop as the
common-mode voltage approaches the positive supply. This can
manifest itself in increased distortion or settling time. Higher
frequency signals require more headroom than the lower
frequencies to maintain distortion performance.
0.6
VS = 5V
–0.8
For signals approaching the negative supply, inverting gain, and
high positive gain configurations, the headroom limit is the
output stage. The ADA4853-1/ADA4853-2/ADA4853-3 use a
common-emitter output stage. This output stage maximizes the
available output range, limited by the saturation voltage of the
output transistors. The saturation voltage increases with the
drive current that the output transistor is required to supply due
to the output transistor’s collector resistance.
As the saturation point of the output stage is approached, the
output signal shows increasing amounts of compression and
clipping. For the input headroom case, higher frequency signals
require a bit more headroom than the lower frequency signals.
Figure 27 illustrates this point by plotting the typical distortion
vs. the output amplitude.
OVERLOAD BEHAVIOR AND RECOVERY
Input
The specified input common-mode voltage of the ADA4853-1/
ADA4853-2/ADA4853-3 is 200 mV below the negative supply
to within 1.2 V of the positive supply. Exceeding the top limit
results in lower bandwidth and increased rise time. Pushing the
input voltage of a unity-gain follower to less than 1.2 V from the
positive supply leads to an increasing amount of output error as
well as increased settling time. The recovery time from input
voltages 1.2 V or closer to the positive supply is approximately
40 ns; this is limited by the settling artifacts caused by transistors in the input stage coming out of saturation.
The amplifiers do not exhibit phase reversal, even for input
voltages beyond the voltage supply rails. Going more than
0.6 V beyond the power supplies turns on protection diodes
at the input stage, greatly increasing the current draw of the
devices.
With low differential gain and phase errors and wide 0.5 dB
flatness, the ADA4853-1/ADA4853-2/ADA4853-3 are ideal
solutions for portable video applications. Figure 51 shows a
typical video driver set for a noninverting gain of +2, where
= RG = 1 kΩ. The video amplifier input is terminated into a
R
F
shunt 75 Ω resistor. At the output, the amplifier has a series
75 Ω resistor for impedance matching to the video load.
When operating in low voltage, single-supply applications, the
input signal is only limited by the input stage headroom.
R
F
C1
+V
S
2.2µF
+
P
D
R
G
V
IN
C2
0.01µF
U1
Figure 51. Video Amplifier
75Ω
V
75Ω CABLE
75Ω
V
OUT
5884-043
POWER SUPPLY BYPASSING
Attention must be paid to bypassing the power supply pins of
the ADA4853-1/ADA4853-2/ADA4853-3. High quality capacitors
with low equivalent series resistance (ESR), such as multilayer
ceramic capacitors (MLCCs), should be used to minimize
supply voltage ripple and power dissipation. A large, usually
tantalum, 2.2 μF to 47 μF capacitor located in proximity to the
ADA4853-1/ADA4853-2/ADA4853-3 is required to provide
good decoupling for lower frequency signals. The actual value is
determined by the circuit transient and frequency requirements.
In addition, 0.1 μF MLCC decoupling capacitors should be
located as close to each of the power supply pins as is physically
possible, no more than ⅛ inch away. The ground returns should
terminate immediately into the ground plane. Locating the bypass
capacitor return close to the load return minimizes ground loops
and improves performance.
LAYOUT
As is the case with all high speed applications, careful attention
to printed circuit board (PCB) layout details prevents associated
board parasitics from becoming problematic. The ADA4853-1/
ADA4853-2/ADA4853-3 can operate at up to 100 MHz; therefore, proper RF design techniques must be employed. The PCB
should have a ground plane covering all unused portions of the
component side of the board to provide a low impedance return
path. Removing the ground plane on all layers from the area
near and under the input and output pins reduces stray capacitance. Signal lines connecting the feedback and gain resistors
should be kept as short as possible to minimize the inductance
and stray capacitance associated with these traces. Termination
resistors and loads should be located as close as possible to their
respective inputs and outputs. Input and output traces should
be kept as far apart as possible to minimize coupling (crosstalk)
through the board. Adherence to microstrip or stripline design
techniques for long signal traces (greater than 1 inch) is
recommended. For more information on high speed board
layout, go to: www.analog.com to view A Practical Guide to High-Speed Printed-Circuit-Board Layout.
Rev. C | Page 15 of 16
ADA4853-1/ADA4853-2/ADA4853-3
R
R
www.BDTIC.com/ADI
OUTLINE DIMENSIONS
2.20
2.00
1.80
2.40
0.30
0.15
4 5 6
3 2 1
0.65 BSC
2.10
1.80
1.10
0.80
SEATING
PLANE
0.40
0.10
0.22
0.08
1.35
1.25
1.15
1.00
0.90
0.70
0.10 MAX
PIN 1
1.30 BSC
0.10 COPLANARITY
COMPLIANT TO JEDEC STANDARDS MO-203-AB
Figure 52. 6-Lead Thin Shrink Small Outline Transistor Package [SC70]
(KS-6)—Dimensions shown in millimeters
3.00
BSC SQ
PIN 1
INDICATO
0.90
0.85
0.80
SEATING
PLANE
12° MAX
TOP
VIEW
0.30
0.23
0.18
*
COMPLIANT
EXCEPT FOR EXPOSED PAD DIMENSION.
BSC SQ
Figure 54. 16-Lead Lead Frame Chip Scale Package [LFCSP_VQ]
3 mm × 3 mm Body, Very Thin Quad (CP-16-3)—Dimensions shown in millimeters
4.50
4.40
4.30
PIN 1
1.05
0.46
0.36
0.26
1.00
0.80
Figure 53. 14-Lead Thin Shrink Small Outline Package [TSSOP]
0.60 MAX
1.50 REF
13
12
(BOTTOM VIEW)
9
8
0.45
2.75
0.50
BSC
0.80 MAX
0.65 TYP
0.05 MAX
0.02 NOM
0.20 REF
TO
JEDEC STANDARDS MO-220-VEED-2
5.10
5.00
4.90
14
0.65
BSC
0.15
0.05
COMPLIANT TO JEDEC STANDARDS MO-153-AB-1
0.30
0.19
8
6.40
BSC
71
1.20
MAX
SEATING
PLANE
0.20
0.09
COPLANARITY
0.10
(RU-14)—Dimensions shown in millimeters
0.50
0.40
EXPOSED
PAD
0.30
16
1
4
5
N
P
I
D
N
I
*
1.65
1.50 SQ
1.35
0.25 MIN
1
O
C
I
A
T
8°
0°
0.75
0.60
0.45
ORDERING GUIDE
Te mp e ra tu r e
Model
ADA4853-1AKSZ-R21 –40°C to +85°C 6-Lead Thin Shrink Small Outline Transistor Package (SC70) 250 KS-6 HEC
ADA4853-1AKSZ-R71 –40°C to +85°C 6-Lead Thin Shrink Small Outline Transistor Package (SC70) 3,000 KS-6 HEC
ADA4853-1AKSZ-RL
ADA4853-2YCPZ-R2
ADA4853-2YCPZ-RL1 –40°C to +105°C 16-Lead Lead Frame Chip Scale Package (LFCSP_VQ) 5,000 CP-16-3 H0H
ADA4853-2YCPZ-RL7
ADA4853-3YCPZ-R2
ADA4853-3YCPZ-RL1 –40°C to +105°C 16-Lead Lead Frame Chip Scale Package (LFCSP_VQ) 5,000 CP-16-3 H0L
ADA4853-3YCPZ-R7
ADA4853-3YRUZ