ANALOG DEVICES ADA4800 Service Manual

Low Power, High Speed

O

V

FEATURES

Integrated active load and gain of 1 buffer
Very low buffer power consumption

As low as 20 mW on chip

Power save feature to reduce active load current by GPO

control

High buffer speed

400 MHz, −3 dB bandwidth

415 V/μs slew rate
Fast settling time to 1%, 2 V step: 5 ns
Adjustable buffer bandwidth
Push-pull output stage
Adjustable active load current
Small package: 1.6 mm × 1.6 mm × 0.55 mm

APPLICATIONS

CCD image sensor output buffer
Digital still cameras
Camcorders

CCD Buffer Amplifier

ADA4800

FUNCTIONAL BLOCK DIAGRAM

VEE

ADA4800

1

IN

I

AL

2

3

UT

+1

Figure 1.

I

IDRV

I

BUFF

6

ISF

I

ISF

I

CC

5

VCC

4

IDRV

09162-001

GENERAL DESCRIPTION

The ADA4800 is voltage buffer integrated with an active load.
The buffer is a low power, high speed, low noise, high slew rate,
fast settling, fixed gain of 1 monolithic amplifier for charge­coupled device (CCD) applications. For CCD applications, the
active load current source (I
sensor outputs and the buffer can drive the AFE load. The active
current load can also be switched off, to use the ADA4800 as just
a unity gain buffer. The buffer consumes only 20 mW of static
power. In applications where power savings is critical, the
ADA4800 features a power save mode (see the Power Save
Mode section), which further reduces the total current
consumption. The bandwidth of the ADA4800 buffer is also
fully adjustable through the IDRV pin.

The buffer of the ADA4800 employs a push-pull output stage
architecture, providing drive current and maximum slew
capability for both rising and falling signal transitions. At a
5 mA quiescent current setting, it provides 400 MHz, −3 dB
bandwidth, which makes this buffer well suited for CCD
sensors from machine vision to digital still camera applications.

The ADA4800 is ideal for driving the input of the Analog
Devices, Inc., 12-bit and 14-bit high resolution analog
front ends (AFE) such as the AD9928, AD9990, AD9920A,

AD9923A, and AD997x family.

) can load the open source CCD

AL

The versatility of the ADA4800 allows for seamless interfacing
with many CCD sensors from various manufacturers.

The ADA4800 is designed to operate at supply voltages as low
as 4 V and up to 17 V. It is available in a 1.6 mm × 1.6 mm ×

0.55 mm, 6-lead LFCSP package and is rated to operate over the

+

VCC

5

+1

2

VEE

o

C to +85oC.

10µF

I

IDRV

ADA4800

22pF

7.5V

R
249kΩ

4

3

IDRV

IDRV

OUT

1kΩ10Ω

15V

09162-102

industrial temperature range of −40

ISF

R

7.5V

ISF

0.1µF

10kΩ
ISF

6

I

ISF

I

BUFF

I

1

AL

IN

49.9Ω

Figure 2. Typical Test Circuit

3V

Rev. A

Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: [phone] www.analog.com
Fax: [phone] ©2010 Analog Devices, Inc. All rights reserved.

ADA4800

TABLE OF CONTENTS

Features .............................................................................................. 1

Applications ....................................................................................... 1

Functional Block Diagram .............................................................. 1

General Description ......................................................................... 1

Revision History ............................................................................... 2

Specifications ..................................................................................... 3

Buffer Electrical Characteristics ................................................. 3

Active Current Load Electrical Characteristics ........................ 3

Absolute Maximum Ratings ............................................................ 4

Thermal Resistance ...................................................................... 4

ESD Caution .................................................................................. 4

Pin Configuration and Function Descriptions ............................. 5

REVISION HISTORY

7/10—Rev. 0 to Rev. A

Deleted Figure 15 .............................................................................. 7

Changes to Setting Active Load Current with Pin 6 ISF Section

and Setting Bandwidth with Pin 4 (IDRV) Section ................... 10

6/10—Revision 0: Initial Version

Typical Performance Characteristics ..............................................6

Test Circuit .........................................................................................9

Theory of Operation ...................................................................... 10

Setting Active Load Current with Pin 6 (ISF) ........................ 10

Setting Bandwidth with Pin 4 (IDRV)..................................... 10

Applications Information .............................................................. 11

Open Source CCD Output Buffer ............................................ 11

Power Save Mode ....................................................................... 11

Power Supply Bypassing ............................................................ 12

Power Sequencing ...................................................................... 12

Outline Dimensions ....................................................................... 13

Ordering Guide .......................................................................... 13

Rev. A | Page 2 of 16

ADA4800

SPECIFICATIONS

BUFFER ELECTRICAL CHARACTERISTICS

TA = 25°C, VCC = 15 V, VEE = 0 V, R
unless otherwise noted (see Figure 2 for a test circuit).

Table 1.

Parameter Condition Min Typ Max Unit

GAIN

Voltage Gain VIN = 6.5 V to 8.5 V, R

INPUT/OUTPUT CHARACTERISTICS

I/O Offset Voltage 30 41 mV

IDRV Current R

Input/Output Voltage Range VEE + 1.4 VCC − 1.4 V

Input Bias Current (I

) 1 μA

BUFF

DYNAMIC PERFORMANCE

−3 dB Bandwidth R

R

R

Slew Rate V

Rise Time VIN = 7.5 V to 8.5 V, 10% to 90% 2.2 ns

Fall Time VIN = 8.5 V to 7.5 V, 10% to 90% 1.8 ns

1% Settling Time VIN = 9.5 V to 7.5 V (falling edge) 5 ns

V

V

V

I/O Delay Time VIN = 8.5 V to 7.5 V (falling edge) 0.4 ns

V

Output Voltage Noise @ 20 MHz 1.5 nV/√Hz

POWER SUPPLY

Supply Voltage Range 4 15 17 V

Supply Current (ICC) 1.4 1.8 mA

OPERATING TEMPERATURE RANGE −40 +85 °C

= 249 k connected to V

IDRV

= 249 kΩ, V

IDRV

= 300 kΩ (ICC = 1.1 mA), V

IDRV

= 150 kΩ (ICC = 2.1 mA), V

IDRV

= 50 kΩ (ICC = 4.7 mA), V

IDRV

= 2 V step 415 V/μs

OUT

= 7.5 V to 9.5 V (rising edge) 4.5 ns

IN

= 8.5 V to 7.5 V (falling edge) 4.5 ns

IN

= 7.5 V to 8.5 V (rising edge) 4 ns

IN

= 7.5 V to 8.5 V (rising edge) 0.35 ns

IN

, R

IDRV

IDRV

= 1 k in parallel with 22 pF in series with 10 , VIN = 7.5 V,

LOAD

= 0 Ω 0.995 0.998 1.005 V/V

ISF

= 15 V 52 59 μA

= 0.1 V p-p 182 MHz

OUT

= 0.1 V p-p 288 MHz

OUT

= 0.1 V p-p 400 MHz

OUT

ACTIVE CURRENT LOAD ELECTRICAL CHARACTERISTICS

TA = 25°C, VEE = 0 V, V

Table 2.

Parameter Condition Min Typ Max Unit

INPUT/OUTPUT CHARACTERISTICS

Active Load Current (IAL) V

V

ISF Current (I

) R

ISF

Input Voltage Range VEE + 1.7 VCC V

OPERATING TEMPERATURE RANGE −40 +85 °C

= 3 V, R

ISF

= 10 k connected to V

ISF

= 0 V 1 μA

ISF

V

= 3 V 3 mA

ISF

= 7.5 V 12.7 mA

ISF

= 10 kΩ 111 120 μA

ISF

, VIN = 7.5 V, unless otherwise noted (see Figure 2 for a test circuit).

ISF

Rev. A | Page 3 of 16

ADA4800

ABSOLUTE MAXIMUM RATINGS

TA = 25°C, unless otherwise noted.

Table 2.

Parameter Rating

Supply Voltage 18 V
Input Voltage VEE to VCC
ISF Pin VEE to VCC
IDRV Pin VEE to VCC
Storage Temperature Range −65°C to +150°C
Operating Temperature Range −40°C to +85°C
Junction Temperature Range −65°C to +150°C

Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.

THERMAL RESISTANCE

θJA is specified for the worst-case conditions, that is, a device
soldered in a circuit board for surface-mount packages.

Table 3. Thermal Resistance

Package Type θJA Unit

6-Lead LFCSP 160 °C/W

ESD CAUTION

Rev. A | Page 4 of 16

ADA4800

A

PIN CONFIGURATION AND FUNCTION DESCRIPTIONS

DA4800

1

IN

ISF

6

VEE

OUT

NOTES

1. EXPOSED PAD IS NOT INTERNALLY
CONNECTED TO DIE. CONNECT TO ANY LOW
IMPEDANCE NODE O R LEAVE FLOATING.

EPAD

2

3

VCC

5

IDRV

4

09162-002

Figure 3. Pin Configuration

Table 4. Pin Function Descriptions

Pin No. Mnemonic Description

1 IN Input. Connect this pin to the CCD sensor output.
2 VEE Negative Power Supply Voltage.
3 OUT Output. Connect this pin to the AFE input.
4 IDRV

Bandwidth Adjustment Pin. Connect this pin to VCC or an external voltage with an external resistor. This pin
allows bandwidth to be controlled by adjusting I

. This pin can also be used to power down the buffer.

CC

5 VCC Positive Power Supply Voltage.
6 ISF

Active Load Current Adjustment Pin. Connect to VCC or an external voltage with an external resistor. This pin can
also be connected to the microcontroller logic output through an external resistor for power save mode. This pin
can also be used to power down the active current load.

EPAD EPAD Exposed Pad. Not internally connected to die. Connect to any low impedance node or leave floating.

Rev. A | Page 5 of 16

ADA4800

TYPICAL PERFORMANCE CHARACTERISTICS

TA = 25°C, VCC = 7.5 V, VEE = −7.5 V, R
terminated with 49.9 Ω to 0 V, R

1

0

–1

–2

–3

–4

GAIN (dB)

–5

–6

–7

–8

–9

Figure 4. Small Signal Frequency Response with Various IDRV Resistances

= 100mV p-p

V

OUT

1M 10M 100M 1G

LOAD

R

IDRV

FREQUENCY (Hz)

= 249 k connected to V

IDRV

IDRV

, V

= −4.5 V, R

ISF

ISF

= 1 k in parallel with 22 pF in series with 10  to 0 V.

3

0
–3
–6
–9

–12
–15

GAIN (dB)

–18
–21
–24
–27

V

OUT

–30

1M 10M 100M 1G

Figure 7. Large Signal Frequency Response with Various IDRV Resistances

= 150kΩ

R

IDRV

R

= 200kΩ

= 300kΩ

IDRV

R

IDRV

= 50kΩ

09162-003

= 10 k connected to V

R

= 2V p-p

FREQUENCY (Hz)

IDRV

R

ISF

= 150kΩ

= 200kΩ

IDRV

R

IDRV

, VIN shunt

R

= 50kΩ

IDRV

= 300kΩ

09162-006

3

TA = –40°C

0

–3

–6

GAIN (dB)

–9

–12

= 100mV p-p

V

OUT

–15

1M 10M 100M 1G

FREQUENCY (Hz)

TA = +25°C

TA = +85°C

Figure 5. Small Signal Frequency Response at Various Temperatures

2.0

1.5

1.0

0.5

0

VIN – V

–0.5

% SETTLING ERROR

–1.0

V

–1.5

OUT

OUT

1.4

1.2

1.0

0.8

0.6

0.4

0.2

0

1.5

1.0 2.0

0.5 1.6

01

VIN – V

V

–0.5 0.8

% SETTLING ERROR

–1.0 0.4

–1.5

036 109258147

09162-004

OUT

TIME (ns)

OUT

2.4

(V)

.2

OUT

V

0

09162-007

Figure 8. Settling Time, 2 V to 0 V Output Transition

2.0

1.5

1.0

0.5

(V)

OUT

V

0

–0.5

% SETTLING ERROR

–1.0

V

–1.5

OUT

VIN – V

OUT

1.4

1.2

1.0

0.8

0.6

0.4

0.2

0

(V)

OUT

V

–2.0

0369258147

TIME (ns)

Figure 6. Settling Time, 1 V to 0 V Output Transition

–0.2

09162-005

Rev. A | Page 6 of 16

–2.0

0369258147

TIME (ns)

Figure 9. Settling Time, 0 V to 1 V Output Transition

–0.2

09162-008

ADA4800

800

1.2

700

600

500

400

0V TO 0.5V PULSE

300

INPUT TO OUTPUT DELAY TIME (ps)

200

11 1615141312

1V TO 0V PU LSE

0.5V TO 0V PULSE

0V TO 1V PU LSE

SUPPLY VOLTAGE (V)

Figure 10. Input to Output Delay Time vs. Supply Voltage

1.2

1.0

0.8

0.6

0.4

PULSE RESPONSE (V)

0.2

INPUT

OUTPUT

1.0

0.8

0.6

0.4

PULSE RESPONSE (V)

0.2

0

–0.2

01987654321

09162-009

OUTPUTINPUT

TIME (ns)

0

09162-013

Figure 13. Negative Pulse Response, 1 V to 0 V

2.5

2.0

1.5
INPUT

1.0

0.5

PULSE RESPONSE (V)

OUTPUT

PULSE RESPONSE (V)

0

–0.2

010864297531

TIME (ns)

Figure 11. Positive Pulse Response, 0 V to 1 V

2.5

2.0

1.5
INPUT

1.0

0.5

0

–0.5

01412108642

OUTPUT

TIME (ns)

Figure 12. Positive Pulse Response, 0 V to 2 V

0

–0.5

13 27252321191715

09162-010

TIME (ns)

09162-014

Figure 14. Negative Pulse Response, 2 V to 0 V

30

R

= 10kΩ

ISF

25

(mA)

AL

20

15

10

ACTIVE LOAD CURRENT, I

5

0

09162-011

–7.5 –5.5 –3.5 –1.5 0.5 2.5 4.5 6.5

Figure 15. Input Current vs. Voltage on ISF Pin (V

V

(V)

ISF

)

ISF

09162-018

Rev. A | Page 7 of 16

ADA4800

0.14

0.12

0.10

I

ISF

1.6

1.4

1.2

0.08

0.06

CURRENT (mA)

0.04

0.02

0

–40 80706050403020100–10–20–30

I

IDRV

TEMPERATURE (°C)

Figure 16. ISF and IDRV Currents vs. Temperature

0

–5

–10

–15

(mV)

–20

OS

V

–25

–30

–35

–40

–40 –15 10 35 60 85

TEMPERATURE (°C)

Figure 17. V

vs. Temperature

OS

1.0

0.8

(mA)

CC

I

0.6

0.4

0.2

0

09162-019

09162-020

–7.5 –5.5 –3.5 –1.5 0.5 2.5 4.5 6.5

Figure 18. ICC vs. Voltage on IDRV Pin (V

700
600
500
400
300
200
100

(mV)

0

OS

–100

V

–200
–300
–400
–500
–600
–700

02468101214

V

IDRV

VIN (V)

(V)

IDRV

)

09162-021

09162-022

Figure 19. Output Offset Voltage vs. Input Voltage

Rev. A | Page 8 of 16

ADA4800

3V

V

TEST CIRCUIT

ISF

0.1µF

R

ISF

10kΩ

0.11mA

ISF

6

I

SF

I

BUFF

I

1

2.96mA

7.5V

AL

IN

49.9Ω

Figure 20. Typical Current Flow

+

R

IDRV

10µF

VCC

VEE

4.68mA

249kΩ

I

DRV

ADA4800

22pF

7.5V

4

3

1.41mA

5

+1

2

0.05mA

IDRV

OUT
1kΩ10Ω

15V

09162-026

Rev. A | Page 9 of 16

ADA4800

−

THEORY OF OPERATION

The ADA4800 is a buffer integrated with an active load. Each
element (the active load and the buffer) operates independently,
as described in the following sections.

SETTING ACTIVE LOAD CURRENT WITH PIN 6 (ISF)

The ISF pin is used to establish the value of the active current
load (I

where:

V

V

R

The active load current (into the IN pin) is directly proportional
to I

The ADA4800 allows for additional power savings by reducing
the active load current. The active load current can be logically
controlled by connecting the ISF pin to any general-purpose
output (GPO) pin of a system microcontroller through an
external resistor. A GPO logic high enables the flow of the
active load current. Appling –V
ISF pin places the ADA4800 into power save mode by shutting
down the active load current.

). Set the ISF current using Equation 1.

AL

V

ISF

=

I

ISF

R

ISF

is referenced to Pin 2. V

ISF

, or a GPO output as explained in the following paragraphs.

CC

is the external resistor between the ISF pin and V

ISF

and can be calculated by Equation 2.

ISF

= I

I

× 27 (2)

AL

ISF

V55.1+−

(1)

k3

can be an external voltage source,

ISF

.

ISF

or connecting a high-Z to the

S

Figure 22 illustrates an ADA4800 application configuration for
using this power save feature.

An external resistor connected between the ISF and the
microcontroller GPO pin determines the amount of current
that flows into the input pin. This current can be calculated
by using Equation 1 and Equation 2.

SETTING BANDWIDTH WITH PIN 4 (IDRV)

The IDRV pin establishes the buffer’s ICC quiescent current.
As I

is increased, power dissipation and bandwidth both

CC

increase. Set the current using Equation 3.

V

I

IDRV

IDRV

=

R

IDRV

where:

V

is referenced to Pin 2. V

IDRV

source or V

R

is the external resistor between the IDRV pin and V

IDRV

The I

CC

.

CC

current is directly proportional to I

calculated by Equation 4.

I

= I

CC

Applying –V

× 26 (4)

IDRV

to the IDRV pin shuts down the buffer.

S

V8.0

(3)

k28

+

can be an external voltage

IDRV

.

IDRV

and can be

IDRV

Rev. A | Page 10 of 16

ADA4800

V

V

APPLICATIONS INFORMATION

OPEN SOURCE CCD OUTPUT BUFFER

With low power, high slew rate, and fast settling time, the
ADA4800 is the ideal solution for an output buffer for CCD
sensors with an open source output configuration. Figure 21
shows a typical application circuit for the ADA4800 as a CCD
sensor output buffer.

The output of the CCD is connected directly to the IN pin
of the ADA4800, whose OUT pin is then ac-coupled into
the input of the analog front end.

CCD

15V

0.1µF

ISF

R

ISF

120kΩ

ISF

6

I

ISF

I

BUFF

I

1

AL

IN VEE OUT

Figure 21. Typical Application Block Diagram

0.1µF

+

47µF

0.1µF

VCC

5

I

+1

2

IDRV

ADA4800

R
249kΩ

4

3

IDRV

IDRV

15V

AFE

To help reduce the effects of power supply noise coupling into
the ISF and IDRV pins, use 0.1 F ceramic bypass decoupling
capacitors. For best performance, place these capacitors as
close to each of these pins as is physically possible.

POWER SAVE MODE

The buffer of the ADA4800 consumes only 20 mW of static
power. To achieve even more power savings, the ADA4800
active load current can be switched off during standby mode
or reduced during monitoring mode. Figure 22 illustrates the

09162-027

ADA4800 as an open source CCD buffer configured for using
this power save feature. Power save mode allows I

current to

AL

be logically controlled by connecting the ISF pin to any general­purpose output (GPO) pin of the system microcontroller through
an external resistor. A GPO logic high enables the flow of input
sink current, while a logic low disables the input sink current
and asserts the power save mode.

0.1µF

ISF

R

ISF

10kΩ
ISF

6

I

ISF

I

BUFF

I

1

IN VEE OUT

0.1µF

AL

+

47µF

0.1µF

VCC

5

I

IDRV

ADA4800

+1

2

Figure 22. Using GPO to Drive ISF Voltage

R
249kΩ

4

3

IDRV

IDRV

15V

AFE

0V TO 3V
GPO PIN

CCD

Figure 23 shows an example of the ADA4800 power save feature.

GPO1

AFE

GPO2

MAIN BOARD FPC

Figure 23. Example Block Diagram for Sink Current Selection

20kΩ

20kΩ

ISF

ADA4800

09162-029

Three combinations of IAL are provided with Figure 23.
Selection of the I
the GPO1 and GPO2 pins. Tab le 5 summarizes the I

is controlled by the logic signals applied to

AL

selections.

AL

09162-028

Table 5. Input Sink Current Selection

Mode GPO1 GPO2 Resistance (kΩ) Active Load Current, IAL (mA)

Standby High-Z High-Z High-Z 0

0 0 N/A

Sleep High-Z 1 20 1.90

1 High-Z 20

Active 1 1 10 3.36

Rev. A | Page 11 of 16

ADA4800

VCC

POWER SUPPLY BYPASSING

Attention must be paid to bypassing the power supply pin of
the ADA4800. Use high quality capacitors with low equivalent
series resistance (ESR), such as multilayer ceramic capacitors
(MLCCs), to minimize supply voltage ripple and power dissipa­tion. A large, usually tantalum, 2.2 F to 47 F capacitor located
in close proximity to the ADA4800 is required to provide good
decoupling for lower frequency signals. The actual value is
determined by the circuit transient and frequency requirements. In
addition, 0.1 F MLCC decoupling capacitors should be located
as close to the power supply pin as is physically possible, no more
than ⅛ inch away. The ground returns should terminate imme­diately into the ground plane. Locating the bypass capacitor
return close to the load return minimizes ground loops and
improves performance.

POWER SEQUENCING

All I/O pins are ESD protected with internal back-to-back
diodes connected to VCC and GND as shown in Figure 24.
With the ADA4800 supply turned off (V
an I/O pin can turn on the protection diodes and cause permanent
damage or destroy the IC. To prevent this condition during
power-on, no voltages should be applied to any I/O pins until
VCC is fully on and settled. During power-off, I/O pin voltages
should be removed or reduced to 0 V before VCC is turned off.

EXTERNAL

PIN

Figure 24. Simplified Input/Output Circuitry

ADA4800

In the presence of a voltage on an I/O pin with VCC = 0 V, the
current should be limited to 5 mA or less by the source or by
adding a series resistor.

= 0 V), a voltage on

CC

09162-030

Rev. A | Page 12 of 16

ADA4800

OUTLINE DIMENSIONS

1.15

1.65

1.60 SQ

1.55

1.05

0.95

4

0.50 BSC

6

PIN 1 INDEX

AREA

0.60

0.55

0.50

SEATING

PLANE

0.30

0.25

0.20

TOP VIEW

0.375

0.300

0.225

0.05 MAX

0.02 NOM

0.152 REF

EXPOSED

PAD

3

BOTTOM VIEW

FOR PROPER CONNECTION OF
THE EXPOSED PAD, REFER TO
THE PIN CONFIGURATION AND
FUNCTION DESCRIPTIONS
SECTION OF THIS DATA SHEET.

1

0.60

0.50

0.40

N

1

P

I

R

O

T

D

C

I

A

N

I

)

5

1

.

0

R

(

101409-A

Figure 25. 6-Lead Lead Frame Chip Scale Package [LFCSP_UD]

1.60 mm × 1.60 mm Body, Ultra Thin, Dual Lead
(CP-6-4)

Dimensions shown in millimeters

ORDERING GUIDE

Model1 Temperature Range Package Description Package Option Branding

ADA4800ACPZ-R2 −40°C to +85°C 6-Lead Lead Frame Chip Scale Package [LFCSP_UD] CP-6-4 H2E
ADA4800ACPZ-R7 −40°C to +85°C 6-Lead Lead Frame Chip Scale Package [LFCSP_UD] CP-6-4 H2E
ADA4800ACPZ-RL −40°C to +85°C 6-Lead Lead Frame Chip Scale Package [LFCSP_UD] CP-6-4 H2E

1

Z = RoHS Compliant Part.

Rev. A | Page 13 of 16

ADA4800

NOTES

Rev. A | Page 14 of 16

ADA4800

NOTES

Rev. A | Page 15 of 16

ADA4800

NOTES

©2010 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D09162-0-7/10(A)

Rev. A | Page 16 of 16