Datasheet ADA4691-2, ADA4691-4, ADA4692-2, ADA4692-4 Datasheet (ANALOG DEVICES)

Low Power, 3.6 MHz, Low Noise, Rail-to-

–

ADA4691-2/ADA4691-4/ADA4692-2/ADA4692-4

FEATURES

Low power: 180 μA typical
Very low input bias currents: 0.5 pA typical
Low noise: 16 nV/√Hz typical

3.6 MHz bandwidth
Offset voltage: 500 μV typical
Low offset voltage drift: 4 μV/°C maximum
Low distortion: 0.003% THD + N

2.7 V to 5 V single supply or ±1.35 V to ±2.5 V dual supply
Available in very small 2 mm × 2 mm LFCSP packages

APPLICATIONS

Photodiode amplifiers
Sensor amplifiers
Portable medical and instrumentation
Portable audio: MP3s, PDAs, and smartphones
Communications
Low-side current sense
ADC drivers
Active filters
Sample-and-hold

GENERAL DESCRIPTION

The ADA4691-2/ADA4692-2 are dual and the ADA4691-4/
ADA4692-4 are the quad rail-to-rail output, single-supply
amplifiers featuring low power, wide bandwidth, and low noise.
The ADA4691-2 has two independent shutdown pins, allowing
further reduction in supply current. The ADA4691-4 is a quad
with dual shutdown pins each controlling a pair of amplifiers
and is available in the 16-lead LFCSP. The ADA4692-4 is a quad
version without shutdown.

These amplifiers are ideal for a wide variety of applications.
Audio, filters, photodiode amplifiers, and charge amplifiers, all
benefit from this combination of performance and features.
Additional applications for these amplifiers include portable
consumer audio players with low noise and low distortion that
provide high gain and slew rate response over the audio band at
low power. Industrial applications with high impedance sensors,
such as pyroelectric and IR sensors, benefit from the high
impedance and low 0.5 pA input bias, low offset drift, and
enough bandwidth and response for low gain applications.

Rail Output, Operational Amplifiers

The ADA4691/ADA4692 family is fully specified over the extended
industrial temperature range (−40°C to +125°C). e ADA4691-2
is available in a 10-lead LFCSP and a 9-ball WLCSP. The ADA4692-2
is available in an 8-lead SOIC and 8-lead LFCSP. The ADA4691-4 is
available in a 16-lead LFCSP. The ADA4692-4 is available in a 14-lead
TSSOP. For pin configurations, see the Pin Configurations section.

1

ADA4692-2
V

= ±2.5V

SY

A

= –1

V

T

= 25°C

A

0.1

RL = 600Ω

THD + N (%)

0.01

0.001
10 100 1k 10k 20k

Figure 1. THD + Noise vs. Frequency

80

ADA4692-2
V

= ±2.5V

SY

V

= 2.8V p- p

IN

–90

A

= +1

V

T

= 25°C

A

–100

–110

–120

CHANNEL SEPARATI ON (dB)

–130

–140

100 1k 10k 100k

Figure 2. Channel Separation vs. Frequency

FREQUENCY (Hz)

FREQUENCY (Hz)

R

= 2kΩ

L

07950-142

07950-141

Table 1.

Micropower Low Power Low Power with Shutdown Standard Op Amp With Shutdown High Bandwidth

Single AD8613 AD8591 AD8691
Dual AD8617 ADA4692-2 ADA4691-2 AD8592 AD8692
Quad AD8619 ADA4692-4 ADA4691-4 AD8594 AD8694

Rev. D

Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: [phone] www.analog.com
Fax: [phone] ©2009–2010 Analog Devices, Inc. All rights reserved.

ADA4691-2/ADA4691-4/ADA4692-2/ADA4692-4

TABLE OF CONTENTS

Features.............................................................................................. 1

Applications....................................................................................... 1

General Description ......................................................................... 1

Revision History ............................................................................... 2

Specifications..................................................................................... 3

Electrical Characteristics—2.7 V Operation ............................ 3

Electrical Characteristics—5 V Operation................................ 4

Absolute Maximum Ratings............................................................ 6

Thermal Resistance ...................................................................... 6

REVISION HISTORY

11/10—Rev. C to Rev. D

Changed 5 V to 6 V in Endnote 2, Table 4 .................................... 6

12/09—Rev. B to Rev. C

Added ADA4691-4, 16-Lead LFCSP ..........................Throughout

Added Figure 1, Figure 2, and Table 1; Renumbered

Sequentially ....................................................................................... 1

Changes to Applications Section and General Description

Section................................................................................................ 1

Changes to Table 1............................................................................ 3

Changes to Table 2............................................................................ 4

Changes to Table 4............................................................................ 6

Updated Outline Dimensions....................................................... 17

Changes to Ordering Guide.......................................................... 20

9/09—Rev. A to Rev. B

Added ADA4691-2, 9-Ball WLCSP; ADA4692-2, 8-Lead

LFCSP; and ADA4692-4, 14-Lead TSSOP................. Throughout

Changes to General Description .................................................... 1

Updated Outline Dimensions....................................................... 16

Changes to Ordering Guide.......................................................... 17

ESD Caution...................................................................................6

Pin Configurations............................................................................7

Typical Performance Characteristics..............................................8

Shutdown Operation...................................................................... 16

Input Pin Characteristics........................................................... 16

Input Threshold.......................................................................... 16

Outline Dimensions....................................................................... 17

Ordering Guide .......................................................................... 20

6/09—Rev. 0 to Rev. A

Added ADA4691-2, 10 Lead LFCSP........................... Throughout

Changes to Table 1.............................................................................3

Changes to Table 2.............................................................................4

Changes to Captions for Figure 40, Figure 41, Figure 43, and

Figure 44 .......................................................................................... 13

Added Shutdown Operations Section ......................................... 15

Updated Outline Dimensions....................................................... 16

Changes to Ordering Guide.......................................................... 16

3/09—Revision 0: Initial Version

Rev. D | Page 2 of 20

ADA4691-2/ADA4691-4/ADA4692-2/ADA4692-4

SPECIFICATIONS

ELECTRICAL CHARACTERISTICS—2.7 V OPERATION

VSY = 2.7 V, VCM = VSY/2, TA = 25°C, unless otherwise specified.

Table 2.

Parameter Symbol Test Conditions/Comments Min Typ Max Unit

INPUT CHARACTERISTICS

Offset Voltage VOS V

Dual (ADA469x-2) VCM = −0.1 V to +1.6 V; −40°C < TA < +125°C 3.5 mV
Quad (ADA469x-4) VCM = −0.1 V to +1.6 V; −40°C < TA < +125°C 4.0 mV

Offset Voltage Drift ΔVOS/ΔT −40°C < TA < +125°C 1 4 μV/°C

Input Bias Current IB 0.5 5 pA

−40°C < TA < +125°C 360 pA

Input Offset Current IOS 1 8 pA

−40°C < TA < +125°C 225 pA
Input Voltage Range −40°C < TA < +125°C −0.3 +1.6 V
Common-Mode Rejection Ratio CMRR VCM = −0.3 V to +1.6 V 70 90 dB

V

Large Signal Voltage Gain AVO R

−40°C < TA < +85°C 80 dB

−40°C < TA < +125°C 63 dB
R
Input Capacitance CIN

Differential Mode C
Common Mode C

2.5 pF

INDM

7 pF

INCM

Logic High Voltage (Enabled) VIH −40°C < TA < +125°C 1.6 V
Logic Low Voltage (Power-Down) VIL −40°C < TA < +125°C 0.5 V
Logic Input Current (Per Pin) IIN −40°C < TA < +125°C, 0 V ≤ VSD ≤ 2.7 V 1 μA

OUTPUT CHARACTERISTICS

Output Voltage High VOH R

−40°C < TA < +125°C 2.6 V
R

−40°C < TA < +125°C 2.5 V
Output Voltage Low VOL R

−40°C < TA < +125°C 40 mV
R

−40°C < TA < +125°C 130 mV
Short-Circuit Current ISC V
Closed-Loop Output Impedance Z

f = 1 MHz, AV = −100 372 Ω

OUT

Output Pin Leakage Current −40°C < TA < +125°C, shutdown active, VSD = VSS 10 nA

POWER SUPPLY

Power Supply Rejection Ratio PSRR VS = 2.7 V to 5.5 V 80 90 dB

−40°C < TA < +125°C 75 dB
Supply Current Per Amplifier ISY V

−40°C < TA < +125°C 240 μA

Supply Current Shutdown Mode ISD All amplifiers shut down, VSD = V

−40°C < TA < +125°C 2 μA

= −0.3 V to +1.6 V 0.5 2.5 mV

CM

= −0.1 V to +1.6 V; −40°C < TA < +125°C 62 dB

CM

= 2 kΩ, V

L

= 600 Ω, V

L

= 2 kΩ to GND 2.65 2.67 V

L

= 600 Ω to GND 2.55 2.59 V

L

= 2 kΩ to VSY 24 30 mV

L

= 600 Ω to VSY 78 95 mV

L

= VSY or GND ±15 mA

OUT

= VSY/2 165 200 μA

OUT

= 0.5 V to 2.2 V 90 100 dB

OUT

= 0.5 V to 2.2 V 85 95 dB

OUT

10 nA

SS

Rev. D | Page 3 of 20

ADA4691-2/ADA4691-4/ADA4692-2/ADA4692-4

Parameter Symbol Test Conditions/Comments Min Typ Max Unit

DYNAMIC PERFORMANCE

Slew Rate SR RL = 600 Ω, CL = 20 pF, AV = +1 1.1 V/μs
R
Settling Time to 0.1% tS Step = 0.5 V, RL = 2 kΩ, 600 Ω 1 μs
Gain Bandwidth Product GBP RL = 1 MΩ, CL = 35 pF, AV = +1 3.6 MHz
Phase Margin ΦM R
Turn- On/Tu rn-Off Time RL = 600 Ω 1 μs

NOISE PERFORMANCE

Distortion THD + N AV = −1, RL = 2 kΩ, f = 1 kHz, VIN rms = 0.15 V rms 0.009 %

A

Voltage Noise en p-p f = 0.1 Hz to 10 Hz 3.1 μV p-p
Voltage Noise Density en f = 1 kHz 16 nV/√Hz
f = 10 kHz 13 nV/√Hz

ELECTRICAL CHARACTERISTICS—5 V OPERATION

VSY = 5 V, VCM = VSY/2, TA = 25°C, unless otherwise specified.

Table 3.

Parameter Symbol Test Conditions/Comments Min Typ Max Unit

INPUT CHARACTERISTICS

Offset Voltage VOS V

Dual (ADA469x-2) VCM = −0.1 V to +3.9 V; −40°C < TA < +125°C 3.5 mV
Quad (ADA469x-4) VCM = −0.1 V to +3.9 V; −40°C < TA < +125°C 4.0 mV

Offset Voltage Drift ΔVOS/ΔT −40°C < TA < +125°C 1 4 μV/°C

Input Bias Current IB 0.5 5 pA

−40°C < TA < +125°C 360 pA
Input Offset Current IOS 1 8 pA

−40°C < TA < +125°C 260 pA
Input Voltage Range −40°C < TA < +125°C −0.3 +3.9 V
Common-Mode Rejection Ratio CMRR VCM = −0.3 V to +3.9 V 75 98 dB

V

Large Signal Voltage Gain AVO R

−40°C < TA < +85°C 80 dB

−40°C < TA < +125°C 70 dB

R

Input Capacitance

Differential Mode C

Common Mode C
Logic High Voltage (Enabled) VIH −40°C < TA < +125°C 2.0 V
Logic Low Voltage (Power-Down) VIL −40°C < TA < +125°C 0.8 V
Logic Input Current (Per Pin) IIN −40°C < TA < +125°C, 0 V ≤ VSD ≤ 2.7 V 1 μA

2.5 pF

INDM

7 pF

INCM

= 2 kΩ, CL = 20 pF, AV = +1 1.4 V/μs

L

= 1 MΩ, CL = 35 pF, AV = +1 49 Degrees

L

= −1, RL = 600 Ω, f = 1 kHz, VIN rms = 0.15 V rms 0.01

A

V

= +1, RL = 2 kΩ, f = 1 kHz, VIN rms = 0.15 V rms 0.006 %

V

= +1, RL = 600 Ω, f = 1 kHz, VIN rms = 0.15 V rms 0.009

A

V

= −0.3 V to +3.9 V 0.5 2.5 mV

CM

= −0.1 V to +3.9 V; −40°C < TA < +125°C 68 dB

CM

= 2 kΩ, VO = 0.5 V to 4.5 V, VCM = 0 V 95 110 dB

L

= 600 Ω, VO = 0.5 V to 4.5 V, VCM = 0 V 90 100 dB

L

%

%

Rev. D | Page 4 of 20

ADA4691-2/ADA4691-4/ADA4692-2/ADA4692-4

Parameter Symbol Test Conditions/Comments Min Typ Max Unit

OUTPUT CHARACTERISTICS

Output Voltage High VOH R

−40°C ≤ TA ≤ +125°C 4.90 V
R

−40°C ≤ TA ≤ +125°C 4.80 V
Output Voltage Low VOL R

−40°C ≤ TA ≤ +125°C 50 mV
R

−40°C ≤ TA ≤ +125°C 155 mV
Short-Circuit Limit ISC V
Closed-Loop Output Impedance Z

ADA4691-2, f = 1 MHz, AV = −100 364 Ω

OUT

ADA4691-2, f = 1 MHz, AV = −100 246 Ω
Output Pin Leakage Current −40°C < TA < +125°C, shutdown active, VSD = VSS 10 nA

POWER SUPPLY

Power Supply Rejection Ratio PSRR VSY = 2.7 V to 5.5 V 80 90 dB

−40°C ≤ TA ≤ +125°C 75 dB
Supply Current Per Amplifier ISY V

−40°C ≤ TA ≤ +125°C 275 μA

Supply Current Shutdown Mode ISD All amplifiers shut down, VSD = V

−40°C ≤ TA ≤ +125°C 2 μA

DYNAMIC PERFORMANCE

Slew Rate SR RL = 2 kΩ, 600 Ω, CL = 20 pF, AV = +1 1.3 V/μs
Settling Time to 0.1% tS V
Gain Bandwidth Product GBP RL = 1 MΩ, CL = 35 pF, AV = +1 3.6 MHz
Phase Margin ΦM R
Turn- On/Tu rn-Off Time RL = 600 Ω 1 μs

NOISE PERFORMANCE

Distortion THD + N AV = −1, RL = 2 kΩ, f = 1 kHz, VIN rms = 0.8 V rms 0.006 %

Voltage Noise en p-p f = 0.1 Hz to 10 Hz 3.2 μV p-p
Voltage Noise Density en f = 1 kHz 16 nV/√Hz
e

f = 10 kHz 13 nV/√Hz

n

= 2 kΩ 4.95 4.97 V

L

= 600 Ω to GND 4.85 4.88 V

L

= 2 kΩ 30 35 mV

L

= 600 Ω 100 110 mV

L

= VSY or GND ±55 mA

OUT

= VSY/2 180 225 μA

OUT

10 nA

SS

= 2 V step, RL = 2 kΩ or 600 Ω 1.5 μs

IN

= 1 MΩ, CL = 35 pF, AV = +1 52 Degrees

L

= −1, RL = 600 Ω, f = 1 kHz, VIN rms = 0.8 V rms 0.008 %

A

V

= +1, RL = 2 kΩ, f = 1 kHz, VIN rms = 0.8 V rms 0.001 %

A

V

= +1, RL = 600 Ω, f = 1 kHz, VIN rms = 0.8 V rms 0.003 %

A

V

Rev. D | Page 5 of 20

ADA4691-2/ADA4691-4/ADA4692-2/ADA4692-4

ABSOLUTE MAXIMUM RATINGS

Table 4.

Parameter Rating

Supply Voltage 6 V
Input Voltage VSS − 0.3 V to VDD + 0.3 V
Input Current1 ±10 mA
Shutdown Pin Rise/Fall Times 50 μs maximum
Differential Input Voltage2 ±VSY
Output Short-Circuit Duration to GND Indefinite
Temperature

Storage Temperature Range −65°C to +150°C
Operating Temperature Range −40°C to +125°C
Junction Temperature Range −65°C to +150°C
Lead Temperature (Soldering, 60 sec) 300°C

1

Input pins have clamp diodes to the supply pins. Limit the input current to

10 mA or less whenever the input signal exceeds the power supply rail by 0.3 V.

2

Differential input voltage is limited to 6 V or the supply voltage, whichever

is less.

Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.

THERMAL RESISTANCE

θJA is specified for the worst-case conditions, that is, a device
soldered in a circuit board for surface-mount packages and
measured using a standard 4-layer board, unless otherwise
specified.

Table 5. Thermal Resistance

Package Type θJA θ

8-Lead SOIC_N (R-8) 120 45 °C/W
8-Lead LFCSP (CP-8-6) 125 40 °C/W
9-Ball WLCSP (CB-9-3) 77 N/A1 °C/W
10-Lead LFCSP (CP-10-11) 115 40 °C/W
16-Lead LFCSP (CP-16-22) 75 12 °C/W
14-Lead TSSOP (RU-14) 112 35 °C/W

1

N/A = not applicable.

ESD CAUTION

Unit

JC

Rev. D | Page 6 of 20

ADA4691-2/ADA4691-4/ADA4692-2/ADA4692-4

A

A

PIN CONFIGURATIONS

BALL A1
CORNER

OUT B V+ OUT A

A3

A2

A1

–IN B SD A/B –IN A

B3

B2

B1

+IN B V– +IN A

C3

C2

C1

ADA4691-2

TOP VIEW

(BALL SIDE DOW N)

Not to Scale

07950-058

Figure 3. 9-Ball Wafer Level Chip Scale WLCSP (CB-9-3)

V+

OUT

9

10

1

–IN A
+IN

2
3

V–

ADA4691-2

TOP VIEW

(Not to S cale)

4

SD A

OUT B

8

–IN B

7
6

+IN B

5

SD B

07950-002

Figure 4. 10-Lead, 2 mm × 2 mm LFCSP (CP-10-11)

Figure 6. 8-Lead, 2 mm × 2 mm LFCSP (CP-8-6)

1OUT A

ADA4692-2

2–IN A

TOP VIEW

(Not to S cale)

3+IN A

4V–

8V+
7OUT B
6 –IN B
5 +IN B

OUT A

–IN
+IN

V–

1

ADA4692-2

2
3

TOP VIEW

(Not to Scale)

4

8
7
6
5

Figure 7. 8-Lead SOIC_N (R-8)

1

1

OUT A

–IN A
+IN A

+IN B
–IN B

OUT B

V+

2

2

3

3

ADA4692-4

TOP VIEW

TOP VIEW

4

4

(Not to Scale)

(Not to Scale)

5

5
6

6

7

7

14

14

13

13

12

12

11

11

10

10

9

9

8

8

Figure 8. 14-Lead TSSOP (RU-14)

V+
OUT B
–IN B
+IN B

OUT D
–IN D
+IN D
V–
+IN C
–IN C
OUT C

07950-016

07950-001

07950-059

–IN A

OUT A

OUT D

16

1

+IN A

2

V+

ADA4691-4

3

+IN B

4

–IN B

5

OUT B

TOP VIEW

NOTES

1. IT IS RECOMMENDED THAT THE EXPOSED
PAD BE CONNCECTED TO V–.

(Not to S cale)

–IN D
13

15

14

12

+IN D

11

V–

10

+IN C

9

–IN C

8

7

6
A/B

OUT C

SD

SD C/D

07950-060

Figure 5. 16-Lead, 3 mm × 3 mm LFCSP (CP-16-22)

Rev. D | Page 7 of 20

ADA4691-2/ADA4691-4/ADA4692-2/ADA4692-4

TYPICAL PERFORMANCE CHARACTERISTICS

TA = 25°C, unless otherwise noted.

350

ADA4692-2
V

= 2.7V

SY

T

= 25°C

300

A

–0.3V ≤ V

250

≤ +1.6V

CM

SIGNIFIES CENTER
OF BIN

700

ADA4692-2
V

SY

T

= 25°C

600

A

–0.3V ≤ V

SIGNIFIES CENTER
OF BIN

500

= 5V

≤ +3.9V

CM

200

150

100

NUMBER OF AMPLIFIERS

50

0

–2.0 –1.6 –1.2 –0.8 –0.4 0 0.4 0.8 1.2 1.6 2.0

VOS (mV)

Figure 9. Input Offset Voltage Distribution

30

25

20

15

10

NUMBER OF AMPL IFIERS

5

0

0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 2.2 2.4

TCVOS (µV/°C)

ADA4692-2
V

= ±1.35V

SY

–40°C < T

SIGNIFIES CENTER
OF BIN

Figure 10. Input Offset Voltage Drift Distribution

2.0

1.5

1.0

ADA4692-2
V

= 2.7V

SY

T

= 25°C

A

< +125°C

A

400

300

200

NUMBER OF AMPLIFIERS

100

0

–2.0 –1.6 –1.2 –0.8 –0.4 0 0.4 0.8 1.2 1.6 2.0

07950-003

VOS (mV)

07950-006

Figure 12. Input Offset Voltage Distribution

30

25

20

15

10

NUMBER OF AMPL IFIERS

5

0

0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 2.2 2.4

07950-004

TCVOS (µV/°C)

ADA4692-2
V

= ±2.5V

SY

–40°C < T

< +125°C

A

SIGNIFIES CENTER
OF BIN

07950-007

Figure 13. Input Offset Voltage Drift Distribution

2.0

1.5

1.0

ADA4692-2
V

= 5V

SY

T

= 25°C

A

0.5

(mV)

0

OS

V

–0.5

–1.0

–1.5

–2.0

–0.5 2.52.01.51.00.50

VCM (V)

Figure 11. Input Offset Voltage vs. Common-Mode Voltage

07950-005

Rev. D | Page 8 of 20

0.5

(mV)

0

OS

V

–0.5

–1.0

–1.5

–2.0

–0.5 5.02.02.53.03.54.04.51.51.00.50

VCM (V)

Figure 14. Input Offset Voltage vs. Common-Mode Voltage

07950-008

ADA4691-2/ADA4691-4/ADA4692-2/ADA4692-4

1k

ADA4692-2
V

= ±1.35V

SY

T

= 25°C

A

AVERAGE 20 CHANNELS

100

1k

ADA4692-2
V

= ±2.5V

SY

T

= 25°C

A

AVERAGE 20 CHANNELS

100

10

(pA)

B

I

1

0.1

0.01
25 12511510595857565554535

TEMPERATURE ( °C)

Figure 15. Input Bias Current vs. Temperature

(pA)

B

I

100

0.1

0.01

0.001

1k

10

1

02.72.42.11.81.51.20.90.60.3

ADA4692-2
V
AVERAGE 20 CHANNELS

SY

TA = 125°C

TA = 85°C

TA = 25°C

= 2.7V

VCM (V)

Figure 16. Input Bias Current vs. Common-Mode Voltage

10k

ADA4692-2
V

= ±1.35V

SY

V

= (V+) – V

1k

100

10

1

OH

(SOURCING)

OUT

TA = +125°C

TA = +85°C

TA = +25°C

TA = –40°C

10

(pA)

B

I

1

0.1

0.01
25 12511510595857565554535

07950-009

TEMPERATURE ( °C)

07950-012

Figure 18. Input Bias Current vs. Temperature

1k

TA = 125°C

100

10

(pA)
I

07950-010

TA = 85°C

B

1

TA = 25°C

0.1

0.01

054.54.03.53.02.52.01.51.00.5

ADA4692-2
V

= 5V

SY

AVERAGE 20 CHANNELS

VCM (V)

.0

07950-013

Figure 19. Input Bias Current vs. Common-Mode Voltage

10k

ADA4692-2
V

= ±2.5V

SY

V

= (V+) – V

1k

100

10

1

OH

(SOURCING)

OUT

TA = +125°C

TA = +85°C

TA = +25°C

TA = –40°C

0.1

OUTPUT SATURATION VO LTAGE (mV)

0.01

0.001 1001010.10.01

Figure 17. Output Voltage (V

I

(mA)

LOAD

) to Supply Rail vs. Load Current

OH

07950-011

Rev. D | Page 9 of 20

0.1

OUTPUT SATURATION VO LTAGE (mV)

0.01

0.001 1001010.10.01

Figure 20. Output Voltage (V

I

(mA)

LOAD

) to Supply Rail vs. Load Current

OH

07950-014

ADA4691-2/ADA4691-4/ADA4692-2/ADA4692-4

10k

ADA4692-2
V

= ±1.35V

SY

V

= V

– (V–)

OL

(SINKING)

OUT

TA = +125°C

TA = +85°C

TA = +25°C

TA = –40°C

1k

100

10

1

10k

1k

100

10

ADA4692-2
V

SY

V

OL

(SINKING)

1

= ±2.5V
= V

OUT

– (V–)

TA = +125°C

TA = +85°C

TA = +25°C

TA = –40°C

0.1

OUTPUT SAT URATION VOLTAGE (mV)

0.01

0.001 1001010.10.01

Figure 21. Output Voltage (V

I

(mA)

LOAD

) to Supply Rail vs. Load Current

OL

120

100

80

60

40

20

GAIN (dB)

0

–20

ADA4692-2
V

= ±1.35V

SY

–40

T

= 25°C

A

A

= –1

V

–60

1k 10M1M100k10k

= 20pF

C

L

FREQUENCY (Hz)

Figure 22. Open-Loop Gain and Phase vs. Frequency

50

AV = +100

40

= 200pF

C

L

120

100

80

60

40

20

0

–20

–40

–60

PHASE (Degrees)

0.1

OUTPUT SAT URATION VOLTAGE (mV)

0.01

0.001 1001010.10.01

07950-015

Figure 24. Output Voltage (V

I

(mA)

LOAD

) to Supply Rail vs. Load Current

OL

07950-018

120

100

80

60

40

20

GAIN (dB)

0

–20

ADA4692-2
V

= ±2.5V

SY

–40

T

= 25°C

A

A

= –1

V

–60

1k 10M1M100k10k

07950-021

= 20pF

C

L

FREQUENCY (Hz)

= 200pF

C

L

120

100

80

60

40

20

0

–20

–40

–60

PHASE (Degrees)

07950-024

Figure 25. Open-Loop Gain and Phase vs. Frequency

50

AV = +100

40

30

AV = +10

20

10

AV = +1

GAIN (dB)

0

–10

ADA4692-2
V

= ±1.35V

SY

–20

T

= 25°C

A

R

= 600Ω

L

–30

10 100 1k 10k 100k 1M 10M

FREQUENCY (Hz)

Figure 23. Closed-Loop Gain vs. Frequency

07950-022

Rev. D | Page 10 of 20

30

AV = +10

20

10

AV = +1

GAIN (dB)

0

–10

ADA4692-2
V

= ±2.5V

SY

–20

T

= 25°C

A

R

= 600Ω

L

–30

10 100 1k 10k 100k 1M 10M

FREQUENCY (Hz)

Figure 26. Closed-Loop Gain vs. Frequency

07950-025

ADA4691-2/ADA4691-4/ADA4692-2/ADA4692-4

1k

1k

100

AV = –100

10

(Ω)

OUT

AV = –10

Z

1

0.1

0.01
100 1k 10k 100k 1M 10M

AV = –1

FREQUENCY (Hz)

ADA4692-2
V

= ±1.35V

SY

T

= 25°C

A

Figure 27. Output Impedance vs. Frequency

120

100

80

60

CMRR (dB)

40

20

ADA4692-2
V

= ±1.35V

SY

T

= 25°C

A

0

100 1k 10k 100k 1M 10M

FREQUENCY (Hz)

Figure 28. CMRR vs. Frequency

100

PSRR–

100

AV = –100

10

(Ω)

AV = –10

OUT

Z

1

AV = –1

0.1

0.01
100 1k 10k 100k 1M 10M

07950-023

FREQUENCY (Hz)

ADA4692-2
V

= ±2.5V

SY

T

= 25°C

A

07950-026

Figure 30. Output Impedance vs. Frequency

120

100

80

60

CMRR (dB)

40

20

ADA4692-2
V

= ±2.5V

SY

T

= 25°C

A

0

100 1k 10k 100k 1M 10M

07950-027

FREQUENCY (Hz)

07950-030

Figure 31. CMRR vs. Frequency

100

PSRR+

80

PSRR+

60

40

PSRR (dB)

20

0

ADA4692-2
V

= ±1.35V

SY

T

= 25°C

A

–20

100 1k 10k 100k 1M 10M

FREQUENCY (Hz)

Figure 29. PSRR vs. Frequency

07950-028

Rev. D | Page 11 of 20

80

PSRR–

60

40

PSRR (dB)

20

0

ADA4692-2
V

= ±2.5V

SY

T

= 25°C

A

–20

100 1k 10k 100k 1M 10M

FREQUENCY (Hz)

Figure 32. PSRR vs. Frequency

07950-031

ADA4691-2/ADA4691-4/ADA4692-2/ADA4692-4

1k

1k

100

VOLTAGE NOISE DENSI TY (nV/ Hz )

ADA4692-2
V

= ±1.35V

SY

T

= 25°C

A

10

0.1 1 10 100 1k 10k
FREQUENCY (Hz)

Figure 33. Voltage Noise Density vs. Frequency

50

ADA4692-2
V

= ±1.35V

SY

45

V

= 100mV p-p

IN

A

= +1

V

40

R

= 2kΩ

L

T

= 25°C

A

35

30

25

20

OVERSHOOT (%)

15

10

5

0

10 100 1k

OVERSHOOT+

OVERSHOOT–

CAPACITANCE (pF)

Figure 34. Small Signal Overshoot vs. Load Capacitance

100

VOLTAGE NOISE DENSI TY (nV/ Hz )

ADA4692-2
V

= ±2.5V

SY

T

= 25°C

A

10

0.1 1 10 100 1k 10k

07950-029

FREQUENCY (Hz)

07950-032

Figure 36. Voltage Noise Density vs. Frequency

45

ADA4692-2
V

= ±2.5V

SY

40

V

= 100mV p-p

IN

A

= +1

V

35

R

= 2kΩ

L

T

= 25°C

A

30

25

20

OVERSHOOT (%)

15

10

5

0

10 100 1k

07950-033

OVERSHOOT+

CAPACITANCE (pF)

OVERSHOOT–

07950-036

Figure 37. Small Signal Overshoot vs. Load Capacitance

OUTPUT (500mV/DIV)

ADA4692-2
V

= ±1.35V

SY

GAIN = +1
R

= 2kΩ

L

C

= 300pF

L

T

= 25°C

A

TIME (2µs/DIV)

Figure 35. Large Signal Transient Response

07950-034

Rev. D | Page 12 of 20

OUTPUT (500mV/DIV)

ADA4692-2
V

= ±2.5V

SY

GAIN = +1
R

= 2kΩ,

L

C

= 300pF

L

T

= 25°C

A

TIME (2µs/DIV)

Figure 38. Large Signal Transient Response

07950-037

ADA4691-2/ADA4691-4/ADA4692-2/ADA4692-4

T

OUTPUT (20mV /DIV)

ADA4692-2
V

= ±1.35V

SY

GAIN = +1
R

= 2kΩ

L

C

= 200pF

L

T

= 25°C

A

TIME (2µs/DIV)

Figure 39. Small Signal Transient Response

OUTPUT (1µV/DIV)

ADA4692-2
V

= ±1.35V

SY

GAIN = +1M
T

= 25°C

A

TIME (1s/DIV)

Figure 40. 0.1 Hz to 10 Hz Noise

250

ADA4692-2

T

200

= +85°C

A

TA = +125°C

OUTPUT (20mV /DIV)

07950-035

ADA4692-2
V

= ±2.5V

SY

GAIN = +1
R

= 2kΩ

L

C

= 200pF

L

T

= 25°C

A

TIME (2µs/DIV)

07950-038

Figure 42. Small Signal Transient Response

OUTPUT (1µV/DIV)

ADA4692-2
V

= ±2.5V

SY

GAIN = +1M
T

= 25°C

A

7950-040

TIME (1s/DIV)

07950-043

Figure 43. 0.1 Hz to 10 Hz Noise

250

ADA4692-2

225

= +25°C

T

150

100

/CHANNEL (µA)

SY

I

50

0

05.04.54.03.53.02.52.01.51.00.5
VSY (V)

A

T

= –40°C

A

Figure 41. Supply Current per Amplifier vs. Supply Voltage

07950-135

Rev. D | Page 13 of 20

200

= ±2.5V

V

SY

175

/AMPLIFIER (µA)

SY

I

150

125

–40 1251109580655035205–10–25

V

= ±1.35V

SY

TEMPERATURE (°C)

Figure 44. Supply Current per Channel vs. Temperature

07950-138

ADA4691-2/ADA4691-4/ADA4692-2/ADA4692-4

1

ADA4692-2
V

= ±1.35V

SY

A

= –1

V

T

= 25°C

A

1

ADA4692-2
V

SY

A

V

T

A

= ±2.5V

= –1

= 25°C

0.1

RL = 600Ω

THD + N (%)

0.01

0.001
10 100 1k 10k 20k

FREQUENCY (Hz)

R

L

Figure 45. THD + Noise vs. Frequency

50mV/DIV

ADA4692-2
V

= ±1.35V

SY

T

= 25°C

A

1V/DIV

TIME (4µs/DIV)

Figure 46. Positive Overload Recovery

= 2kΩ

0.1

RL = 600Ω

THD + N (%)

0.01

0.001
10 100 1k 10k 20k

07950-042

FREQUENCY (Hz)

R

= 2kΩ

L

07950-045

Figure 48. THD + Noise vs. Frequency

50mV/DIV

ADA4692-2
V

= ±2.5V

SY

A

= –100

V

T

= 25°C

A

07950-050

1V/DIV

TIME (4µs/DIV)

07950-051

Figure 49. Positive Overload Recovery

50mV/DIV

1V/DIV

ADA4692-2
V

= ±1.35V

SY

T

= 25°C

A

TIME (4µs/DIV)

Figure 47. Negative Overload Recovery

07950-052

Rev. D | Page 14 of 20

50mV/DIV

1V/DIV

ADA4692-2
V

SY

A

= –100

V

T

= 25°C

A

TIME (4µs/DIV)

Figure 50. Negative Overload Recovery

= ±2.5V

07950-053

ADA4691-2/ADA4691-4/ADA4692-2/ADA4692-4

–

ERROR BAND

ERROR BAND

80

CS (dB) = 20 log (V

–90

V

–100

–110

200mV/DIV

10mV/DIV

TIME (1µs/DIV)

Figure 51. Positive Settling Time to 0.1%

200mV/DIV

10mV/DIV

TIME (1µs/DIV)

Figure 52. Negative Settling Time to 0.1%

R3
600Ω

0

5

R1

100kΩ

U2

V–

6

V–

7

V+

0

V+

/100 = VIN)

OUT

V+

3

U1

V+

+

2

IN

V–

–

0

V–

ADA4692-2
V

SY

R

L

T

A

ADA4692-2
V

SY

R

L

T

A

R2

1kΩ

= ±1.35V
= 2kΩ
= 25°C

= ±1.35V
= 2kΩ
= 25°C

0

1V/DIV

20mV/DIV

ADA4692-2
V

= ±2.5V

SY

R

= 2kΩ

ERROR BAND

07950-054

TIME (1µs/DIV)

L

T

A

= 25°C

07950-055

Figure 54. Positive Settling Time to 0.1%

1V/DIV

ERROR BAND

20mV/DIV

ADA4692-2
V

= ±2.5V

SY

R

= 2kΩ

L

T

= 25°C

A

07950-056

TIME (1µs/DIV)

07950-057

Figure 55. Negative Settling Time to 0.1%

–120

CHANNEL SEPARATI ON (dB)

–130

–140

100 1k 10k 100k

ADA4692-2
V

SY

V

IN

A

V

T

A

FREQUENCY (Hz)

= ±2.5V

= 2.8V p- p
= +1
= 25°C

07950-140

Figure 53. Channel Separation (CS) vs. Frequency

Rev. D | Page 15 of 20

ADA4691-2/ADA4691-4/ADA4692-2/ADA4692-4

V

SHUTDOWN OPERATION

INPUT PIN CHARACTERISTICS

The ADA4691-2 has a classic CMOS logic inverter input for each
shutdown pin, as shown in Figure 56.

DD

P-CHANNEL

OUTPUT

INPUT

Figure 56. CMOS Inverter

With slowly changing inputs, the top transistor and bottom
transistor may be slightly on at the same time, increasing the
supply current. This can be avoided by driving the input with
a digital logic output having fast rise and fall times. Figure 57
through Figure 59 show the supply current for both sections
switching simultaneously with rise times of 1 μs, 10 μs, and 1 ms.
Clearly, the rise and fall times should be faster than 10 μs.
Using an RC time constant to enable/disable shutdown is not
recommended.

= 196mV/1k = 196µA

I

SY

SD A, SD B

DUT OUTPUT

Figure 57. Shutdown Pin Rise Time = 1 μs

= 192mV/1k = 196µA

I

SY

N-CHANNEL

TIME (400µ s/ DI V )

7950-149

07950-150

SD A, SD B

I

= 724mV/1k = 724µ A

SY

DUT OUTPUT

TIME (400µ s/ DI V )

07950-152

Figure 59. Shutdown Pin Rise Time = 1 ms

INPUT THRESHOLD

The input threshold is approximately 1.2 V above the V− pin when
operating on ground and 5 V and 0.9 V when operating on 2.7 V
(see Figure 60 and Figure 61). The threshold is relatively stable
over temperature. For operation on split supplies, the logic swing
may have to be level shifted.

500

ADA4691-2
T

= 25°C

A

450

V

= 5V

SY

400

350

300

250

(µA)

SY

I

200

150

100

50

0

054.54.03.53.02.52.01.51.00.5

Figure 60. Supply Current vs. Temperature, V

300

ADA4691-2
V

= 2.7V

SY

250

TA = +125°C

T

= –40°C

A

SD VOLTAGE (V)

TA = +85°C

= +25°C

T

A

= 5 V

SY

.0

07950-155

200

150

SD A, SD B

DUT OUTPUT

TIME (400µ s/ DI V )

07950-151

Figure 58. Shutdown Pin Rise Time = 10 μs

(µA)

SY

I

100

50

0

022.42.11.81.51.20.90.60.3

Figure 61. Supply Current vs. Temperature, V

TA = +125°C

= –40°C

T

A

SD VOLTAGE (V)

TA = +85°C

TA = +25°C

= 2.7 V

SY

.7

07950-156

Rev. D | Page 16 of 20

ADA4691-2/ADA4691-4/ADA4692-2/ADA4692-4

OUTLINE DIMENSIONS

PIN 1

INDICATOR

0.80

0.75

0.70

SEATING

PLANE

3.10

3.00 SQ

2.90

0.50

BSC

0.50

0.40

0.30

0.05 MAX

0.02 NOM

0.20 REF

0.30

0.23

0.18

13

12

9

8

BOTTOM VIEWTOP VIEW

COPLANARITY

0.08

N

I

1

P

D

C

I

A

N

I

16

1

EXPOSED

PAD

5

FOR PROPER CONNECTIONOF
THE EXPOSED PAD, REFER TO
THE PIN CONFIGURATION AND
FUNCTION DESCRIPTIONS
SECTION OF THIS DATASHEET.

1.75

1.60 SQ

1.45

4

0.25 MIN

R

O

T

COMPLIANTTOJEDEC STANDARDS MO-220-WEED-6.

08-16-2010-E

Figure 62. 16-Lead Lead Frame Chip Scale Package [LFCSP_WQ]

3 mm × 3 mm Body, Very Very Thin Quad

(CP-16-22)

Dimensions shown in millimeters

0.645

0.600

0.555
SEATING

PLANE

0.287

0.267

0.247

0.05 NOM
COPLANARITY

0.40

BSC

BOTTOM VIEW

(BALL SIDE UP)

123

A

B

C

91709-A

BALL A1

IDENTIFIER

1.250

1.210

1.170

TOP VIEW

(BALL SIDE DOWN)

1.260

1.220

1.180

0.415

0.400

0.385

0.230

0.200

0.170

Figure 63. 9-Ball Wafer Level Chip Scale Package [WLCSP]

(CB-9-3)

Dimensions shown in millimeters

Rev. D | Page 17 of 20

ADA4691-2/ADA4691-4/ADA4692-2/ADA4692-4

2.00

PIN 1 INDEX

AREA

0.60

0.55

0.50

SEATING

PLANE

BSC SQ

TOP VIEW

0.50
BSC

0.30

0.25

0.18

0.05 MAX

0.02 NOM
COPLANARITY

0.20 REF

0.50

0.45

0.40

0.05

8

6

BOTTOM VIEW

1

P

N

I

R

O

C

I

A

T

N

I

109

5

4

D

1

3

081308-D

Figure 64. 10-Lead Lead Frame Chip Scale Package [LFCSP_UQ]

2 mm × 2 mm Body, Ultra Thin Quad

(CP-10-11)

Dimensions shown in millimeters

0.65

0.60

0.55

0.30

0.25

0.18

5

4

BOTTOM VIEW

0.50 BSC

8

1

1

P

N

I

R

C

A

O

T

N

I

D

I

PIN 1 INDEX

AREA

2.00

BSC SQ

TOP VIEW

0.60

0.55

0.50

SEATING

PLANE

0.05 MAX

0.02 NOM

0.20 REF

062409-A

Figure 65. 8-Lead Lead Frame Chip Scale Package [LFCSP_UD]

2 mm × 2 mm Body, Ultra Thin, Dual Lead

(CP-8-6)

Dimensions shown in millimeters

Rev. D | Page 18 of 20

ADA4691-2/ADA4691-4/ADA4692-2/ADA4692-4

4.00 (0.1574)

3.80 (0.1497)

0.25 (0.0098)

0.10 (0.0040)

COPLANARITY

0.10

CONTROLLING DIMENSIONS ARE INMILLIMETERS; INCH DIMENSIONS
(IN PARENTHESES)ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLYAND ARE NOT APPROPRIATE FOR USE IN DESIGN.

5.00(0.1968)

4.80(0.1890)

85

1

1.27 (0.0500)

SEATING

PLANE

COMPLIANT TO JEDEC STANDARDS MS-012-AA

BSC

6.20 (0.2441)

5.80 (0.2284)

4

1.75 (0.0688)

1.35 (0.0532)

0.51 (0.0201)

0.31 (0.0122)

8°
0°

0.25 (0.0098)

0.17 (0.0067)

0.50 (0.0196)

0.25 (0.0099)

1.27 (0.0500)

0.40 (0.0157)

45°

012407-A

Figure 66. 8-Lead Standard Small Outline Package [SOIC_N]

Narrow Body

(R-8)

Dimensions shown in millimeters and (inches)

5.10

5.00

4.90

4.50

4.40

4.30

PIN 1

1.05

1.00

0.80

0.15

0.05

COPLANARITY

0.10

14

1

0.65 BSC

0.30

0.19

COMPLIANT TO JEDEC S T ANDARDS M O-153-AB-1

8

6.40
BSC

7

1.20

0.20

MAX

SEATING
PLANE

0.09
8°

0°

0.75

0.60

0.45

061908-A

Figure 67. 14-Lead Thin Shrink Small Outline Package [TSSOP]

(RU-14)

Dimensions shown in millimeters

Rev. D | Page 19 of 20

ADA4691-2/ADA4691-4/ADA4692-2/ADA4692-4

ORDERING GUIDE

Model1 Temperature Range Package Description Package Option Branding

ADA4691-2ACBZ-R7 −40°C to +125°C 9-Ball WLCSP CB-9-3 A2C
ADA4691-2ACBZ-RL −40°C to +125°C 9-Ball WLCSP CB-9-3 A2C
ADA4691-2ACPZ-R7 −40°C to +125°C 10-Lead LFCSP_UQ CP-10-11 A2
ADA4691-2ACPZ-RL −40°C to +125°C 10-Lead LFCSP_UQ CP-10-11 A2
ADA4691-4ACPZ-R2 −40°C to +125°C 16-Lead LFCSP_WQ CP-16-22 A2P
ADA4691-4ACPZ-R7 −40°C to +125°C 16-Lead LFCSP_WQ CP-16-22 A2P
ADA4691-4ACPZ-RL −40°C to +125°C 16-Lead LFCSP_WQ CP-16-22 A2P
ADA4692-2ACPZ-R7 −40°C to +125°C 8-Lead LFCSP_UD CP-8-6 A3
ADA4692-2ACPZ-RL −40°C to +125°C 8-Lead LFCSP_UD CP-8-6 A3
ADA4692-2ARZ −40°C to +125°C 8-Lead SOIC_N R-8
ADA4692-2ARZ-R7 −40°C to +125°C 8-Lead SOIC_N R-8
ADA4692-2ARZ-RL −40°C to +125°C 8-Lead SOIC_N R-8
ADA4692-4ARUZ −40°C to +125°C 14-Lead TSSOP RU-14
ADA4692-4ARUZ-RL −40°C to +125°C 14-Lead TSSOP RU-14

1

Z = RoHS Compliant Part.

©2009–2010 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D07950-0-11/10(D)

Rev. D | Page 20 of 20