Lower power at high voltage: 290 μA per amplifier typical
Low input bias current: 1 pA maximum
Wide bandwidth: 1.2 MHz typical
Slew rate: 1 V/μs typical
Offset voltage drift: 3 μV/°C typical
Single-supply operation: 5 V to 16 V
Dual-supply operation: ±2.5 V to ±8 V
Unity gain stable
APPLICATIONS
Portable systems
High density power budget systems
Medical equipment
Physiological measurement
Precision references
Multipole filters
Sensors
Transimpedance amplifiers
Buffer/level shifting
Input/Output Operational Amplifier
ADA4665-2
PIN CONFIGURATIONS
1
OUT A
OUT A
ADA4665-2
–IN A
2
+IN A
–IN A
+IN A
TOP VIEW
3
(Not to Scale)
V–
4
Figure 1. 8-Lead SOIC
1
ADA4665-2
2
TOP VIEW
3
(Not to Scale)
V–
4
Figure 2. 8-Lead MSOP
8
7
6
5
8
7
6
5
V+
OUT B
–IN B
+IN B
V+
OUT B
–IN B
+IN B
07650-001
07650-002
GENERAL DESCRIPTION
The ADA4665-2 is a rail-to-rail input/output dual amplifier
optimized for lower power budget designs. The ADA4665-2
offers a low supply current of 400 μA maximum per amplifier
at 25°C and 600 μA maximum per amplifier over the extended
industrial temperature range. This feature makes the ADA4665-2
well suited for low power applications. In addition, the ADA4665-2
has a very low bias current of 1 pA maximum, low offset voltage
drift of 3 μV/°C, and bandwidth of 1.2 MHz. The combination of
these features, together with a wide supply voltage range from
5 V to 16 V, allows the device to be used in a wide variety of
other applications, including process control, instrumentation
equipment, buffering, and sensor front ends. Furthermore, its
rail-to-rail input and output swing adds to its versatility. The
ADA4665-2 is specified from −40°C to +125°C and is available
in standard SOIC and MSOP packages.
Table 1. Low Cost Rail-to-Rail Input/Output Op Amps
Supply 5 V 16 V
Single AD8541
Dual AD8542ADA4665-2
Quad AD8544
Table 2. Other Rail-to-Rail Input/Output Op Amps
Supply 5 V 16 V 36 V
Single AD8603 AD8663
Dual AD8607 AD8667ADA4091-2
Quad AD8609 AD8669
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
Parameter Symbol Test Conditions/Comments Min Typ Max Unit
INPUT CHARACTERISTICS
Offset Voltage VOS V
V
−40°C ≤ TA ≤ +125°C 9 mV
Offset Voltage Drift ∆VOS/∆T −40°C ≤ TA ≤ +125°C 3 μV/°C
Input Bias Current IB 0.1 1 pA
−40°C ≤ TA ≤ +125°C 200 pA
Input Offset Current IOS 0.1 1 pA
−40°C ≤ TA ≤ +125°C 40 pA
Input Voltage Range −40°C ≤ TA ≤ +125°C 0 16 V
Common-Mode Rejection Ratio CMRR VCM = 0 V to 16 V 55 75 dB
−40°C ≤ TA ≤ +125°C 50 dB
Large Signal Voltage Gain AVO R
−40°C ≤ TA ≤ +125°C 75 dB
Input Resistance RIN 4 GΩ
Input Capacitance, Differential Mode C
Input Capacitance, Common Mode C
2 pF
INDM
7 pF
INCM
OUTPUT CHARACTERISTICS
Output Voltage High VOH R
−40°C ≤ TA ≤ +125°C 15.9 V
R
−40°C ≤ TA ≤ +125°C 15.8 V
Output Voltage Low VOL R
−40°C ≤ TA ≤ +125°C 15 mV
R
−40°C ≤ TA ≤ +125°C 150 mV
Short-Circuit Current ISC ±30 mA
Closed-Loop Output Impedance Z
f = 100 kHz, AV = 1 100 Ω
OUT
POWER SUPPLY
Power Supply Rejection Ratio PSRR VSY = 5 V to 16 V 70 95 dB
−40°C ≤ TA ≤ +125°C 65 dB
Supply Current per Amplifier ISY I
−40°C ≤ TA ≤ +125°C 600 μA
DYNAMIC PERFORMANCE
Slew Rate SR RL = 10 kΩ, CL = 50 pF, AV = 1 1 V/μs
Settling Time to 0.1% tS V
Gain Bandwidth Product GBP RL = 10 kΩ, CL = 50 pF, AV = 1 1.2 MHz
Phase Margin ΦM R
NOISE PERFORMANCE
Voltage Noise en p-p f = 0.1 Hz to 10 Hz 3 μV p-p
Voltage Noise Density en f = 1 kHz 32 nV/√Hz
f = 10 kHz 27 nV/√Hz
Current Noise Density in f = 1 kHz 50 fA/√Hz
Parameter Symbol Test Conditions/Comments Min Typ Max Unit
INPUT CHARACTERISTICS
Offset Voltage VOS V
V
−40°C ≤ TA ≤ +125°C 9 mV
Offset Voltage Drift ∆VOS/∆T −40°C ≤ TA ≤ +125°C 3 μV/°C
Input Bias Current IB 0.1 1 pA
−40°C ≤ TA ≤ +125°C 100 pA
Input Offset Current IOS 0.1 1 pA
−40°C ≤ TA ≤ +125°C 10 pA
Input Voltage Range −40°C ≤ TA ≤ +125°C 0 5 V
Common-Mode Rejection Ratio CMRR VCM = 0 V to 5 V 55 75 dB
−40°C ≤ TA ≤ +125°C 50 dB
Large Signal Voltage Gain AVO R
−40°C ≤ TA ≤ +125°C 75 dB
Input Resistance RIN 1 GΩ
Input Capacitance, Differential Mode C
Input Capacitance, Common Mode C
2 pF
INDM
7 pF
INCM
OUTPUT CHARACTERISTICS
Output Voltage High VOH R
−40°C ≤ TA ≤ +125°C 4.9 V
R
−40°C ≤ TA ≤ +125°C 4.8 V
Output Voltage Low VOL R
−40°C ≤ TA ≤ +125°C 10 mV
R
−40°C ≤ TA ≤ +125°C 100 mV
Short-Circuit Current ISC ±8 mA
Closed-Loop Output Impedance Z
f = 100 kHz, AV = 1 100 Ω
OUT
POWER SUPPLY
Power Supply Rejection Ratio PSRR VSY = 5 V to 16 V 70 95 dB
−40°C ≤ TA ≤ +125°C 65 dB
Supply Current per Amplifier ISY I
−40°C ≤ TA ≤ +125°C 600 μA
DYNAMIC PERFORMANCE
Slew Rate SR RL = 10 kΩ, CL = 50 pF, AV = 1 1 V/μs
Settling Time to 0.1% tS V
Gain Bandwidth Product GBP RL = 10 kΩ, CL = 50 pF, AV = 1 1.2 MHz
Phase Margin ΦM R
NOISE PERFORMANCE
Voltage Noise en p-p f = 0.1 Hz to 10 Hz 3 μV p-p
Voltage Noise Density en f = 1 kHz 32 nV/√Hz
f = 10 kHz 27 nV/√Hz
Current Noise Density in f = 1 kHz 50 fA/√Hz
= 5 V 1 4 mV
CM
= 0 V to 5 V 1 6 mV
CM
= 10 kΩ, VO = 0.5 V to 4.5 V 85 100 dB
L
= 100 kΩ to VCM 4.95 4.99 V
L
= 10 kΩ to VCM 4.9 4.96 V
L
= 100 kΩ to VCM 3 5 mV
L
= 10 kΩ to VCM 30 50 mV
L
= 0 mA 270 350 μA
O
= 1 V step, RL = 2 kΩ, CL = 50 pF 6.5 μs
IN
= 10 kΩ, CL = 50 pF, AV = 1 50 Degrees
L
Rev. 0 | Page 4 of 20
ADA4665-2
ABSOLUTE MAXIMUM RATINGS
Table 5.
Parameter Rating
Supply Voltage 16.5 V
Input Voltage1 GND − 0.3 V to VSY + 0.3 V
Input Current ±10 mA
Differential Input Voltage ±VSY
Output Short-Circuit Duration to GND Indefinite
Storage Temperature Range −65°C to +150°C
Operating Temperature Range −40°C to +125°C
Junction Temperature Range −65°C to +150°C
Lead Temperature (Soldering, 60 sec) 300°C
1
The input pins have clamp diodes to the power supply pins.
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
THERMAL RESISTANCE
θJA is specified for the worst-case conditions, that is, a device
soldered in a circuit board for surface-mount packages. This
value was measured using a 4-layer JEDEC standard printed
circuit board.
Figure 5. Input Offset Voltage vs. Common-Mode Voltage
07650-008
5
4
3
2
1
(mV)
OS
0
V
–1
–2
–3
–4
0246810121416
(V)
V
CM
VSY = 16V
Figure 8. Input Offset Voltage vs. Common-Mode Voltage
0-005
0765
Rev. 0 | Page 6 of 20
ADA4665-2
TA = 25°C, unless otherwise noted.
100
1k
IB+
I
–
B
VSY = 5V
100
1k
IB+
–
I
B
= 16V
V
SY
10
1
(pA)
B
I
0.1
0.01
0.001
255075100125
TEMPERATURE (° C)
Figure 9. Input Bias Current vs. Temperature
1k
100
125°C
105°C
85°C
25°C
(pA)
B
I
10
1
0.1
0.01
0.001
VSY = 5V
10
1
(pA)
B
I
0.1
0.01
0.001
255075100125
07650-012
TEMPERATURE (° C)
07650-009
Figure 12. Input Bias Current vs. Temperature
(pA)
B
I
100
0.1
0.01
0.001
1k
125°C
10
1
105°C
85°C
25°C
VSY = 16V
0.0001
012345
V
(V)
CM
Figure 10. Input Bias Current vs. Input Common-Mode Voltage
10k
VSY = 5V
1k
100
) TO SUPPLY RAIL (mV)
OH
10
1
OUTPUT VOL TAGE (V
0.1
0.0010.010.1110100
LOAD CURRENT (mA)
Figure 11. Output Voltage (VOH) to Supply Rail vs. Load Current
–40°C
+25°C
+85°C
+125°C
0.0001
0246810121416
07650-013
V
(V)
CM
07650-010
Figure 13. Input Bias Current vs. Input Common-Mode Voltage
10k
VSY = 16V
1k
100
) TO SUPPLY RAIL (mV)
10
OH
1
0.1
OUTPUT VOLTAGE (V
0.01
0.0010.010.1110100
07650-014
LOAD CURRENT (mA)
–40°C
+25°C
+85°C
+125°C
0-011
0765
Figure 14. Output Voltage (VOH) to Supply Rail vs. Load Current
Rev. 0 | Page 7 of 20
ADA4665-2
TA = 25°C, unless otherwise noted.
10k
VSY = 5V
10k
VSY = 16V
1k
100
) TO SUPPLY RAIL (mV)
OL
10
1
OUTPUT VOLTAGE (V
0.1
0.0010.010.1110100
LOAD CURRENT (mA)
–40°C
+25°C
+85°C
+125°C
Figure 15. Output Voltage (VOL) to Supply Rail vs. Load Current
5.00
4.99
4.98
(V)
OH
4.97
4.96
4.95
4.94
OUTPUT VOLTAGE, V
VSY = 5V
4.93
4.92
–50–250255075100125
RL = 100kΩ
RL = 10kΩ
TEMPERATURE (°C)
Figure 16. Output Voltage (VOH) vs. Temperature
1k
100
) TO SUPPLY RAIL (mV)
OL
10
–40°C
1
OUTPUT VO LTAGE (V
0.1
0.0010.010.1110100
07650-018
LOAD CURRENT (mA)
+25°C
+85°C
+125°C
07650-015
Figure 18. Output Voltage (VOL) to Supply Rail vs. Load Current
16.00
15.99
15.98
(V)
15.97
OH
15.96
15.95
15.94
15.93
OUTPUT VOLTAGE, V
15.92
VSY = 16V
15.91
15.90
–50–250255075100125
07650-019
RL = 100kΩ
RL = 10kΩ
TEMPERATURE (°C)
07650-016
Figure 19. Output Voltage (VOH) vs. Temperature
60
VSY = 5V
50
(mV)
40
OL
30
20
OUTPUT VOLTAGE, V
10
0
–50–250255075100125
RL = 10kΩ
RL = 100kΩ
TEMPERATURE (° C)
Figure 17. Output Voltage (VOL) vs. Temperature
07650-020
60
VSY = 16V
50
(mV)
40
OL
30
20
OUTPUT VOLTAGE, V
10
0
–50–250255075100125
RL = 10kΩ
RL = 100kΩ
TEMPERATURE (° C)
Figure 20. Output Voltage (VOL) vs. Temperature
0-017
0765
Rev. 0 | Page 8 of 20
ADA4665-2
TA = 25°C, unless otherwise noted.
= 10kΩ
= 50pF
180
135
90
80
60
40
PHASE
VSY = 16V
R
L
C
L
80
60
40
PHASE
VSY = 5V
R
L
C
L
= 10kΩ
= 50pF
180
135
90
20
0
OPEN-LOOP GAIN (dB)
–20
–40
1k10k100k1M10M
FREQUENCY (Hz)
GAIN
Figure 21. Open-Loop Gain and Phase vs. Frequency
50
AV = 100
40
30
AV = 10
20
10
AV = 1
0
–10
–20
CLOSED-LOOP GAIN (dB)
–30
–40
–50
1001k10k100 k1M10M100M
FREQUENCY (Hz)
VSY = 5V
R
Figure 22. Closed-Loop Gain vs. Frequency
= 10kΩ
L
45
0
–45
–90
07650-025
PHASE (Degrees)
07650-024
20
0
OPEN-LOOP GAIN (dB)
–20
–40
1k10k100k1M10M
FREQUENCY (Hz)
GAIN
Figure 24. Open-Loop Gain and Phase vs. Frequency
50
AV = 100
40
30
AV = 10
20
10
AV = 1
0
–10
–20
CLOSED-LOOP GAIN (dB)
–30
–40
–50
1001k10k100 k1M10M100M
FREQUENCY (Hz)
VSY = 16V
R
Figure 25. Closed-Loop Gain vs. Frequency
= 10kΩ
L
45
0
–45
–90
PHASE (Degrees)
07650-021
07650-022
1k
VSY = 5V
100
10
(Ω)
OUT
Z
0.1
0.01
AV = 100
AV = 10
1
AV = 1
101001k10k100k1M10M
FREQUENCY (Hz)
Figure 23. Output Impedance vs. Frequency
07650-026
1k
VSY = 16V
100
AV = 100
10
(Ω)
OUT
Z
0.1
0.01
AV = 10
1
AV = 1
101001k10k100k1M10M
FREQUENCY (Hz)
Figure 26. Output Impedance vs. Frequency
0-023
0765
Rev. 0 | Page 9 of 20
ADA4665-2
TA = 25°C, unless otherwise noted.
100
VSY = 5V
90
100
VSY = 16V
90
80
70
CMRR (dB)
60
50
40
1001k10k100k1M
FREQUENCY (Hz)
Figure 27. CMRR vs. Frequency
120
100
80
60
40
PSRR (dB)
20
PSRR+
0
PSRR–
–20
1001k10k100k10M1M
FREQUENCY (Hz)
VSY = 5V
Figure 28. PSRR vs. Frequency
80
70
CMRR (dB)
60
50
40
1001k10k100k1M
07650-030
FREQUENCY (Hz)
07650-027
Figure 30. CMRR vs. Frequency
120
100
80
60
40
PSRR (dB)
20
0
–20
07650-031
PSRR+
PSRR–
1001k10k100k1M10M
FREQUENCY (Hz)
VSY = 16V
07650-028
Figure 31. PSRR vs. Frequency
80
VSY = 5V
= 100mV p-p
V
IN
70
= 10kΩ
R
L
60
50
40
30
OVERSHOOT (%)
20
10
0
101001k
CAPACITANCE (pF )
OS+
OS–
Figure 29. Small Signal Overshoot vs. Load Capacitance
07650-032
80
VSY = 16V
= 100mV p-p
V
IN
70
= 10kΩ
R
L
60
50
40
30
OVERSHOOT (%)
20
10
0
101001k
CAPACITANCE (pF )
OS+
OS–
Figure 32. Small Signal Overshoot vs. Load Capacitance
0-029
0765
Rev. 0 | Page 10 of 20
ADA4665-2
TA = 25°C, unless otherwise noted.
VSY = 5V
= 2kΩ
R
L
= 10pF
C
L
VOLTAGE (1V/DIV)
TIME (100µ s/DIV)
07650-036
VOLTAGE (5V/DIV)
TIME (100µ s/DIV)
Figure 33. Large Signal Transient Response Figure 36. Large Signal Transient Response
VSY = 5V
= 2kΩ
R
L
= 10pF
C
L
VOLTAGE (50mV/DIV)
VOLTAGE (50mV/DIV)
VSY = 16V
= 2kΩ
R
L
= 10pF
C
L
VSY = 16V
= 2kΩ
R
L
= 10pF
C
L
07650-033
TIME (100µ s/DIV)
TIME (20µ s/DIV)
INPUT
OUTPUT
VSY = ±8V
07650-034
10
5
0
–5
OUTPUT VOLTAGE (V)
07650-035
INPUT VOLTAGE (mV)
–50
–100
TIME (100µ s/DIV)
Figure 34. Small Signal Transient Response
50
0
TIME (20µs/DIV)
VSY = ±2.5V
INPUT
OUTPUT
Figure 35. Positive Overload Recovery
07650-037
Figure 37. Small Signal Transient Response
)
50
0
–50
–100
INPUT VOLTAGE (mV
3
2
1
0
UTPUT VOLTAGE (V)
O
–1
07650-038
Figure 38. Positive Overload Recovery
Rev. 0 | Page 11 of 20
ADA4665-2
TA = 25°C, unless otherwise noted.
)
150
VSY = ±2.5V
100
150
VSY = ±8V
100
50
0
INPUT VOLTAGE (mV)
TIME (20µs/DIV)
INPUT
OUTPUT
0
–1
–2
TPUT VOLTAGE (V)
–3
OU
07650-042
Figure 39. Negative Overload Recovery
VSY = 5V
R
= 2kΩ
L
C
= 50pF
L
INPUT
VOLTAGE (500mV/DIV)
ERROR
BAND
OUTPUT
+5mV
0
–5mV
50
0
INPUT VOLTAGE (mV
TIME (20µs/DIV)
INPUT
OUTPUT
0
–5
–10
OUTPUT VOLTAGE (V)
07650-039
Figure 42. Negative Overload Recovery
VSY = 16V
R
= 2kΩ
L
C
= 50pF
L
INPUT
VOLTAGE (500mV/DIV)
ERROR
BAND
OUTPUT
+5mV
0
–5mV
TIME (2µs/DIV)
TIME (2µs/DIV)
INPUT
OUTPUT
VSY = 16V
R
= 2kΩ
L
C
= 50pF
L
+5mV
0
–5mV
07650-040
0-041
0765
VOLTAGE (500mV/DIV)
TIME (2µs/DIV)
Figure 40. Negative Settling Time to 0.1%
ERROR
BAND
TIME (2µs/DIV)
Figure 41. Positive Settling Time to 0.1%
INPUT
OUTPUT
VSY = 5V
R
= 2kΩ
L
C
= 50pF
L
+5mV
0
–5mV
07650-043
Figure 43. Negative Settling Time to 0.1%
VOLTAGE (500mV/DIV)
ERROR
BAND
07650-044
Figure 44. Positive Settling Time to 0.1%
Rev. 0 | Page 12 of
20
ADA4665-2
TA = 25°C, unless otherwise noted.
100
VSY = 5V
100
VSY = 16V
Hz)
VOLTAGE NOISE DENSI TY (nV/
10
1001k10k100k
FREQUENCY (Hz)
Figure 45. Voltage Noise Density vs. Frequency
VSY = 5V
INPUT VOLTAGE NOISE (1µV/DIV)
Hz)
VOLTAGE NOISE DENSI TY (nV/
10
1001k10k100k
07650-048
FREQUENCY (Hz)
07650-045
Figure 48. Voltage Noise Density vs. Frequency
VSY = 16V
INPUT VOLTAGE NOISE (1µV/DIV)
TIME (2s/DIV)
Figure 46. 0.1 Hz to 10 Hz Noise
900
800
700
600
500
400
300
SUPPLY CURRENT (µA)
200
100
0
0246810121416
SUPPLY VOLTAGE (V)
+125°C
+85°C
+25°C
–40°C
Figure 47. Supply Current vs. Supply Voltage
07650-049
Figure 49. 0.1 Hz to 10 Hz Noise
900
800
700
600
500
SUPPLY CURRENT (µA)
400
300
–50–250255075100125
07650-047
Figure 50. Supply Current vs. Temperature
TIME (2s/DIV)
VSY = 16V
VSY = 5V
TEMPERATURE (° C)
07650-046
0-050
0765
Rev. 0 | Page 13 of
20
ADA4665-2
TA = 25°C, unless otherwise noted.
–20
–40
0
VSY = 5V
R
= 10kΩ
L
A
= –100
V
100kΩ
1kΩ
–20
–40
0
VSY = 16V
= 10kΩ
R
L
= –100
A
V
100kΩ
1kΩ
–60
–80
–100
–120
CHANNEL SEPARATIO N (dB)
–140
–160
1001k10k100k
FREQUENCY (Hz)
Figure 51. Channel Separation vs. Frequency
1
VSY = 5V
= 10kΩ
R
L
= 1
A
V
0.1
THD + NOISE (%)
0.01
VIN = 1V p-p
V
0.001
101001k10k100k
FREQUENCY (Hz)
Figure 52. THD + Noise vs. Frequency
= 4V p-p
IN
VIN = 1V p-p
V
= 4V p-p
IN
–60
–80
–100
–120
CHANNEL SEPARATIO N (dB)
–140
–160
1001k10k100k
07650-053
FREQUENCY (Hz)
VIN = 1V p-p
= 5V p-p
V
IN
= 15V p-p
V
IN
07650-051
Figure 53. Channel Separation vs. Frequency
1
VSY = 16V
R
= 10kΩ
L
A
= 1
V
0.1
THD + NOISE (%)
0.01
VIN = 1V p-p
V
= 5V p-p
IN
V
= 15V p-p
0.001
101001k10k100k
07650-054
FREQUENCY (Hz)
IN
0-052
0765
Figure 54. THD + Noise vs. Frequency
Rev. 0 | Page 14 of
20
ADA4665-2
APPLICATIONS INFORMATION
RAIL-TO-RAIL INPUT OPERATION
The ADA4665-2 is a unity-gain stable CMOS operational
amplifier designed with rail-to-rail input/output swing
capability to optimize performance. The rail-to-rail input
feature is vital to maintain the wide dynamic input voltage
range and to maximize signal swing to both supply rails. For
example, the rail-to-rail input feature is extremely useful in
buffer applications where the input voltage must cover both
the supply rails.
The input stage has two input differential pairs, nMOS and
pMOS. When the input common-mode voltage is at the low
end of the input voltage range, the pMOS input differential pair
is active and amplifies the input signal. As the input commonmode voltage is slowly increased, the pMOS differential pair
gradually turns off while the nMOS input differential pair turns
on. This transition is inherent to all rail-to-rail input amplifiers
that use the dual differential pairs topology. For the ADA4665-2,
this transition occurs approximately 1 V away from the positive
rail and results in a change in offset voltage due to the different
offset voltages of the differential pairs (see Figure 5 and Figure 8).
CURRENT SHUNT SENSOR
Many applications require the sensing of signals near the
positive or the negative rails. Current shunt sensors are one
such application and are mostly used for feedback control
systems. They are also used in a variety of other applications,
including power metering, battery fuel gauging, and feedback
controls in electrical power steering. In such applications, it is
desirable to use a shunt with very low resistance to minimize
the series voltage drop. This not only minimizes wasted power,
but also allows the measurement of high currents while saving
power. The ADA4665-2 provides a low cost solution for
implementing current shunt sensors.
Figure 55 shows a low-side current sensing circuit, and Figure 56
shows a high-side current sensing circuit using the ADA4665-2.
A typical shunt resistor of 0.1 Ω is used. In these circuits, the
difference amplifier amplifies the voltage drop across the shunt
resistor by a factor of 100. For true difference amplification,
matching of the resistor ratio is very important, where R1/R2 =
R3/R4. The rail-to-rail feature of the ADA4665-2 allows the
output of the op amp to almost reach 16 V (the power supply of
the op amp). This allows the current shunt sensor to sense up to
approximately 1.6 A of current.
I
16V
SUPPLY
V
OUT
I
R2
*
1MΩ
16V
10kΩ
1/2
R
S
0.1Ω
R1
R
L
ADA4665-2
R4
1MΩ
= AMPLIF IER GAIN × VOLTAGE ACROSS R
*V
OUT
= 100 × RS × I
= 10 × I
R3
10kΩ
S
07650-055
Figure 55. Low-Side Current Sensing Circuit
R
S
R3
10kΩ
0.1Ω
R
L
16V
SUPPLY
V
OUT
I
I
R4
1MΩ
16V
*
1/2
ADA4665-2
R2
1MΩ
= AMPLIFI ER GAIN × VO LTAGE ACRO SS R
*V
OUT
= 100 × RS × I
= 10 × I
R1
10kΩ
S
07650-056
Figure 56. High-Side Current Sensing Circuit
ACTIVE FILTERS
The ADA4665-2 is well suited for active filter designs. An active
filter requires an op amp with a unity-gain bandwidth at least
100 times greater than the product of the corner frequency, f
and the quality factor, Q. An example of an active filter is the
Sallen-Key, one of the most widely used filter topologies. This
topology gives the user the flexibility of implementing either
a low-pass or a high-pass filter by simply interchanging the
resistors and capacitors. To achieve the desired performance,
1% or better component tolerances are usually required.
Figure 57 shows a two-pole low-pass filter. It is configured as a
unity-gain filter with cutoff frequency at 10 kHz. Resistor and
capacitor values are chosen to give a quality factor, Q, of 1/√2
for a Butterworth filter, which has maximally flat pass-band
frequency response. Figure 58 shows the frequency response of
the low-pass Sallen-Key filter. The response falls off at a rate of
40 dB per decade after the cutoff frequency of 10 kHz.
,
c
Rev. 0 | Page 15 of 20
ADA4665-2
R1
22.5kΩ
V
IN
22.5kΩ
C2
0.5nF
R2
C1
1nF
+V
SY
1/2
ADA4665-2
–V
SY
V
OUT
07650-057
Figure 57. Two-Pole Low-Pass Filter
When R1 = R2 and C1 = 2C2, the values of Q and the cutoff
frequency are calculated as follows:
C2C1R2R1
Q =
f
c
π=2
)(R2R1C2+
1
2R1 R2 C1 C
10
0
–10
–20
–30
GAIN (dB)
–40
–50
–60
1001k10k100k1M
FREQUENCY (Hz)
Figure 58. Low-Pass Filter: Gain vs. Frequency
Figure 59 shows a two-pole high-pass filter, with cutoff frequency
at 10 kHz and quality factor, Q, of 1/√2.
C1
0.5nF
V
IN
0.5nF
45kΩ
C2
R2
Figure 59. Two-Pole High-Pass Filter
R1
22.5kΩ
+V
SY
1/2
ADA4665-2
–V
SY
V
OUT
07650-059
When R2 = 2R1 and C1 = C2, the values of Q and the cutoff
frequency are calculated as follows:
C2C1R2R1
Q+=
f
c
π=2
)(C2C1R1
1
C2C1R2R1
10
0
–10
–20
–30
–40
–50
–60
GAIN (dB)
–70
–80
–90
–100
07650-058
–110
–120
101001k10k100k1M
FREQUENCY (Hz)
Figure 60. High-Pass Filter: Gain vs. Frequency
07650-060
Rev. 0 | Page 16 of 20
ADA4665-2
OUTLINE DIMENSIONS
5.00 (0.1968)
4.80 (0.1890)
4.00 (0.1574)
3.80 (0.1497)
0.25 (0.0098)
0.10 (0.0040)
COPLANARITY
0.10
CONTROLL ING DIMENSI ONS ARE IN MILLIMETERS; INCH DI MENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRI ATE FOR USE IN DESIGN.
85
1
1.27 (0.0500)
SEATING
PLANE
COMPLIANT TO JEDEC STANDARDS MS-012-A A
BSC
6.20 (0.2441)
5.80 (0.2284)
4
1.75 (0.0688)
1.35 (0.0532)
0.51 (0.0201)
0.31 (0.0122)
8°
0°
0.25 (0.0098)
0.17 (0.0067)
0.50 (0.0196)
0.25 (0.0099)
1.27 (0.0500)
0.40 (0.0157)
45°
012407-A
Figure 61. 8-Lead Standard Small Outline Package [SOIC_N]
Narrow Body
(R-8)
Dimensions shown in millimeters and (inches)
3.20
3.00
2.80
8
5
4
SEATING
PLANE
5.15
4.90
4.65
1.10 MAX
0.23
0.08
8°
0°
0.80
0.60
0.40
3.20
3.00
2.80
PIN 1
0.95
0.85
0.75
0.15
0.00
COPLANARITY
0.10
1
0.38
0.22
0.65 BSC
COMPLIANT TO JEDEC STANDARDS MO -187-AA
Figure 62. 8-Lead Mini Small Outline Package [MSOP]
(RM-8)
Dimensions shown in millimeters
ORDERING GUIDE
Model Temperature Range Package Description Package Option Branding