The ADA4610-2 is a dual channel, precision JFET amplifier
that features low input voltage and current noise, offset voltage,
input bias current, and rail-to-rail output.
The combination of low offset, noise, and very low input
bias current makes these amplifiers especially suitable for
high impedance sensor amplification and precise current
measurements using shunts. With excellent dc precision, low
noise, and fast settling time, the ADA4610-2 provides superior
accuracy in medical instruments, electronic measurement, and
automated test equipment. Unlike many competitive amplifiers,
the ADA4610-2maintains fast settling performance with
substantial capacitive loads. Unlike many older JFET amplifiers,
the ADA4610-2 does not suffer from output phase reversal
when input voltages exceed the maximum common-mode
voltage range.
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without noti ce. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
The fast slew rate and great stability with capacitive loads make
the ADA4610-2a perfect fit for high performance filters. Low
input bias currents, low offset, and low noise result in a wide
dynamic range for photodiode amplifier circuits. Low noise
and distortion, high output current, and excellent speed make
the ADA4610-2 a great choice for audio applications.
The ADA4610-2is specified over the −40°C to +125°C
extended industrial temperature range.
The ADA4610-2 is available in the 8-lead narrow SOIC, 8-lead
MSOP, and 8-lead LFCSP packages.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
ADA4610-2 Data Sheet
TABLE OF CONTENTS
Features .............................................................................................. 1
Parameter Symbol Test Conditions/Comments Min Typ Max Unit
INPUT CHARACTERISTICS
Offset Voltage (B Grade)1 VOS 0.2 0.4 mV
−40°C < TA < +125°C 0.8 mV
Offset Voltage (A Grade)1 VOS 0.4 1 mV
−40°C < TA < +125°C 1.8 mV
Offset Voltage Drift (A Grade)2 ΔVOS/ΔT 1 8 µV/°C
Input Bias Current IB 5 25 pA
−40°C < TA < +125°C 1.5 nA
Input Offset Current IOS 2 20 pA
Input Voltage Range −12.5 +12.5 V
Common-Mode Rejection Ratio CMRR VCM = −12.5 V to +12.5 V 100 115 dB
−40°C < TA < +125°C 96 dB
Large Signal Voltage Gain AVO RL = 2 kΩ, V
−40°C < TA < +125°C 91 dB
Input Capacitance, Differential VCM = 0 V 3.1 pF
Input Capacitance, Common-Mode VCM = 0 V 4.8 pF
Input Resistance VCM = 0 V >1 × 1013 Ω
= ±13.5 V 104 107 dB
OUT
Output Voltage High VOH RL = 2 kΩ 14.8 14.9 V
−40°C < TA < +125°C 14.65 V
RL = 600 Ω 14.25 14.47 V
−40°C < TA < +125°C 13.35 V
−40°C < TA < +125°C −14.75 V
RL = 600 Ω −14.68 −14.6 V
−40°C < TA < +125°C −14.3 V
Short-Circuit Current I
±79 mA
SC
POWER SUPPLY
Power Supply Rejection Ratio PSRR VSY = ±4.5 V to ±18 V 106 125 dB
−40°C < TA < +125°C 103 dB
Supply Current/Amplifier ISY I
= 0 mA 1.6 1.85 mA
OUT
DYNAMIC PERFORMANCE
Slew Rate SR RL = 2 kΩ ±172 +25/−61 V/µs
Gain Bandwidth Product GBP VIN = 5 mV p-p, RL = 2 kΩ, AV = 100 16.3 MHz
Unity-Gain Crossover UGC VIN = 5 mV p-p, RL = 2 kΩ, AV = −10 9.3 MHz
Phase Margin φM 66 Degrees
−3 dB Closed-Loop Bandwidth −3 dB AV = 1, VIN = 5 mV p-p 9.50 MHz
Total Harmonic Distortion (THD) + Noise THD + N 1 kHz, G = +1, RL = 2 kΩ, VIN = 6 V rms 0.00006 %
Rev. A | Page 4 of 20
Data Sheet ADA4610-2
f = 1 kHz
7.3 nV/√Hz
Parameter Symbol Test Conditions/Comments Min Typ Max Unit
NOISE PERFORMANCE
Peak-to-Peak Voltage Noise en p-p 0.1 Hz to 10 Hz bandwidth 0.45 µV p-p
Voltage Noise Density en f = 10 Hz 14 nV/√Hz
f = 100 Hz 8.5 nV/√Hz
f = 10 kHz 7.3 nV/√Hz
1
Offset voltage does not include solder heat resistance.
2
Guaranteed by design and characterization.
Rev. A | Page 5 of 20
ADA4610-2 Data Sheet
Electrostatic Discharge
2500 V
8-Lead SOIC_N (R-8)
120
43
°C/W
ABSOLUTE MAXIMUM RATINGS
Table 3.
Parameter Rating
Supply Voltage ±18 V
Input Voltage ±VS
Output Short-Circuit Duration to GND Observe derating curves
Storage Temperature Range −65°C to +150°C
Operating Temperature Range −40°C to +125°C
Junction Temperature Range −65°C to +150°C
Lead Temperature (Soldering, 10 sec) 300°C
(Human Body Model)
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
Table 4. Thermal Resistance
Package Type θ
8-Lead MSOP (RM-8) 142 45 °C/W
8-Lead LFCSP_VD (CP-8-9) 57 12 °C/W
1
θJA is specified for worst-case conditions, that is, θJA is specified for device
soldered in circuit board for surface-mount packages.
Figure 5. Input Offset Voltage vs. Common-Mode Input Voltage
Figure 8. Input Offset Voltage vs. Common-Mode Input Voltage
Rev. A | Page 7 of 20
ADA4610-2 Data Sheet
1M
1
–5–4–3–2–1012345
INPUT BIAS A, INPUT BIAS B ( pA)
V
CMI
(V)
09646-055
10
100
1k
10k
100k
ADA4610-2
SOIC
V
SY
= ±15V
R
L
=
∞
T
A
= +25°C
100M
10
1
100
1k
10k
100k
1M
10M
0.1
–56
INPUT BIAS A, INPUT BIAS B ( pA)
V
CMI
(V)
09646-056
ADA4610-2
SOIC
V
SY
= ±5V
R
L
=
∞
+125°C
+85°C
+25°C
–4 –3 –2 –1012345
–40°C
100
10
1
0.1
–50–250255075100125
TEMPERATURE (°C)
INPUT BIAS CURRE NT (pA)
09646-009
ADA4610-2
V
SY
= ±5V
1
0.1
0.01
0.1110100
I
OUT
SOURCE (mA)
V
DD
– V
OUT
(V)
09646-011
ADA4610-2
V
SY
= ±5V
T
A
= 25°C
0.1110100
I
OUT
SINK (mA)
09646-015
ADA4610-2
V
SY
= ±5V
T
A
= 25°C
10
1
0.1
0.01
V
OUT
– V
SS
(V)
100
80
90
10
20
30
40
50
60
70
0
–15–1010–55015
INPUT BIAS CURRE NT (pA)
COMMON-MODE VOLTAGE (V)
09646-057
ADA4610-2
SOIC
V
SY
= ±15V
R
L
=
∞
T
A
= +25°C
Figure 9. Input Bias Current vs. Common Mode Voltage
Figure 10. Input Bias Current vs. Common Mode Voltage and Temperature
Figure 12. Dropout Voltage vs. Source Current
Figure 13. Dropout Voltage vs. Sink Current
Figure 11. Input Bias Current vs. Temperature
Figure 14. Input Bias Current vs. Common-Mode Voltage
Rev. A | Page 8 of 20
Data Sheet ADA4610-2
1G
100M
10
100
1k
10k
100k
1M
10M
1
–15–1010–55015
INPUT BIAS CURRE NT (pA)
COMMON-MODE VOLTAGE (V)
09646-058
+125°C
ADA4610-2
SOIC
V
SY
= ±15V
R
L
=
∞
+85°C
+25°C
–40°C
100
10
1
0.1
–50–250255075100125
TEMPERATURE (°C)
INPUT BIAS CURRE NT (pA)
09646-012
ADA4610-2
V
SY
= ±15V
0.01
0.1110100
I
OUT
SOURCE (mA)
09646-014
1
0.1
0.01
V
DD
– V
OUT
(V)
ADA4610-2
V
SY
= ±15V
T
A
= 25°C
10
1
0.1
0.01
10.10.0110100
I
OUT
SINK (mA)
V
OUT
– V
SS
(V)
09646-018
ADA4610-2
V
SY
= ±15V
T
A
= 25°C
120270
225
180
135
90
45
0
–45
–90
100
80
60
40
20
0
–20
–40
0.010.11101001k10k100k
FREQUENCY ( kHz )
GAIN (dB)
PHASE (Degrees)
09646-016
ADA4610-2
V
SY
= ±5V
T
A
= 25°C
R
L
= 2kΩ
60
40
20
0
–20
–40
1101001k10k100k
FREQUENCY ( kHz )
GAIN (dB)
09646-017
ADA4610-2
V
SY
= ±5V
T
A
= 25°C
A
V
= +100
AV = +10
AV = +1
Figure 15. Input Bias Current vs. Common-Mode Voltage and Temperature
Figure 18. Dropout Voltage vs. Sink Current
Figure 16. Input Bias Current vs. Temperature
Figure 17. Dropout Voltage vs. Source Current
Figure 19. Open-Loop Gain and Phase vs. Frequency
Figure 20. Closed-Loop Gain vs. Frequency
Rev. A | Page 9 of 20
ADA4610-2 Data Sheet
1k
100
10
1
0.1
0.01
10.1101001k10k100k
FREQUENCY ( kHz )
Z
OUT
(Ω)
09646-021
ADA4610-2
V
SY
= ±5V
T
A
= 25°C
A
V
= +100
A
V
= +10
A
V
= +1
120270
GAIN (dB)
60
40
20
0
–20
–40
1101001k10k100k
FREQUENCY ( kHz )
GAIN (dB)
09646-020
ADA4610-2
V
SY
= ±15V
T
A
= 25°C
A
V
= +100
A
V
= +10
A
V
= +1
1k
100
10
1
0.1
0.01
10.1101001k10k100k
FREQUENCY ( kHz )
Z
OUT
(Ω)
09646-024
ADA4610-2
V
SY
= ±15V
T
A
= 25°C
AV = +100
A
V
= +10
A
V
= +1
120
100
80
60
40
20
0
–20
10.1
101001k10k
FREQUENCY ( kHz )
PSRR (dB)
09646-022
PSRR–
PSRR+
ADA4610-2
V
SY
= ±5V
T
A
= 25°C
120
140
100
80
60
40
20
0
10.1101001k10k
FREQUENCY ( kHz )
CMRR (dB)
09646-023
ADA4610-2
V
SY
= ±5V
T
A
= 25°C
Figure 21. Closed-Loop Output Impedance vs. Frequency
ADA4610-2
= ±15V
V
100
80
60
40
20
0
–20
–40
0.010.11101001k10k100k
FREQUENCY ( kHz )
SY
T
A
R
L
= 25°C
= 2kΩ
Figure 22. Open-Loop Gain and Phase vs. Frequency
225
180
135
90
45
0
–45
–90
Figure 24. Closed-Loop Output Impedance vs. Frequency
PHASE (Degrees)
09646-019
Figure 25. PSRR vs. Frequency
Figure 23. Closed-Loop Gain vs. Frequency
Figure 26. CMRR vs. Frequency
Rev. A | Page 10 of 20
Data Sheet ADA4610-2
3
2
1
0
–1
–2
–3
0123
45678910
TIME (µs)
OUTPUT VOLTAGE (V)
09646-027
ADA4610-2
V
SY
= ±5V
T
A
= 25°C
A
V
= +1
R
L
= 2kΩ
C
L
= 100pF
120
100
80
60
40
20
0
–20
10.1101001k10k
FREQUENCY ( kHz )
PSRR (dB)
09646-025
PSRR–
PSRR+
ADA4610-2
V
SY
= ±15V
T
A
= 25°C
120
140
100
80
60
40
20
0
10.1101001k10k
FREQUENCY ( kHz )
CMRR (dB)
09646-026
ADA4610-2
V
SY
= ±15V
T
A
= 25°C
12
8
4
0
–4
–8
–12
012345678910
TIME (µs)
OUTPUT VOLTAGE (V)
09646-030
ADA4610-2
V
SY
= ±15V
T
A
= 25°C
A
V
= +1
R
L
= 2kΩ
C
L
= 100pF
75
50
25
0
–25
–50
–75
012345678910
TIME (µs)
OUTPUT VOLTAGE (mV)
09646-028
ADA4610-2
V
SY
= ±5V
T
A
= 25°C
A
V
= +1
R
L
= 2kΩ
C
L
= 100pF
100
VOLTAGE NOISE DENSITY (nV/ Hz)
Figure 27. Large Signal Transient Response
Figure 28. PSRR vs. Frequency
Figure 30. Large Signal Transient Response
Figure 31. Small Signal Transient Response
ADA4610-2
= ±5V
V
SY
= 25°C
T
A
Figure 29. CMRR vs. Frequency
10
1
0.0010.010.1110100
FREQUENCY ( kHz )
09646-033
Figure 32. Voltage Noise Density
Rev. A | Page 11 of 20
ADA4610-2 Data Sheet
60
50
40
30
20
0
10
0.010.11
CAPACITANCE (nF)
OVERSHOOT (%)
09646-034
OS–
OS+
ADA4610-2
V
SY
= ±5V
T
A
= 25°C
A
V
= +1
R
L
= 2kΩ
V
IN
= 100mV p-p
75
50
25
0
–25
–50
–75
012345678910
TIME (µs)
OUTPUT VOLTAGE (mV)
09646-031
ADA4610-2
V
SY
= ±15V
T
A
= 25°C
A
V
= +1
R
L
= 2kΩ
C
L
= 100pF
100
10
1
0.0010.010.1110
FREQUENCY ( kHz )
VOLTAGE NOISE DENSITY (nV/ Hz)
09646-036
ADA4610-2
V
SY
= ±15V
T
A
= 25°C
50
45
40
35
30
0
25
20
15
10
5
0.010.11
CAPACITANCE (nF)
OVERSHOOT (%)
09646-037
OS–
OS+
ADA4610-2
V
SY
= ±15V
T
A
= 25°C
A
V
= +1
R
L
= 2kΩ
V
IN
= 100mV p-p
Figure 33. Overshoot vs. Load Capacitance
Figure 34. Small Signal Transient Response
Figure 35. Voltage Noise Density
Figure 36. Overshoot vs. Load Capacitance
Rev. A | Page 12 of 20
Data Sheet ADA4610-2
–60
–80
–120
–140
–160
–100
–40
0.1110100
FREQUENCY ( kHz )
CHANNEL SEPARAT ION (dB)
09646-039
ADA4610-2
V
SY
= ±15V
T
A
= 25°C
R
L
= 2kΩ
1
0.1
0.01
0.001
0.0001
0.00001
0.10.01
0.001110
AMPLIT UDE ( V rms)
THD + N (%)
09646-040
ADA4610-2
V
SY
= ±15V
T
A
= 25°C
R
L
= 2kΩ
F
IN
= 1kHz
THD + N %
0.01
0.001
0.0001
0.00001
10.10.0110100
FREQUENCY ( kHz )
THD + N (%)
09646-041
ADA4610-2
V
SY
= ±15V
T
A
= 25°C
R
L
= 2kΩ
V
IN
= 5V rms
500kHz BAND-PASS FILTER
80kHz BAND-PASS FILTER
16
12
8
4
0
–4
–8
–12
–16
00.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0
TIME (ms)
VOLTAGE (V)
09646-042
ADA4610-2
V
SY
= ±15V
T
A
= 25°C
A
V
= +1
R
L
= 2kΩ
C
L
= 100pF
OUTPUT
INPUT
300
200
100
0
–100
–200
–300
012345678910
TIME (sec)
VOLTAGE (nV)
09646-043
ADA4610-2
V
SY
= ±15V
T
A
= 25°C
R
L
= 2kΩ
12
10
8
6
4
2
0
00.20.40.60.81.0
0.1%
0.01%
1.21.4
SETTLING TIME (µs)
STEP SIZE (V)
09646-044
ADA4610-2
V
SY
= ±15V
T
A
= 25°C
A
V
= +1
R
L
= 2kΩ
C
L
= 20pF
POSITIVE STEP
COMPARATIVE VOLTAGE AND VARIABLE VOLTAGE GRAPHS
Figure 37. Channel Separation
Figure 38. THD + N vs. Amplitude
Figure 40. No Phase Reversal
Figure 41. Voltage Noise, 0.1 Hz to 10 Hz
Figure 39. THD + N vs. Frequency
Figure 42. Positive Step Settling Time
Rev. A | Page 13 of 20
ADA4610-2 Data Sheet
12
10
8
6
4
2
0
00.20.40.60.81.0
0.1%
0.01%
1.21.4
SETTLING TIME (µs)
STEP SIZE (V)
09646-045
ADA4610-2
V
SY
= ±15V
T
A
= 25°C
A
V
= +1
R
L
= 2kΩ
C
L
= 20pF
NEGATIVE STEP
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0
05101520
+125°C
+25°C
2530
V
SY
(V)
I
SY
FOR BOTH AMPLIFIERS (mA)
09646-047
+85°C
–40°C
ADA4610-2
R
L
=
∞
Figure 43 Negative Step Settling Time
Figure 44. Supply Current vs. Supply Voltage and Temperature
Rev. A | Page 14 of 20
Data Sheet ADA4610-2
8
7
6
5
4
3
2
1
0
048121620242832
SUPPLY VOLTAGE (V)
I
SY
FOR BOTH AMPLIFIERS (mA)
09646-053
COMPARATO R, V
OUT
= LOW
FOLLOWER
COMPARATO R, V
OUT
= HIGH
1++ –
D31
Q28
Q27
V
OUT
09646-054
V
EE
Q15Q14
Q13Q17Q16Q23
Q29Q30
J1J2
Q9
Q5
Q4
Q8
Q1
Q6
Q7
Q25
Q24
Q18
Q12
I
2
I
3
I
4
C2
C1
C3
DE1
V
IN+
V
IN–
C4
A2A1
R16
R7R6
R3
R5
R2
R10R11
RC4
D26
R16
V
CC
DE5
DE6
DE3
DE2
DE4
APPLICATIONS INFORMATION
COMPARATOR OPERATION
Although op amps are quite different from comparators,
occasionally an unused section of a dual or a quad op amp may
be used as a comparator; however, this is not recommended for
any rail-to-rail output op amp. For rail-to-rail output op amps,
the output stage is generally a ratioed current mirror with bipolar
or MOSFET transistors. With the part operating open loop, the
second stage increases the current drive to the ratioed mirror to
close the loop. However, the second stage cannot close the loop,
which results in an increase in supply current. With the op amp
configured as a comparator, the supply current can be significantly higher (see Figure 45). Configuring an unused section as
a voltage follower with the noninverting input connected to a
voltage within the input voltage range is recommended. The
ADA4610-2 has a unique output stage design that reduces the
excess supply current, but does not entirely eliminate this effect
when the op amp is operating open loop.
Figure 45. Supply Current vs. Supply Voltage
Figure 46. Simplified Schematic
Rev. A | Page 15 of 20
ADA4610-2 Data Sheet
CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS
(IN PARENTHESES)ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLYAND ARE NOT APPROPRIATE FOR USE IN DESIGN.
COMPLIANT TO JEDEC STANDARDS MS-012-AA
012407-A
0.25 (0.0098)
0.17 (0.0067)
1.27 (0.0500)
0.40 (0.0157)
0.50 (0.0196)
0.25 (0.0099)
45°
8°
0°
1.75 (0.0688)
1.35 (0.0532)
SEATING
PLANE
0.25 (0.0098)
0.10 (0.0040)
4
1
85
5.00(0.1968)
4.80(0.1890)
4.00 (0.1574)
3.80 (0.1497)
1.27 (0.0500)
BSC
6.20 (0.2441)
5.80 (0.2284)
0.51 (0.0201)
0.31 (0.0122)
COPLANARITY
0.10
COMPLIANT TO JEDEC STANDARDS MO-187-AA
6°
0°
0.80
0.55
0.40
4
8
1
5
0.65 BSC
0.40
0.25
1.10 MAX
3.20
3.00
2.80
COPLANARITY
0.10
0.23
0.09
3.20
3.00
2.80
5.15
4.90
4.65
PIN 1
IDENTIFIER
15° MAX
0.95
0.85
0.75
0.15
0.05
10-07-2009-B
OUTLINE DIMENSIONS
Figure 47. 8-Lead Standard Small Outline Package [SOIC_N]
Narrow Body (R-8)
Dimensions shown in millimeters and (inches)
Figure 48. 8-Lead Mini Small Outline Package [MSOP]
(RM-8)
Dimensions shown in millimeters
Rev. A | Page 16 of 20
Data Sheet ADA4610-2
1
EXPOSED
PAD
BOTTOM VIEW
0.50
BSC
PIN 1
INDICATOR
0.50
0.40
0.30
TOP VIEW
12° MAX
0.70 MAX
0.65TYP
0.90 MAX
0.85 NOM
0.05 MAX
0.01 NOM
0.20 REF
2.23
2.13
2.03
4
1.60
1.50
1.40
3.25
3.00 SQ
2.75
2.95
2.75 SQ
2.55
5
8
PIN 1
INDICATOR
SEATING
PLANE
0.30
0.23
0.18
0.60 MAX
0.60 MAX
FOR PROP E R CONNECTION OF
THE EXPOSED PAD, REFER TO
THE PIN CONFIGURATION
SECTION OF THIS DATA SHEET.
04-06-2012-A
ADA4610-2ARMZ-RL
−40°C to +125°C
8-Lead MSOP
RM-8
A2U
ADA4610-2ARZ
−40°C to +125°C
8-Lead SOIC_N
R-8
Figure 49. 8-Lead Lead Frame Chip Scale Package [LFCSP_VD]
3 mm × 3 mm Body, Very Thin, Dual Lead
(CP-8-9)
Dimensions shown in millimeters
ORDERING GUIDE
Model1 Temperature Range Package Description Package Option Branding
ADA4610-2ACPZ-R7 −40°C to +125°C 8-Lead LFCSP_VD CP-8-9 A2U
ADA4610-2ACPZ-RL −40°C to +125°C 8-Lead LFCSP_VD CP-8-9 A2U
ADA4610-2ARMZ −40°C to +125°C 8-Lead MSOP RM-8 A2U
ADA4610-2ARMZ-R7 −40°C to +125°C 8-Lead MSOP RM-8 A2U
ADA4610-2ARZ-R7 −40°C to +125°C 8-Lead SOIC_N R-8
ADA4610-2ARZ-RL −40°C to +125°C 8-Lead SOIC_N R-8
ADA4610-2BRZ −40°C to +125°C 8-Lead SOIC_N R-8
ADA4610-2BRZ-R7 −40°C to +125°C 8-Lead SOIC_N R-8
ADA4610-2BRZ-RL −40°C to +125°C 8-Lead SOIC_N R-8