Datasheet ADA4311-1 Datasheet (ANALOG DEVICES)

Low Cost, Dual, High Current Output

A

*V

FEATURES

High speed

−3 dB bandwidth: 310 MHz, G = +5, R
Slew rate: 1050 V/μs, R

LOAD

= 50 Ω

Wide output swing

20.6 V p-p differential, R

of 100 Ω from 12 V supply

LOAD

High output current
Low distortion

−98 dBc typical at 1 MHz, V

−72 dBc typical at 10 MHz, V

= 2 V p-p, G = +5, R

OUT

= 2 V p-p, G = +5, R

OUT

Power management and shutdown

Control inputs CMOS level compatible
Shutdown quiescent current: 1 mA/amplifier
Selectable quiescent current: 1 mA to 11.8 mA/amplifier

APPLICATIONS

Home networking line drivers
Twisted pair line drivers
Power line communications (PLC)
Video line drivers
ARB line drivers
I/Q channel amplifiers

LOAD

= 50 Ω

LOAD

LOAD

= 100 Ω

= 100 Ω

Line Driver with Shutdown

ADA4311-1

PIN CONFIGURATION

DA4311-1

1

+V

S

2

NC

OUT A

3

–IN A

4

+IN A

5

NC = NO CONNECT

Figure 1. Thermally Enhanced, 10-Lead MINI_SO_EP

TYPICAL APPLICATION

1/2

ADA4311-1

V

*

MID

1/2

–

V

CC

=

MID

Figure 2. Typical PLC Driver Application

ADA4311-1

GND

2

10

9

8

7

6

OUT B

–IN B

+IN B

PD1

PD0

06940-001

06940-002

GENERAL DESCRIPTION

The ADA4311-1 is comprised of two high speed, current
feedback operational amplifiers. The high output current, high
bandwidth, and fast slew rate make it an excellent choice for
broadband applications requiring high linearity performance
while driving low impedance loads.

The ADA4311-1 incorporates a power management function
that provides shutdown capabilities and the ability to optimize
the quiescent current of the amplifiers. The CMOS-compatible,
power-down control pins (PD1 and PD0) enable the ADA4311-1
to operate in four different modes: full power, medium power,
low power, and complete power-down. In power-down mode, the
quiescent current drops to only 1.0 mA/amplifier, while the outputs
go to a high impedance state.

Rev. 0

Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Anal og Devices for its use, nor for any infringements of patents or ot her
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.

The ADA4311-1 is available in a thermally enhanced, 10-lead
MSOP with an exposed paddle for improved thermal conduction.
The ADA4311-1 is rated to work in the extended industrial
temperature range of −40°C to +85°C.

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: [phone] www.analog.com
Fax: [phone] ©2007 Analog Devices, Inc. All rights reserved.

ADA4311-1

TABLE OF CONTENTS

Features .............................................................................................. 1

Applications....................................................................................... 1

Pin Configuration............................................................................. 1

Typical Applicati o n ........................................................................... 1

General Description......................................................................... 1

Revision History ............................................................................... 2

Specifications..................................................................................... 3

Absolute Maximum Ratings............................................................ 5

Thermal Resistance ...................................................................... 5

ESD Caution.................................................................................. 5

Pin Configuration and Function Descriptions............................. 6

Typical Performance Characteristics............................................. 7

REVISION HISTORY

8/07—Revision 0: Initial Version

Theory of Operation ...................................................................... 10

Application Information................................................................ 11

Feedback Resistor Selection...................................................... 11

Power Control Modes of Operation ........................................ 11

Exposed Thermal Pad Connections ........................................ 11

Powerline Application ............................................................... 11

Board Layout............................................................................... 12

Power Supply Bypassing ............................................................ 12

Outline Dimensions ....................................................................... 13

Ordering Guide .......................................................................... 13

Rev. 0 | Page 2 of 16

ADA4311-1

SPECIFICATIONS

VS = 12 V, RF = 499 Ω (@ TA = 25°C, G = +5, RL = 100 Ω to VS/2), unless otherwise noted.

Table 1.

Parameter Test Conditions/Comments Min Typ Max Unit

DYNAMIC PERFORMANCE

−3 dB Bandwidth V
V
V
Full Power Bandwidth V
Slew Rate V
V
V

NOISE/DISTORTION PERFORMANCE

Differential Distortion (Worst
Harmonic)

PD1 = 0, PD0 = 0 −98 dBc

PD1 = 0, PD0 = 1 −95 dBc
PD1 = 1, PD0 = 0 −86 dBc
f
PD1 = 0, PD0 = 0 −72 dBc
PD1 = 0, PD0 = 1 −63 dBc
PD1 = 1, PD0 = 0 −52 dBc
f
PD1 = 0, PD0 = 0 −56 dBc
PD1 = 0, PD0 = 1 −49 dBc
PD1 = 1, PD0 = 0 −43 dBc
Input Voltage Noise f = 100 kHz 2.4 nV/√Hz
Input Current Noise f = 100 kHz 17 pA/√Hz

DC PERFORMANCE

Input Offset Voltage −3 +1 +3 mV
Input Bias Current

Noninverting Input −9 −2 +3 μA

Inverting Input −4 +4.5 +16 μA
Open-Loop Transimpedance R
R
Common-Mode Rejection 57 62 dB

INPUT CHARACTERISTICS

Input Resistance +IN, f < 100 kHz 500 kΩ

OUTPUT CHARACTERISTICS

Single-Ended, +Swing R
Single-Ended, −Swing R
Single-Ended, +Swing R
Single-Ended, −Swing R
Differential Swing R

POWER SUPPLY

Single Supply 12 V
Supply Current PD1 = 0, PD0 = 0 10.5 11.8 13 mA/amp
PD1 = 0, PD0 = 1 7 7.9 9 mA/amp
PD1 = 1, PD0 = 0 4.3 5.2 6.3 mA/amp
PD1 = 1, PD0 = 1 0.9 1.3 mA/amp

= 0.1 V p-p, PD1 = 0, PD0 = 0, R

OUT

= 0.1 V p-p, PD1 = 0, PD0 = 1, R

OUT

= 0.1 V p-p, PD1 = 1, PD0 = 0, R

OUT

= 10.2 V p-p, PD1 = 0, PD0 = 0, R

OUT

= 2 V p-p, PD1 = 0, PD0 = 0 1050 V/μs

OUT

= 2 V p-p, PD1 = 0, PD0 = 1 1050 V/μs

OUT

= 2 V p-p, PD1 = 1, PD0 = 0 1000 V/μs

OUT

f

= 1 MHz, V

C

= 10 MHz, V

C

= 20 MHz, V

C

= 50 Ω 4 14 MΩ

LOAD

= 100 Ω 15 35 MΩ

LOAD

= 50 Ω 11 11.1 V

LOAD

= 50 Ω 0.9 1 V

LOAD

= 100 Ω 11 11.1 V

LOAD

= 100 Ω 0.8 0.9 V

LOAD

= 100 Ω 20.2 20.6 V p-p

LOAD

= 2 V p-p

OUT

= 2 V p-p

OUT

= 2 V p-p

OUT

= 50 Ω 310 MHz

LOAD

= 50 Ω 220 MHz

LOAD

= 50 Ω 140 MHz

LOAD

= 50 Ω 12.9 MHz

LOAD

P

P

P

P

Rev. 0 | Page 3 of 16

ADA4311-1

Parameter Test Conditions/Comments Min Typ Max Unit

POWER-DOWN PINS

PD1, PD0 Threshold Referenced to GND 1.5 V
High Level Input Voltage, V
Low Level Input Voltage, V

IH

IL

PD1, PD0 = 0 Pin Bias Current PD1 or PD0 = 0 V −1.5 −0.2 +1.5 μA
PD1, PD0 = 1 Pin Bias Current PD1 or PD0 = 3 V 40 63 80 μA
Enable/Disable Time 130/116 ns
Power Supply Rejection Ratio −63 −70 dB

2 5 V
0 0.8 V

Rev. 0 | Page 4 of 16

ADA4311-1

ABSOLUTE MAXIMUM RATINGS

Table 2.

Parameter Rating

Supply Voltage 13.6 V
Power Dissipation (T

JMAX

− TA)/θ

JA

Storage Temperature Range −65°C to +125°C
Operating Temperature Range −40°C to +85°C
Lead Temperature (Soldering 10 sec) 300°C
Junction Temperature 150°C

Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress rating
only; functional operation of the device at these or any other
conditions above those indicated in the operational section of
this specification is not implied. Exposure to absolute maximum
rating conditions for extended periods may affect device reliability.

THERMAL RESISTANCE

Thermal resistance (θJA) is specified for the worst-case conditions,
that is, θ
surface-mount packages.

Table 3.

Package Type θ

10-Lead MINI_SO_EP 44 °C/W

is specified for device soldered in circuit board for

JA

JA

Unit

Maximum Power Dissipation

The maximum safe power dissipation for the ADA4311-1 is
limited by the associated rise in junction temperature (T

) on

J

the die. At approximately 150°C, which is the glass transition
temperature, the plastic changes its properties. Even temporarily
exceeding this temperature limit can change the stresses that the
package exerts on the die, permanently shifting the parametric
performance of the amplifiers. Exceeding a junction temperature of
150°C for an extended period can result in changes in silicon
devices, potentially causing degradation or loss of functionality.

Figure 3 shows the maximum safe power dissipation in
the package vs. the ambient temperature for the 10-lead
MINI_SO_EP (44°C/W) on a JEDEC standard 4-layer board.
θ

values are approximations.

JA

5.0

4.5

4.0

3.5

3.0

2.5

2.0

1.5

1.0

MAXIMUM POW ER DISSIP ATION (W )

0.5

0

–35 –15 5 25 45 65 85

Figure 3. Maximum Power Dissipation vs. Temperature for a 4-Layer Board

MINI_SO _EP-10

AMBIENT TEMPERATURE (°C)

06940-003

ESD CAUTION

Rev. 0 | Page 5 of 16

ADA4311-1

A

PIN CONFIGURATION AND FUNCTION DESCRIPTIONS

DA4311-1

1

+V

S

2

NC

OUT A

3

–IN A

4

+IN A

5

NC = NO CONNECT

Figure 4. Pin Configuration

Table 4. Pin Function Description

Pin No. Mnemonic Description

1 +V

S

Positive Power Supply Input.
2 NC No Connection.
3 OUT A Amplifier A Output.
4 −IN A Amplifier A Inverting Input.
5 +IN A Amplifier A Noninverting Input.
6 PD0 Power Dissipation Control.
7 PD1 Power Dissipation Control.
8 +IN B Amplifier B Noninverting Input.
9 −IN B Amplifier B Inverting Input.
10 OUT B Amplifier B Output.
11 (Exposed Paddle) GND Ground (Electrical Connection Required).

10

9

8

7

6

OUT B

–IN B

+IN B

PD1

PD0

06940-004

Rev. 0 | Page 6 of 16

ADA4311-1

–

–

–

TYPICAL PERFORMANCE CHARACTERISTICS

9

V

= 100mV p-p

OUT

R

= 50

L

6

PD1, PD0 = 0, 0

3

0

–3

–6

–9

NORMALIZED GAIN (dB)

–12

–15

–18

1 10 100 1000

FREQUENCY (MHz )

G = +10

G = +20

G = +5

Figure 5. Small Signal Frequency Response for Various Closed-Loop Gains

9

V

= 100mV p-p

OUT

R

= 50

6

L

G = +5

3

0

–3

–6

–9

GAIN (dB)

–12

–15

–18

–21

–24

1 10 100 1000

PD1, PD0 = 0, 1

PD1, PD0 = 1, 0

FREQUENCY (MHz)

PD1, PD0 = 0, 0

Figure 6. Small Signal Frequency Response for Various Modes

0.20
G = +5

R

= 50

L

0.15

10ns/DIV

0.10

0.05

0

OUTPUT (V)

–0.05

–0.10

–0.15

06940-005

06940-006

40

V

= 2V p-p

OUT

R

= 100

L

–50

G = +5

HARMONIC DISTORTION (dBc)

–60

–70

–80

–90

–100

–110

–120

–130

0.1

PD1, PD0 = 1, 0

PD1, PD0 = 0, 1

PD1, PD0 = 0, 0

110

FREQUENCY (MHz )

Figure 8. Differential Harmonic Distortion vs. Frequency

60

f = 5MHz

= 100

R

L

G = +5

–70

–80

–90

–100

HARMONIC DISTORTION (dBc)

–110

–120

0.1 1 10

OUTPUT VOLTAGE (V p-p)

HD2

HD3

Figure 9. Differential Harmonic Distortion vs. Output Voltage

HARMONIC DIST ORTION (dBc)

–50

–60

–70

–80

–90

–100

40

HD2

HD3

V

= 2V p-p

OUT

f = 5MHz
G = +5

HD2
HD3

100

06940-008

06940-021

–0.20

Figure 7. Small Signal Transient Response

06940-010

–110

10 100 1000

LOAD RESIST ANCE ()

Figure 10. Differential Harmonic Distortion vs. Load Resistance

06940-022

Rev. 0 | Page 7 of 16

ADA4311-1

–

100M

10M

1M

100k

10k

TRANSIMPEDANCE ( )

1k

100

100 1k 10k 100k 1M 10M 100M 1G

FREQUENCY (Hz)

PHASE

MAGNITUDE

Figure 11. Open-Loop Transimpedance and Phase vs. Frequency

0

PD1, PD0 = 0, 0
R

= 100

L

–10

–20

–30

–40

–50

COMMON-MO DE REJECTIO N (dB)

–60

R

L

= 100

0

–45

–90

–135

–180

–225

–270

PHASE (Degrees)

1000

PD1, PD0 = 0, 0

100

10

1

OUTPUT IMPEDANCE ()

0.1

0.01

0.01 0.1 1 10 100 1000

06940-007

FREQUENCY (M Hz)

6940-013

Figure 14. Closed-Loop Output Impedance vs. Frequency

1M

PD1, PD0 = 1, 1

100k

10k

1k

100

OUTPUT IMPEDANCE ()

10

–70

0.01 0.1 1 10 100 1000

FREQUE NCY (MHz)

Figure 12. Common-Mode Rejection vs. Frequency

10

PD1, PD0 = 0, 0
R

= 100

L

–20

–30

+PSR

–40

–50

POWER SUPPLY REJECTI ON (dB)

–60

–70

0.01 0.1 1 10 100 1000

FREQUE NCY (MHz)

Figure 13. Power Supply Rejection vs. Frequency

1

0.01 0.1 1 10 100 1000

6940-011

FREQUENCY (M Hz)

06940-015

Figure 15. Output Impedance vs. Frequency (Disabled)

100

10

VOLTAGE NOISE (nV/ Hz)

1

10 100 1k 10k 100k 1M 10M 100M 1G

06940-012

FREQUENCY (Hz)

6940-009

Figure 16. Voltage Noise vs. Frequency

Rev. 0 | Page 8 of 16

ADA4311-1

–

20

PD1, PD0 = 1, 1

0

FEEDTHROUG H (dB)

–100

VOLTAGE (V)

–40

–60

–80

–20

–40

–60

CROSSTALK (dB)

–80

101 100 1000

FREQUENCY (MHz)

06940-014

Figure 17. Feedthrough vs. Frequency

8

7

6

5

4

3

2

1

V

OUT

V

, V

PD1

PD0

–100

0.1 1 10 100 1000

FREQUENCY (Hz)

Figure 19. Crosstalk vs. Frequency

12

11

10

(p-p)

9

OUT

V

8

7

06940-017

0

0123456

TIME (1s/DIV)

Figure 18. Power-Down Turn On/Turn Off

06940-016

6

30 100 1000

LOAD ()

Figure 20. Single-Ended Output Swing vs. Load

06940-020

Rev. 0 | Page 9 of 16

ADA4311-1

THEORY OF OPERATION

The ADA4311-1 is a dual-current feedback amplifier with high
output current capability. With a current feedback amplifier, the
current into the inverting input is the feedback signal, and the
open-loop behavior is that of a transimpedance, dV

/dIIN or TZ.

O

The open-loop transimpedance is analogous to the open-loop
voltage gain of a voltage feedback amplifier.
simplified model of a current feedback amplifier. Because R
proportional to 1/g
where g

is the transconductance of the input stage. Basic

m

, the equivalent voltage gain is TZ × gm,

m

Figure 21 shows a

IN

is

analysis of the follower with gain circuit yields

()

Z

()

sT

RRGsT

+×+

FIN

V

OUT

G

V

×=

IN

Z

where:

R

G += 1

R

F

R

G

501≈=

IN

g

m

Because G × R

<< RF for low gains, a current feedback amplifier

IN

has relatively constant bandwidth vs. gain, the 3 dB point being
set when |T

| = RF.

Z

For a real amplifier, there are additional poles that contribute
excess phase, and there is a value for R

below which the amplifier

F

is unstable. Tolerance for peaking and desired flatness determines
the optimum R

in each application.

F

R

G

R

IN

I

R

N

V

IN

Figure 21. Simplified Block Diagram

IN

R

F

T

Z

V

OUT

6940-018

Rev. 0 | Page 10 of 16

ADA4311-1

APPLICATION INFORMATION

FEEDBACK RESISTOR SELECTION

The feedback resistor has a direct impact on the closed-loop
bandwidth and stability of the current feedback op amp.
Reducing the resistance below the recommended value can
make the amplifier response peak and even become unstable.
Increasing the size of the feedback resistor beyond the recom­mended value reduces the closed-loop bandwidth.

Tabl e 5
provides a convenient reference for quickly determining the
feedback and gain resistor values, and the corresponding
bandwidth, for common gain configurations. The recommended
feedback resistor value for the ADA4311-1 is 499 Ω.

Table 5. Recommended Values and Frequency Performance

Gain RF (Ω) RG (Ω) −3 dB SS BW (MHz)

[phone]
+5 1 k 250 220
+10 499 55.4 175
+20 499 26.1 84

1

Conditions: VS = ±12 V, TA = 25°C, RL = 50 Ω, PD1, PD0 = 0, 0.

POWER CONTROL MODES OF OPERATION

The ADA4311-1 features four power modes: full power, ¾
power, ½ power, and shutdown. The power modes are controlled
by two logic pins, PD0 and PD1. The power-down control pins
are compatible with standard 3 V and 5 V CMOS logic.
shows the various power modes and associated logic states. In
the power-down mode, the output of the amplifier goes into a
high impedance state.

Tabl e 6

1

Table 6. Power Modes

PD1 PD0 Power Mode

Total Supply
Current (mA)

Output
Impedance

Low Low Full Power 23.6 Low
Low High ¾ Power 15.8 Low
High Low ½ Power 10.4 Low
High High Power-Down 1.8 High

EXPOSED THERMAL PAD CONNECTIONS

The exposed thermal pad on the 10-lead MSOP is both the
reference for the PD pins and the only electrical connection for
the negative supply voltage. Therefore, in the 10-lead MSOP,
the ADA4311-1 can only be used on a single supply. The exposed
thermal pad must be connected to ground. Failure to do so
renders the part inoperable.

A requirement for this package is that the thermal pad be
connected to a solid plane with low thermal resistance, ensuring
adequate heat transfer away from the die and into the board.

POWERLINE APPLICATION

Applications (that is, powerline AV modems) requiring greater
than 10 dBm peak power should consider using an external
line driver, such as the ADA4311-1.
interface between the TxDAC® output and the ADA4311-1 biased
for single-supply operation. The peak-to-peak differential
output voltage swing of the TxDAC should be limited to
2 V p-p, with the gain of the ADA4311-1 configured to realize
the additional voltage gain required by the application. A low­pass filter should be considered to filter the DAC images
inherent in the signal reconstruction process. In addition, dc
blocking capacitors are required to level-shift the output signal
of the TxDAC to the common-mode level of the ADA4311-1
(that is, V

= VCC − GND/2).

MID

Figure 22 shows an example

0.1µF

O

I
F
E
R

REFADJ

TxDAC

0dB TO –7.5dB

R

SET

E
L
B
A
S

I
D
x
T

IOUTP+

IOUTP–

Figure 22. TxDAC Output Directly via Center-Tap Transformer

OPTIONAL

LCLPF

1/2

ADA4311-1

V

MID

1/2

ADA4311-1

06940-019

Rev. 0 | Page 11 of 16

ADA4311-1

BOARD LAYOUT

As is the case with all high speed applications, careful attention
to printed circuit board (PCB) layout details prevents associated
board parasitics from becoming problematic. Proper RF design
technique is mandatory. The PCB should have a ground plane
covering all unused portions of the component side of the
board to provide a low impedance return path. Removing the
ground plane on all layers from the area near the input and
output pins reduces stray capacitance, particularly in the area of
the inverting inputs. Signal lines connecting the feedback and
gain resistors should be as short as possible to minimize the
inductance and stray capacitance associated with these traces.
Termination resistors and loads should be located as close as
possible to their respective inputs and outputs. Input and
output traces should be kept as far apart as possible to minimize
coupling (crosstalk) though the board. Wherever there are
complementary signals, a symmetrical layout should be provided
to the extent possible to maximize balanced performance.
When running differential signals over a long distance, the
traces on the PCB should be close. Doing this reduces the
radiated energy and makes the circuit less susceptible to RF
interference. Adherence to stripline design techniques for long
signal traces (greater than about 1 inch) is recommended.

For more information on high speed board layout, see

Practical Guide to High-Speed Printed-Circuit-Board Layout

A

.

POWER SUPPLY BYPASSING

The ADA4311-1 operates on supplies from 6 V to 12 V. The
ADA4311-1 circuit should be powered with a well-regulated
power supply. Careful attention must be paid to decoupling the
power supply. High quality capacitors with low equivalent series
resistance (ESR), such as multilayer ceramic capacitors (MLCCs),
should be used to minimize supply voltage ripple and power
dissipation. In addition, 0.1 µF MLCC decoupling capacitors
should be located no more than ⅛-inch away from each of the
power supply pins. A large, usually tantalum, 10 µF capacitor is
required to provide good decoupling for lower frequency signals
and to supply current for fast, large signal changes at the
ADA4311-1 outputs. Bypassing capacitors should be laid out
in such a manner as to keep return currents away from the
inputs of the amplifiers, which minimizes any voltage drops that
can develop due to ground currents flowing through the ground
plane. A large ground plane also provides a low impedance path
for the return currents.

Rev. 0 | Page 12 of 16

ADA4311-1

C

OUTLINE DIMENSIONS

*

3.10

3.00

2.90

6

3.10

3.00

2.90

PIN 1

INDICATOR

0.94

0.86

0.78

0.15

0.10

0.05

OPLANARIT Y

0.10

10

TOP

VIEW

1

0.50 BSC

0.30

0.23

0.15

*

COMPLIANT TO JEDEC STANDARDS MO-187-BA-T
EXCEPT FO R EXPOSED PAD DI MENSIONS.

5

5.05

4.90

4.75

0.50 BSC

1.10 MAX

SEATING
PLANE

BOTTOM VIEW

0.23

0.18

0.13

Figure 23. 10-Lead Mini Small Outline Package with Exposed Pad [MINI_SO_EP]

(RH-10-1)

Dimensions shown in millimeters

2.27

2.17

2.07

*

1.83

1.73

1.63

EXPOSED
PAD

0.70

8°
0°

0.55

0.40

073007-B

ORDERING GUIDE

Package

Model Temperature Range Package Description

ADA4311-1ARHZ

1

−40°C to +85°C 10-Lead Mini Small Outline Package with Exposed Pad [MINI_SO_EP] RH-10-1 1A
ADA4311-1ARHZ-RL1−40°C to +85°C 10-Lead Mini Small Outline Package with Exposed Pad [MINI_SO_EP] RH-10-1 1A
ADA4311-1ARHZ-R71−40°C to +85°C 10-Lead Mini Small Outline Package with Exposed Pad [MINI_SO_EP] RH-10-1 1A

1

Z = RoHS Compliant Part.

Option

Branding

Rev. 0 | Page 13 of 16

ADA4311-1

NOTES

Rev. 0 | Page 14 of 16

ADA4311-1

NOTES

Rev. 0 | Page 15 of 16

ADA4311-1

NOTES

©2007 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D06940-0-8/07(0)

Rev. 0 | Page 16 of 16