Nominal 3 dB gain per output channel
25 dB output-to-output isolation, 50 MHz to 1000 MHz
75 Ω input and outputs
Small package size: 16-lead, 3 mm × 3 mm LFCSP
APPLICATIONS
Set-top boxes
Residential gateways
CATV distribution systems
Splitter modules
Digital cable ready (DCR) TVs
Active RF Splitters
ADA4304-3/ADA4304-4
FUNCTIONAL BLOCK DIAGRAMS
5
0.1µF0.1µF
1µH
IL
GND
Figure 1.
5
1µH
VOUT1
VOUT2
VOUT3
0.01µF
0.01µF
0.01µF
0.1µF0.1µF
0.01µF
VIN
VCC
ADA4304-3
07082-001
GENERAL DESCRIPTION
The ADA4304-3/ADA4304-4 are 75 Ω active splitters for use in
applications where a lossless signal split is required. Typical
applications include multituner digital set-top boxes, cable
splitter modules, multituners/digital cable ready (DCR)
televisions, and home gateways where traditional solutions
require discrete passive splitter modules with separate fixed
gain amplifiers.
IL
GND
Figure 2.
VOUT1
VOUT2
VOUT3
VOUT4
0.01µF
0.01µF
0.01µF
0.01µF
07082-002
0.01µF
VIN
VCC
ADA4304-4
The ADA4304-3/ADA4304-4 are fabricated using the Analog
Devices, Inc., proprietary silicon germanium (SiGe),
complementary bipolar process, enabling them to achieve very
low levels of distortion with a noise figure of 4.6 dB. The parts
provide low cost alternatives that simplify designs and improve
system performance by integrating a signal splitter element and
a gain block into a single IC. The ADA4304-3/ADA4304-4 are
available in a 16-lead LFCSP and operate in the extended
industrial temperature range of −40°C to +85°C.
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Anal og Devices for its use, nor for any infringements of patents or ot her
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
ADA4304-3 ADA4304-4
Parameter Conditions Min Typ Max Min Typ Max Unit
DYNAMIC PERFORMANCE See Figure 19 for test circuit
Bandwidth (−3 dB) 2400 2400 MHz
Frequency Range 54 865 54 865 MHz
Gain f = 100 MHz 3.3 2.9 dB
Gain Flatness 54 MHz to 865 MHz 1.0 1.0 dB
NOISE/DISTORTION PERFORMANCE
Noise Figure
@ 550 MHz 4.6 4.6 dB
@ 865 MHz 4.8 4.8 dB
Output IP3 f1 = 97.25 MHz, f2 = 103.25 MHz 26 26 dBm
Output IP2 f1 = 97.25 MHz, f2 = 103.25 MHz 43 43 dBm
Composite Triple Beat (CTB) 135 channels, 15 dBmV/channel, f = 865 MHz −72 −72 dBc
Composite Second Order (CSO) 135 channels, 15 dBmV/channel, f = 865 MHz −62 −62 dBc
Cross Modulation (CXM)
INPUT CHARACTERISTICS See Figure 19 for test circuit
Input Return Loss @ 54 MHz −17 −13 −18 −14 dB
@ 550 MHz −22 −16 −21 −15 dB
@ 865 MHz −12 −8 −12 −8 dB
Output-to-Input Isolation Any output, 54 MHz to 865 MHz
@ 54 MHz −33 −30 −33 −31 dB
@ 550 MHz −33 −30 −33 −31 dB
@ 865 MHz −34 −31 −35 −32 dB
OUTPUT CHARACTERISTICS See Figure 19 and Figure 20 for test circuits
Output Return Loss Any output, 54 MHz to 865 MHz @ 54 MHz −21 −17 −21 −17 dB
@ 550 MHz −16 −11 −17 −12 dB
@ 865 MHz −14 −9 −14 −9 dB
Output-to-Output Isolation Any output, 54 MHz to 865 MHz dB
@ 54 MHz −26 −26 dB
@ 550 MHz −25 −25 dB
@ 865 MHz −25 −25 dB
1 dB Compression (P1dB) Output referred, f = 100 MHz 9.0 8.7 dBm
POWER SUPPLY
Nominal Supply Voltage 4.75 5.0 5.25 4.75 5.0 5.25 V
Quiescent Supply Current 92 105 92 105 mA
Supply Voltage 5.5 V
Power Dissipation See Figure 3
Storage Temperature Range −65°C to +125°C
Operating Temperature Range −40°C to +85°C
Lead Temperature (Soldering, 10 sec) 300°C
Junction Temperature 150°C
Stresses above those listed under Absolute Maximum
Ratings may cause permanent damage to the device. This is
a stress rating only; functional operation of the device at
these or any other conditions above those indicated in the
operational section of this specification is not implied.
Exposure to absolute maximum rating conditions for
extended periods may affect device reliability.
THERMAL RESISTANCE
θJA is specified for the device (including exposed pad)
soldered to a high thermal conductivity 4-layer (2s2p)
circuit board, as described in EIA/JESD 51-7.
Table 3. Thermal Resistance
Package Type θ
JA
16-Lead LFCSP (Exposed Pad) 98 °C/W
Maximum Power Dissipation
The maximum safe power dissipation in the ADA4304-3/
ADA4304-4 package is limited by the associated rise in
junction temperature (T
) on the die. At approximately
J
150°C, which is the glass transition temperature, the plastic
changes its properties. Even temporarily exceeding this
temperature limit can change the stresses that the package
exerts on the die, permanently shifting the parametric
performance. Exceeding a junction temperature of 150°C
for an extended period can result in changes in the silicon
devices, potentially causing failure.
Unit
The power dissipated in the package (P
the quiescent power dissipation, that is, the supply voltage (V
times the quiescent current (I
). In Tabl e 1, the maximum
S
power dissipation of the ADA4304-3/ADA4304-4 can be
calculated as
P
= 5.25 V × 105 mA = 551 mW
D (MAX)
Airflow increases heat dissipation, effectively reducing θ
In addition, more metal directly in contact with the package
leads/exposed pad from metal traces, through-holes, ground,
and power planes reduces the θ
JA
Figure 3 shows the maximum safe power dissipation in the
package vs. the ambient temperature for the 16-lead LFCSP
(98°C/W) on a JEDEC standard 4-layer board.
2.0
1.8
1.6
1.4
1.2
1.0
0.8
0.6
0.4
MAXIMUM POWER DISSIPATION (W )
0.2
0
0100
1020304050607 08090
AMBIENT TEMPERATURE (°C)
Figure 3. Maximum Power Dissipation vs. Temperature for a 4-Layer Board
ESD CAUTION
) is essentially equal to
D
.
)
S
.
JA
07082-003
Rev. 0 | Page 4 of 12
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