ANALOG DEVICES ADA4304-2 Service Manual

1:2 Single-Ended, Low Cost,

V5V

FEATURES

Ideal for CATV and terrestrial applications
Excellent frequency response

1.6 GHz, −3 dB bandwidth

1 dB flatness to 1.0 GHz
Low noise figure: 4.0 dB
Low distortion

Composite second order (CSO): −62 dBc

Composite triple beat (CTB): −72 dBc

1 dB compression point of 8.25 dBm

2.8 dB of gain per output channel
25 dB output-to-output isolation, 50 MHz to 1000 MHz
75 Ω input and outputs
Integrated output resistors
Small package size: 16-lead, 3 mm × 3 mm LFCSP

APPLICATIONS

Set-top boxes
Residential gateways
CATV distribution systems
Splitter modules
Digital cable ready (DCR) TVs

Active RF Splitter

ADA4304-2

FUNCTIONAL BLOCK DIAGRAM

5

0.1µF0.1µF

1µH

VCC

VIN

0.01µF

IL

ADA4304-2

GND

Figure 1.

VOUT1

0.01µF

VOUT2

0.01µF

06539-001

GENERAL DESCRIPTION

The ADA4304-2 is a 75 Ω active splitter for use in applications
where a lossless signal split is required. Typical applications
include multituner digital set-top boxes, cable splitter modules,
multituner/digital cable ready (DCR) televisions, and home
gateways where traditional solutions require discrete passive
splitter modules with separate fixed gain amplifiers.

The ADA4304-2 is fabricated using Analog Devices, Inc.
proprietary silicon-germanium (SiGe), complementary bipolar
process, enabling it to achieve very low levels of distortion with
a noise figure of 4 dB. The part provides a low cost alternative
that simplifies designs and improves system performance by
integrating a signal splitter element and a gain block into a single
IC. The ADA4304-2 is available in a 16-lead LFCSP and operates in
the extended industrial temperature range of −40°C to +85°C.

Rev. 0

Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Anal og Devices for its use, nor for any infringements of patents or ot her
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.

4

3

2

1

0

–1

–2

–3

GAIN (dB)

–4

–5

–6

–7

–8

10050 1000 4000

Figure 2. Gain (S

TA = +85°C

T

= +25°C

A

FREQUENCY (MHz)

, S31) vs. Frequency

21

TA = –40°C

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: [phone] www.analog.com
Fax: [phone] ©2007 Analog Devices, Inc. All rights reserved.

06539-011

ADA4304-2

TABLE OF CONTENTS

Features.............................................................................................. 1

Applications....................................................................................... 1

Functional Block Diagram .............................................................. 1

General Description ......................................................................... 1

Revision History ............................................................................... 2

Specifications..................................................................................... 3

Absolute Maximum Ratings............................................................ 4

Thermal Resistance ...................................................................... 4

ESD Caution.................................................................................. 4

Pin Configuration and Function Descriptions............................. 5

REVISION HISTORY

5/07—Revision 0: Initial Version

Typical Performance Characteristics..............................................6

Test Circuits........................................................................................8

Applications........................................................................................9

Circuit Description .......................................................................9

Evaluation Boards .........................................................................9

RF Layout Considerations............................................................9

Power Supply..................................................................................9

Outline Dimensions....................................................................... 11

Ordering Guide .......................................................................... 11

Rev. 0 | Page 2 of 12

ADA4304-2

SPECIFICATIONS

VCC = 5 V, 75 Ω system, TA = 25°C, unless otherwise noted.

Table 1.

Parameter Conditions Min Typ Max Unit

DYNAMIC PERFORMANCE

Bandwidth (−3 dB) 1600 MHz

Specified Frequency Range 54 865 MHz

Gain (S21, S31) f = 100 MHz; see Figure 17 and Figure 18 2.8 dB

1 dB Gain Flatness 1000 MHz
NOISE/DISTORTION PERFORMANCE

Noise Figure1 @ 54 MHz 4.0 dB

@ 550 MHz 4.5 dB

@ 865 MHz 4.6 dB

Output IP3 f1 = 97.25 MHz, f2 = 103.25 MHz 26 dBm

Output IP2 f1 = 97.25 MHz, f2 = 103.25 MHz 44.5 dBm

Composite Triple Beat (CTB) 135 channels, 15 dBmV/channel, f = 865 MHz −72 dBc

Composite Second Order (CSO) 135 channels, 15 dBmV/channel, f = 865 MHz −62 dBc

Cross Modulation (CXM)

INPUT CHARACTERISTICS See Figure 17, Figure 18, and Figure 19

Input Return Loss (S11) @ 54 MHz −15 −11 dB

@ 550 MHz −35.5 −22 dB

@ 865 MHz −13.3 −8 dB

Output-to-Input Isolation (S12, S13) Either output, 54 MHz to 865 MHz

@ 54 MHz −32 −30 dB

@ 550 MHz −32 −29 dB

@ 865 MHz −33 −31 dB
OUTPUT CHARACTERISTICS See Figure 17, Figure 18, and Figure 19

Output Return Loss (S22, S33) Either output, 54 MHz to 865 MHz

@ 54 MHz −26.7 −21 dB

@ 550 MHz −22 −15 dB

@ 865 MHz −20 −12 dB

Output-to-Output Isolation (S23, S32) Either output, 54 MHz to 865 MHz dB

@ 54 MHz −26.7 dB

@ 550 MHz −25.1 dB

@ 865 MHz −25 dB

1 dB Compression (P
POWER SUPPLY

Nominal Supply Voltage 4.75 5.0 5.25 V

Quiescent Supply Current 88 105 mA

1

Characterized with 50 Ω noise figure analyzer.

) Output referred, f = 100 MHz 8.25 dBm

1dB

135 channels, 15 dBmV/channel, 100% modulation
@ 15.75 kHz, f = 865 MHz

−69 dBc

Rev. 0 | Page 3 of 12

ADA4304-2

ABSOLUTE MAXIMUM RATINGS

Table 2.

Parameter Rating

Supply Voltage 5.5 V
Power Dissipation See Figure 3
Storage Temperature Range −65°C to +125°C
Operating Temperature Range −40°C to +85°C
Lead Temperature (Soldering, 10 sec) 300°C
Junction Temperature 150°C

Stresses above those listed under Absolute Maximum
Ratings may cause permanent damage to the device. This is
a stress rating only; functional operation of the device at
these or any other conditions above those indicated in the
operational section of this specification is not implied.
Exposure to absolute maximum rating conditions for
extended periods may affect device reliability.

THERMAL RESISTANCE

θJA is specified for the device (including exposed pad)
soldered to a high thermal conductivity 2s2p circuit board,
as described in EIA/JESD 51-7.

Table 3. Thermal Resistance

Package Type θJA Unit

16-Lead LFCSP (Exposed Pad) 98 °C/W

Maximum Power Dissipation

The maximum safe power dissipation in the ADA4304-2
package is limited by the associated rise in junction
temperature (T
which is the glass transition temperature, the plastic changes
its properties. Even temporarily exceeding this temperature
limit can change the stresses that the package exerts on the
die, permanently shifting the parametric performance of
the ADA4304-2. Exceeding a junction temperature of 150°C
for an extended period can result in changes in the silicon
devices, potentially causing failure.

) on the die. At approximately 150°C,

J

The power dissipated in the package (P
the quiescent power dissipation; the supply voltage (V
the quiescent current (I

). In Tab le 1 , the maximum power

S

dissipation of the ADA4304-2 can be calculated as

P

= 5.25 V × 105 mA = 551 mW

D (MAX)

Airflow increases heat dissipation, effectively reducing θ
In addition, more metal directly in contact with the package
leads/exposed pad from metal traces, through-holes, ground,
and power planes reduces the θ

JA

Figure 3 shows the maximum safe power dissipation in the
package vs. the ambient temperature for the 16-lead LFCSP
(98°C/W) on a JEDEC standard 4-layer board.

2.0

1.8

1.6

1.4

1.2

1.0

0.8

0.6

0.4

MAXIMUM POWER DISSIPATION (W)

0.2

0

10 20 30 40 50 60 70 80 90

0 100

AMBIENT TEMPERATURE (°C)

Figure 3. Maximum Power Dissipation vs. Temperature for a 4-Layer Board

ESD CAUTION

) is essentially equal to

D

.

) times

S

.

JA

06539-004

Rev. 0 | Page 4 of 12