ANALOG DEVICES ADA4084-2 Service Manual

I/O, Low Power Operational Amplifier

ADA4084-2

Rev. A

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1

2

3

4

8

7

6

5

OUT B
–IN B
+IN B

V+

OUT A

–IN A
+IN A

V–

ADA4084-2

TOP VIEW

(Not to S cale)

08237-001

Data Sheet

FEATURES

Rail-to-rail input/output
Low power: 625 µA typical
Gain bandwidth product: 15.9 MHz at A
Unity-gain crossover: 9.9 MHz typical

−3 dB closed-loop bandwidth: 13.9 MHz typical at ±15 V
Low offset voltage: 100 μV maximum (SOIC)
Unity-gain stable
High slew rate: 4.6 V/μs typical
Low noise: 3.9 nV/√Hz typical at 1 kHz

APPLICATIONS

Battery-powered instrumentation
Power supply control and protection
Telecommunications
DAC output amplifier
ADC input buffer

GENERAL DESCRIPTION

The ADA4084-2 is a dual, single-supply, 10 MHz bandwidth
amplifier featuring rail-to-rail inputs and outputs. It is guaran­teed to operate from 3 V to 30 V (or ±1.5 V to ±15 V).

These amplifiers are well suited for single-supply applications
requiring both ac and precision dc performance. The combina­tion of wide bandwidth, low noise, and precision makes the

ADA4084-2 useful in a wide variety of applications, including

filters and instrumentation.
Other applications for these amplifiers include portable telecom-

munications equipment, power supply control and protection,
and use as amplifiers or buffers for transducers with wide output
ranges. Sensors requiring a rail-to-rail input amplifier include
Hall effect, piezoelectric, and resistive transducers.

The ability to swing rail-to-rail at both the input and output
enables designers to build multistage filters in single-supply
systems and to maintain high signal-to-noise ratios.

The ADA4084-2 is specified over the industrial temperature
range of −40°C to +125°C. The dual ADA4084-2 is available in
the 8-lead SOIC and MSOP surface-mount packages.

=100 typical

V

30 V, Low Noise, Rail-to-Rail

PIN CONFIGURATIONS

Figure 1. 8-Lead MSOP (RM)

8-Lead SOIC (R)

The ADA4084-2 is a member of a growing series of high voltage,
low noise op amps offered by Analog Devices, Inc., (see Table 1).

For a more complete selection table of low input voltage noise
amplifiers, see the AN-940 Application Note, Low Noise
Amplifier Selection Guide for Optimal Noise Performance,
available at www.analog.com.

Table 1. Low Noise Op Amps

Voltage Noise Single Dual Quad

1.1 nV/Hz AD8597 AD8599

1.8 nV/Hz ADA4004-1 ADA4004-2 ADA4004-4

2.8 nV/Hz RRO1 AD8675 AD8676

2.8 nV/Hz AD8671 AD8672 AD8674

3.2 nV/Hz OP27/OP37

3.9 nV/Hz RRIO2 ADA4084-2

1

Rail-to-rail output.

2

Rail-to-rail input/output.

responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change with out notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: [phone]

www.analog.com

ADA4084-2 Data Sheet

TABLE OF CONTENTS

Features .............................................................................................. 1

Applications ....................................................................................... 1

General Description ......................................................................... 1

Pin Configurations ........................................................................... 1

Revision History ............................................................................... 2

Specifications ..................................................................................... 3

Electrical Characteristics ............................................................. 3

Absolute Maximum Ratings ............................................................ 6

Thermal Resistance ...................................................................... 6

ESD Caution .................................................................................. 6

Typical Performance Characteristics ............................................. 7

±1.5 V Characteristics .................................................................. 7

±5 V Characteristics ................................................................... 11

REVISION HISTORY

2/12—Rev. 0 to Rev. A

Changes to Data Sheet Title ............................................................ 1

Changes to Voltage Range in General Description ...................... 1

Changes to Supply Current/Amplifier Parameter, Table 2.......... 3

Changes to Common-Mode Rejection Ratio Parameter, Table 3 .. 4
Changes to Common-Mode Rejection Ratio Parameter, Table 4 .. 5

Changes to Figure 2 .......................................................................... 6

Changes to Figure 24 ...................................................................... 10

Changes to Figure 32 ...................................................................... 12

Changes to Figure 47 ...................................................................... 14

Changes to Figure 55 ...................................................................... 16

Changes to Figure 62 ...................................................................... 17

Changes to Figure 73 ...................................................................... 20

10/11—Revision 0: Initial Version

±15 V Characteristics ................................................................ 15

Comparative Voltage and Variable Voltage Graphs ............... 19

Applications Information .............................................................. 20

Functional Description .............................................................. 20

Input Protection ......................................................................... 21

Output Phase Reversal ............................................................... 21

Designing Low Noise Circuits in Single-Supply

Applications ................................................................................ 21

Comparator Operation .............................................................. 22

Outline Dimensions ....................................................................... 23

Ordering Guide .......................................................................... 23

Rev. A | Page 2 of 24

Data Sheet ADA4084-2

Large Signal Voltage Gain

AVO

RL = 2 kΩ, 0.5 V ≤ VO ≤ 2.5 V

100

104 dB

SPECIFICATIONS

ELECTRICAL CHARACTERISTICS

VSY = 3 V, VCM =1.5 V, TA = 25°C, unless otherwise noted.

Table 2.

Parameter Symbol Test Conditions/Comments Min Typ Max Unit

INPUT CHARACTERISTICS

Offset Voltage1 VOS SOIC package 100 μV

−40°C ≤ TA ≤ +125°C 200 μV
MSOP package 130 μV

−40°C ≤ TA ≤ +125°C 250 μV
Offset Voltage Drift ΔVOS/ΔT −40°C ≤ TA ≤ +125°C 0.5 1.75 µV/°C
Offset Voltage Matching Channel A vs. Channel B, TA = 25°C 150 μV
Input Bias Current IB 140 300 nA
–40°C ≤ TA ≤ +125°C 450 nA
Input Offset Current IOS 25 nA
–40°C ≤ TA ≤ +125°C 50 nA
Input Voltage Range 0 3 V
Common-Mode Rejection Ratio CMRR VCM = 0 V to 3 V 64 80 dB

−40°C ≤ TA ≤ +125°C 60 dB

RL = 2 kΩ, −40°C ≤ TA ≤ +125°C 97 dB
Input Impedance, Differential 100||1.1 kΩ||pF
Input Impedance, Common-Mode 80||2.9 MΩ||pF

OUTPUT CHARACTERISTICS

Output Voltage High VOH RL = 10 kΩ to VCM 2.85 2.95 V
–40°C ≤ TA ≤ +125°C 2.8 V
RL = 2 kΩ to VCM 2.8 2.9 V
–40°C ≤ TA ≤ +125°C 2.7 V
Output Voltage Low VOL RL = 10 kΩ to VCM 10 20 mV
–40°C ≤ TA ≤ +125°C 40 mV
RL = 2 kΩ to VCM 50 mV
–40°C ≤ TA ≤ +125°C 75 mV
Short-Circuit Current I

POWER SUPPLY

Power Supply Rejection Ratio PSRR VSY = ±1.25 V to ±1.75 V 100 110 dB
–40°C ≤ TA ≤ +125°C 90 dB
Supply Current/Amplifier ISY IO = 0 mA 565 650 µA
–40°C ≤ TA ≤ +125°C 950 µA

DYNAMIC PERFORMANCE

Slew Rate SR RL = 2 kΩ 2.0 2.6 V/µs
Gain Bandwidth Product GBP VIN = 5 mV p-p, RL = 10 kΩ, AV = 100 15.4 MHz
Unity-Gain Crossover UGC VIN = 5 mV p-p, RL = 10 kΩ, AV = 1 8.08 MHz
Phase Margin ΦM 86 Degrees

−3 dB Closed-Loop Bandwidth −3 dB AV = 1, VIN = 5 mV p-p 12.3 MHz

NOISE PERFORMANCE

Voltage Noise en p-p 0.1 Hz to 10 Hz 0.14 μV p-p

Voltage Noise Density en f = 1 kHz 3.9 nV/√Hz

Current Noise Density in f = 1 kHz 0.55 pA/√Hz

1

Offset voltage does not include solder heat resistance.

−17/+10 mA

SC

Rev. A | Page 3 of 24

ADA4084-2 Data Sheet

MSOP package

130

μV

−40°C ≤ TA ≤ +125°C

450

nA

−40°C ≤ TA ≤ +125°C

4.7

V

Supply Current/Amplifier

ISY

IO = 0 mA

595

700

µA

Current Noise Density

in

0.55 pA/√Hz

VSY = ±5.0 V, VCM = 0 V, TA = 25°C, unless otherwise noted.

Table 3.

Parameter Symbol Conditions Min Typ Max Unit

INPUT CHARACTERISTICS

Offset Voltage1 VOS SOIC package 100 μV

−40°C ≤ TA ≤ +125°C 250 μV

−40°C ≤ TA ≤ +125°C 250 μV
Offset Voltage Drift ΔVOS/ΔT −40°C ≤ TA ≤ +125°C 0.5 1.75 μV/°C
Offset Voltage Matching Channel A vs. Channel B, TA = 25°C 150 μV
Input Bias Current IB 140 300 nA

Input Offset Current IOS 25 nA

−40°C ≤ TA ≤ +125°C 50 nA
Input Voltage Range −5 +5 V
Common-Mode Rejection Ratio CMRR VCM = ±4 V 106 124 dB
VCM = ±5 V, −40°C ≤ TA ≤ +125°C 76 dB
Large Signal Voltage Gain AVO RL = 2 kΩ, −4 V ≤ VO ≤ 4 V 108 112 dB

RL = 2 kΩ, −40°C ≤ TA ≤ +125°C 103 dB

Input Impedance, Differential 100||1.1 kΩ||pF
Input Impedance, Common-Mode 200||2.5 MΩ||pF

OUTPUT CHARACTERISTICS

Output Voltage High VOH RL = 10 kΩ to VCM 4.9 4.95 V

−40°C ≤ TA ≤ +125°C 4.8 V
RL = 2 kΩ to VCM 4.8 4.85 V

Output Voltage Low VOL RL = 10 kΩ to VCM −4.95 −4.9 V

−40°C ≤ TA ≤ +125°C −4.8 V
RL = 2 kΩ to VCM −4.95 −4.8 V

−40°C ≤ TA ≤ +125°C −4.7 V
Short Circuit Current ISC −24/+17 mA

POWER SUPPLY

Power Supply Rejection Ratio PSRR VSY = ±2 V to ±18 V 110 120 dB

−40°C ≤ TA ≤ +125°C 105 dB

−40°C ≤ TA ≤ +125°C 1000 µA

DYNAMIC PERFORMANCE

Slew Rate SR RL = 2 kΩ to VCM 2.4 3.7 V/µs
Gain Bandwidth Product GBP VIN = 5 mV p-p, RL = 10 kΩ, AV = 100 15.9 MHz
Unity-Gain Crossover UGC VIN = 5 mV p-p, RL = 10 kΩ, AV = 1 9.6 MHz
Phase Margin ΦM 85 Degrees

−3 dB Closed-Loop Bandwidth −3 dB AV = 1, VIN = 5 mV p-p 13.9 MHz

NOISE PERFORMANCE

Voltage Noise en p-p 0.1 Hz to 10 Hz 0.14 µV p-p
Voltage Noise Density en f = 1 kHz 3.9 nV/√Hz

1

Offset Voltage does not include solder heat resistance.

Rev. A | Page 4 of 24

Data Sheet ADA4084-2

MSOP package

130

μV

−40°C ≤ TA ≤ +125°C

450

nA

−40°C ≤ TA ≤ +125°C

14.3

V

Supply Current/Amplifier

ISY

IO = 0 mA

625

750

µA

Current Noise Density

in

0.55 pA/√Hz

VSY = ±15.0 V, VCM = 0 V, TA = 25°C, unless otherwise noted.

Table 4.

Parameter Symbol Conditions Min Typ Max Unit

INPUT CHARACTERISTICS

Offset Voltage1 VOS SOIC package 100 μV

−40°C ≤ TA ≤ +125°C 200 μV

−40°C ≤ TA ≤ +125°C 250 μV

Offset Voltage Drift ΔVOS/ΔT 0.5 1.75 μV/°C

Offset Voltage Matching Channel A vs. Channel B, TA = 25°C 150 μV

Input Bias Current IB 140 300 nA

Input Offset Current IOS 25 nA

−40°C ≤ TA ≤ +125°C 50 nA

Input Voltage Range −15 +15 V

Common-Mode Rejection Ratio CMRR VCM = ±14 V 106 124 dB

VCM = ±15 V, −40°C ≤ TA ≤ +125°C 85 dB

Large Signal Voltage Gain AVO RL = 2 kΩ, −13.5 V ≤ VO ≤ +13.5 V 110 117 dB

−40°C ≤ TA ≤ +125°C 105 dB
Input Impedance, Differential 100||1.1 kΩ||pF
Input Impedance, Common-Mode 200||2.5 MΩ||pF

OUTPUT CHARACTERISTICS

Output Voltage High VOH RL = 10 kΩ to VCM 14.8 14.9 V

−40°C ≤ TA ≤ +125°C 14.8 V
RL = 2 kΩ to VCM 14.5 14.6 V

Output Voltage Low VOL RL = 10 kΩ to VCM −14.95 −14.9 V

−40°C ≤ TA ≤ +125°C −14.8 V
RL = 2 kΩ to VCM −14.9 −14.8 V

−40°C ≤ TA ≤ +125°C −14.7 V
Short Circuit Current ISC ±30 mA

POWER SUPPLY

Power Supply Rejection Ratio PSRR VSY = ±2 V to ±18 V 110 120 dB

−40°C ≤ TA ≤ +125°C 105 dB

−40°C ≤ TA ≤ +125°C 1050 µA

DYNAMIC PERFORMANCE

Slew Rate SR RL = 2 kΩ 2.4 4.6 V/µs
Gain Bandwidth Product GBP VIN = 5 mV p-p, RL = 10 kΩ, AV = 100 15.9 MHz
Unity-Gain Crossover UGC VIN = 5 mV p-p, RL = 10 kΩ, AV = 1 9.9 MHz
Phase Margin ΦM 86 Degrees

−3 dB Closed-Loop Bandwidth −3 dB AV = 1, VIN = 5 mV p-p 13.9 MHz

NOISE PERFORMANCE

Voltage Noise en p-p 0.1 Hz to 10 Hz 0.1 µV p-p
Voltage Noise Density en f = 1 kHz 3.9 nV/√Hz

1

Offset Voltage does not include solder heat resistance.

Rev. A | Page 5 of 24

ADA4084-2 Data Sheet

Input Voltage

V− ≤ VIN ≤ V+

D2

D101

D100

D5 D4

D1

Q1

Q4 Q3

Q24

Q21

D20

Q13

Q18

Q19

Q23

Q2

FOLDED

CASCADE

V

EE

V

OUT

V

CC

V

BIAS

MIRROR

08237-002

R4

R5

R6

R7

C2

C1

R1 R2

R3

ABSOLUTE MAXIMUM RATINGS

Table 5.

Parameter Rating

Supply Voltage ±18 V

Differential Input Voltage1 ±0.6 V
Output Short-Circuit Duration to GND Indefinite
Storage Temperature Range −65°C to +150°C
Operating Temperature Range −40°C to +125°C
Junction Temperature Range −65°C to +150°C
Lead Temperature (Soldering 60 sec) 300°C

1

For input differential voltages greater than 0.6 V, the input current should be

limited to less than 5 mA to prevent degradation or destruction of the input
devices.

Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.

THERMAL RESISTANCE

θJA is specified for the device soldered on a 4-layer JEDEC
standard printed circuit board (PCB) with zero airflow.

Table 6. Thermal Resistance

Package Type θJA θJC Unit

8-Lead SOIC 121 43 °C/W
8-Lead MSOP 142 45 °C/W

ESD CAUTION

Figure 2. Simplified Schematic

Rev. A | Page 6 of 24

Data Sheet ADA4084-2

120

NUMBER OF AMP LIFIE RS

08237-003

50

NUMBER OF AMP LIFIE RS

08237-004

60

0

0 2.0

NUMBER OF AMP LIFIE RS

TCVOS (µV/°C)

ADA4084-2
V

SY

= ±1.5V

T

A

= 25°C

R

L

= ∞

–40° ≤ T

A

≤ +125°C

10

20

30

40

50

0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8

08237-005

500

–500

0 0.50 0.75 1.00 1.25 1.500.25 3.002.75

2.502.252.001.75

INPUT OFFSET VOLTAGE (µV)

COMMON-MODE VOLTAGE (V)

–400

–300

–200

–100

0

100

200

300

400

ADA4084-2
V

SY

= ±1.5V

T

A

= 25°C

R

L

= ∞

08237-006

–50

–100

–150

–200

–250

–40 125

INPUT BIAS ( nA)

TEMPERATURE (°C)

–25 –10 5 20 35 50 65 80 95 110

ADA4084-2
V

SY

= ±1.5V

V

CM

= 0V

R

L

= ∞

IB+

IB–

08237-007

600

–600

–1.5 –1.0

1.0–0.5 0.50 1.5

INPUT BIAS ( nA)

VCM (V)

–400

–200

0

200

400

TA = +85°C

T

A

= +25°C

T

A

= +125°C

TA = –40°C

ADA4084-2
V

SY

= ±1.5V

08237-008

TYPICAL PERFORMANCE CHARACTERISTICS

TA = 25°C, unless otherwise noted.

±1.5 V CHARACTERISTICS

ADA4084-2
V

= ±1.5V

SY

100

= 25°C

T

A

R

= ∞

L

80

60

40

20

0
–100 –50 500 100

–25 25–75 75

VOS (µV)

Figure 3. Input Offset Voltage Distribution, SOIC

ADA4084-2

45

V

= ±1.5V

SY

= 25°C

T

A

40

R

= ∞

L

35

30

25

20

15

10

5

0
–100 –50 –25 25–75 75500 100

VOS (µV)

Figure 4. Input Offset Voltage Distribution, MSOP

Figure 6. Input Offset Voltage vs. Common-Mode Voltage

Figure 7. Input Bias Current vs. Temperature

Figure 5. TCVOS Distribution, SOIC

Figure 8. Input Bias Current vs. VCM and Temperature

Rev. A | Page 7 of 24

ADA4084-2 Data Sheet

1000

100

10

1

0.001 0.01 0.1 1 10

V

DO

(mV)

LOAD CURRENT ( mA)

ADA4084-2
V

SY

= ±1.5V

T

A

= 25°C

(V+) –V

OH

08237-009

1000

100

10

1

0.001 0.01 0.1 1 10

V

DO

(mV)

LOAD CURRENT ( mA)

ADA4084-2
V

SY

= ±1.5V

T

A

= 25°C

V

OL

– (V–)

08237-010

120

–40

270

–90

0.1 100k

GAIN (dB)

PHASE (Degrees)

FREQUENCY ( kHz )

–45

0

45

90

135

180

225

–20

20

0

40

60

80

100

1 10 100 1k 10k

ADA4084-2
V

SY

= ±1.5V

T

A

= 25°C

R

L

= 10kΩ

08237-011

60

–20

10 100M

GAIN (dB)

FREQUENCY ( Hz )

–10

0

10

20

30

40

50

100 1k 10k 100k 10M1M

AV = +100

AV = +10

AV = +1

ADA4084-2
V

SY

= ±1.5V

T

A

= 25°C

08237-012

1000

100

10

1

0.10

0.01
10 100M

Z

OUT

(Ω)

FREQUENCY ( Hz )

100 1k 10k 100k 10M1M

ADA4084-2
V

SY

= ±1.5V

T

A

= 25°C

AV = +10

AV = +100

A

V

= +1

08237-013

140

–20

10 100M

PSRR (dB)

FREQUENCY ( Hz )

0

20

40

60

80

100

120

100 1k 10k 100k 10M1M

ADA4084-2
V

SY

= ±1.5V

T

A

= 25°C

PSRR–

PSRR+

08237-014

Figure 9. Dropout Voltage vs. Source Current

Figure 12. Closed-Loop Gain vs. Frequency

Figure 10. Dropout Voltage vs. Sink Current

Figure 11. Open-Loop Gain and Phase vs. Frequency

Figure 13. Output Impedance vs. Frequency

Figure 14. PSRR vs. Frequency

Rev. A | Page 8 of 24