High slew rate: 20 V/μs
Fast settling time
Low offset voltage: 1.70 mV maximum
Bias current: 40 pA maximum
±4 V to ±18 V operation
Low voltage noise: 16 nV/Hz
Unity gain stable
Common-mode voltage includes +V
Wide bandwidth: 5 MHz
APPLICATIONS
Reference gain/buffers
Level shift/driving
Active filters
Power line monitoring/control
Current/voltage sense or monitoring
Data acquisition
Sample-and-hold circuits
Integrators
GENERAL DESCRIPTION
The ADA4000-1/ADA4000-2/ADA4000-4 are junction field
effect transistor (JFET) input operational amplifiers featuring
precision, very low bias current, and low power. Combining
high input impedance, low input bias current, wide bandwidth,
fast slew rate, and fast settling time, the ADA4000-1/ADA4000-
2/ADA4000-4 are ideal amplifiers for driving analog-to-digital
inputs and buffering digital-to-analog converter outputs. The
input common-mode voltage includes the positive power supply,
which makes the device an excellent choice for high-side signal
conditioning.
Additional applications for the ADA4000-1/ADA4000-2/
ADA4000-4 include electronic instruments, automated test
equipment (ATE) amplification, buffering, integrator circuits,
instrumentation-quality photodiode amplification, and fast
precision filters (including phase-locked loop filters). The devices
also include utility functions, such as reference buffering, level
shifting, control input/output interface, power supply control,
and monitoring functions.
S
ADA4000-1/ADA4000-2/ADA4000-4
PIN CONFIGURATIONS
UT
1
ADA4000-1
TOP VIEW
V–
2
(Not to S cale)
+IN
3
Fig
ure 1. 5-Lead TSOT (UJ-5)
NC
1
–IN
2
ADA4000-1
+IN
OUT A
–IN A
+IN A
OUT A
–IN A
+IN A
OUT A
–IN A
+IN A
+IN B
–IN B
OUT B
OUT A
–IN A
+IN A
+IN B
–IN B
OUT B
Figure 6.
TOP VIEW
3
(Not to Scale)
4
V–
NC = NO CONN E CT
ure 2. 8-Lead SOIC (R-8)
Fig
1
2
ADA4000-2
TOP VIEW
3
(Not to S cale)
–V
4
Fig
ure 3. 8-Lead SOIC (R-8)
1
2
ADA4000-2
TOP VIEW
3
(Not to Scale)
4
–V
Fig
ure 4. 8-Lead MSOP (RM-8)
1
2
3
ADA4000-4
4
+V
TOP VIEW
(Not to Scale)
5
6
7
Figure 5.
14-Lead SOIC (R-14)
1
2
3
ADA4000-4
TOP VIEW
4
+V
(Not to Scale)
5
6
7
14-Lead TSSOP (RU-14)
8
7
6
5
5
4
8
7
6
5
8
7
6
5
14
13
12
11
10
14
13
12
11
10
9
8
9
8
V+
–IN
NC
V+
OUT
NC
+V
OUT B
–IN B
+IN B
+V
OUT B
–IN B
+IN B
OUT D
–IN D
+IN D
–V
+IN C
–IN C
OUT C
OUT D
–IN D
+IN D
–V
+IN C
–IN C
OUT C
05791-001
05791-002
05791-027
05791-028
05791-029
05791-030
Rev. B Document Feedback
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
VS = ±15.0 V, VCM = VS/ 2 V, TA = 25°C, unless otherwise specified.
Table 1.
INPUT CHARACTERISTICS
Offset Voltage VOS 0.2 1.70 mV
−40°C ≤ TA ≤ +125°C 3.0 mV
Input Bias Current IB 5 40 pA
−40°C ≤ TA ≤ +85°C 170 pA
−40°C ≤ TA ≤ +125°C 4.5 nA
Input Offset Current IOS 2 40 pA
−40°C ≤ TA ≤ +85°C 80 pA
Input Voltage Range IVR −11 +15 V
Common-Mode Rejection Ratio CMRR −11 V ≤ VCM ≤ +15 V 80 100 dB
−40°C ≤ TA ≤ +125°C 100 dB
Open-Loop Gain AVO RL = 2 kΩ, VO = ±10 V 100 110 dB
OUTPUT CHARACTERISTICS
Output Voltage High VOH RL = 2 kΩ to ground 13.60 13.90 V
−40°C ≤ TA ≤ +125°C 13.40 V
Output Voltage Low VOL RL = 2 kΩ to ground −13.4 −13.0 V
−40°C ≤ TA ≤ +125°C −12.80 V
Short-Circuit Current ISC ±28 mA
POWER SUPPLY
Power Supply Rejection Ratio PSRR VS = ±4.0 V to ±18.0 V 82 92 dB
Supply Current/Amplifier ISY 1.35 1.65 mA
−40°C ≤ TA ≤ +125°C 1.80 mA
DYNAMIC PERFORMANCE
Slew Rate SR VI = 10 V, RL = 2 kΩ 20 V/µs
Gain Bandwidth Product GBP 5 MHz
Phase Margin ΦM 60 Degrees
NOISE PERFORMANCE
Voltage Noise e
Voltage Noise Density en f = 1 kHz 16 nV/√Hz
0.1 Hz to 10 Hz 1 µV p-p
n p-p
INPUT IMPEDANCE
Differential Mode (R||C)
Common Mode (R||C)
IN-DIFF
INCM
10||4 GΩ||pF
103||5.5 GΩ||pF
Rev. B | Page 3 of 16
Page 4
ADA4000-1/ADA4000-2/ADA4000-4 Data Sheet
Input Bias Current
IB 5 40
pA
−40°C ≤ TA ≤ +125°C
500
pA
Output Voltage Low
VOL
RL = 2 kΩ to ground
−3.45
−3.20
V
Differential Mode
(R||C)
10||4
GΩ||pF
VS = ±5 V, VCM = VS/ 2 V, TA = 25°C, unless otherwise specified.
Table 2.
Parameter Symbol Test Conditions/Comments Min Typ Max Unit
INPUT CHARACTERISTICS
Offset Voltage VOS 0.20 1.70 mV
−40°C ≤ TA ≤ +125°C 3.0 mV
−40°C ≤ TA ≤ +85°C 170 pA
−40°C ≤ TA ≤ +125°C 3 nA
Input Offset Current IOS 2 40 pA
−40°C ≤ TA ≤ +85°C 80 pA
Input Voltage Range IVR −1.0 +5.0 V
Common-Mode Rejection Ratio CMRR −1.0 V ≤ VCM ≤ +5.0 V 72 80 dB
−40°C ≤ TA ≤ +125°C 80 dB
Open-Loop Gain AVO RL = 2 kΩ, VO = ±2.5 V 106 114 dB
Offset Voltage Drift ΔVOS/ΔT −40°C ≤ TA ≤ +125°C 2 µV/°C
OUTPUT CHARACTERISTICS
Output Voltage High VOH RL = 2 kΩ to ground 4.0 4.20 V
−40°C ≤ TA ≤ +125°C 3.80 V
−40°C ≤ TA ≤ +125°C −3.00 V
Short-Circuit Current ISC ±28 mA
POWER SUPPLY
Supply Current/Amplifier ISY 1.25 1.65 mA
−40°C ≤ TA ≤ +125°C 1.80 mA
DYNAMIC PERFORMANCE
Slew Rate SR VI = 10 V, RL = 2 kΩ 20 V/µs
Gain Bandwidth Product GBP 5 MHz
Phase Margin ΦM 55 Degrees
NOISE PERFORMANCE
Voltage Noise e
Voltage Noise Density en f = 1 kHz 16
Current Noise Density in f = 1 kHz 0.01
0.1 Hz to 10 Hz 1 µV p-p
n p-p
nV/√Hz
pA/√Hz
INPUT IMPEDANCE
IN-DIFF
Common Mode (R||C)
INCM
103||5.5 GΩ||pF
Rev. B | Page 4 of 16
Page 5
Data Sheet ADA4000-1/ADA4000-2/ADA4000-4
Input Voltage
±V supply
8-Lead SOIC (R-8)
112.38
61.6
°C/W
8-Lead MSOP (RM-8)
141.9
43.7
°C/W
ABSOLUTE MAXIMUM RATINGS
Table 3.
Parameter Rating
Supply Voltage ±18 V
THERMAL RESISTANCE
θJA is specified for the worst-case conditions, that is, a device
soldered in a circuit board for surface-mount packages.
Differential Input Voltage ±V supply
Output Short-Circuit Duration to GND Indefinite
Storage Temperature Range −65°C to +150°C
Operating Temperature Range −40°C to +125°C
Junction Temperature Range −65°C to +150°C
Lead Temperature (Soldering, 10 sec) 300°C
Stresses at or above those listed under Absolute Maximum
Ratings may cause permanent damage to the product. This is a
stress rating only; functional operation of the product at these
or any other conditions above those indicated in the operational
section of this specification is not implied. Operation beyond
the maximum operating conditions for extended periods may
affect product reliability.
The operational amplifier supply voltages must be established
simultaneously with, or before, any input signals are applied. If
this is not possible, the input current must be limited to 10 mA.
ESD CAUTION
Rev. B | Page 5 of 16
Page 6
ADA4000-1/ADA4000-2/ADA4000-4 Data Sheet
05791-003
50
45
40
35
30
25
20
15
10
5
0
NUMBER OF AMPLIFIERS
–2.0
–1.5
–1.0
–0.5
00.51.01.52.0
OFFSET VOLTAGE (mV)
VS = ±15V
T
A
= 25°C
V
CM
= 0V
05791-004
4
2
0
6
8
10
12
14
16
18
02
468101214
16
1820
NUMBER OF AMP LIFIERS
TCV
OS
(µV/°C)
V
S
= ±15V
80
–20
1k100M
FREQUENCY (Hz )
GAIN (dB)
05791-010
0
20
40
60
180
–45
PHASE MARGIN ( Degrees)
0
45
90
135
10k100k1M10M
VS = ±15V
T
A
= 25°C
CL = 35pF
60°
05791-018
50
45
40
35
30
25
20
15
10
5
0
NUMBER OF AMPLIFIERS
–2.0–1.5–1.0–0.50
0.5
1.01.5
2.0
OFFSET VOLTAGE (mV)
V
S
= ±5V
T
A
= 25°C
V
CM
= 0V
05791-019
4
2
0
6
8
10
12
14
02468101214161820
NUMBER OF AMPLIFIE RS
TCVOS (µV/°C)
VS = ±5V
80
–20
1k100M
FREQUENCY (Hz )
GAIN (dB)
05791-020
0
20
40
60
180
–45
PHASE MARGIN ( Degrees)
0
45
90
135
10k100k1M10M
VS = ±5V
TA = 25°C
C
L
= 35pF
55°
TYPICAL PERFORMANCE CHARACTERISTICS
Figure 7. Input Offset Voltage Distribution, VS = ±15 V
Figure 8. Offset Voltage Drift Distribution, VS = ±15 V
Figure 10. Input Offset Voltage Distribution, VS = ±5 V
Figure 11. Offset Voltage Drift Distribution, VS = ±5 V
Figure 9. Open-Loop Gain and Phase Margin vs. Frequency, VS = ±15 V
Figure 12. Open-Loop Gain and Phase Margin vs. Frequency, VS = ±5 V
Rev. B | Page 6 of 16
Page 7
Data Sheet ADA4000-1/ADA4000-2/ADA4000-4
120
20
100
10M
FREQUENCY (Hz )
CMRR (dB)
05791-013
40
60
80
100
1k10k100k
1M
V
S
= ±15V
T
A
= 25°C
15
–15
TIME (1µs/DIV)
VOLTAGE (V)
05791-015
–5
10
0
5
–10
VS = ±15V
A
V
= +1
R
L
= 2kΩ
T
A
= 25°C
TIME (2µs/DIV)
VOLTAGE (20mV/DIV)
VS = ±15V
C
L
= 300pF
AV = +1
TA = 25°C
05791-016
100
20
1k10M
FREQUENCY (Hz )
CMRR (dB)
05791-021
60
10k
100k1M
80
40
V
S
= ±5V
T
A
= 25°C
TIME (1µs/DIV)
VOLTAGE (V)
05791-023
4
3
2
1
0
–1
–2
–3
–4
VS = ±5V
A
V
= –1
R
L
= 2kΩ
T
A
= 25°C
TIME (2µs/DIV)
VOLTAGE (20mV/DIV)
05791-024
VS = ±5V
C
L
= 300pF
A
V
= +1
T
A
= 25°C
Figure 13. Common-Mode Rejection Ratio vs. Frequency, VS = ±15 V
Figure 14. Large Signal Transient Response, V
= ±15 V
S
Figure 16. Common-Mode Rejection Ratio vs. Frequency, VS = ±5 V
Figure 17. Large Signal Transient Response, V
= ±5 V
S
Figure 15. Small Signal Transient Response, VS = ±15 V
Figure 18. Small Signal Transient Response, VS = ±5 V
Rev. B | Page 7 of 16
Page 8
ADA4000-1/ADA4000-2/ADA4000-4 Data Sheet
3.5
1.0
±5±15
SUPPLY VOLTAGE (V)
INPUT BIAS CURRE NT (pA)
05791-006
3.0
2.5
2.0
1.5
±6±7±8±9 ±10 ±11 ±12 ±13 ±14
TA = 25°C
10000
–40
TEMPERATURE (°C
)
INPUT BIAS CURRE NT (pA)
05791-005
1
0.1
10
100
1000
–25 –10
52035 50
65 80 95 110 125
VS = ±15V
VS = ±5V
1.44
1.20
–40125
TEMPERATURE (°C)
SUPPLY CURRENT ( mA)
05791-012
1.40
1.36
1.32
1.28
1.24
–25 –10 520 35 5065 80 95 110
VS = ±5V
V
S
= ±15V
1.40
1.35
1.30
1.25
1.20
1.15
1.10
SUPPLY CURRENT ( mA)
±4 ±5 ±6 ±7 ±8 ±9 ±10 ±11
±12 ±13
±14
±15
SUPPLY VOLTAGE (V)
05791-008
TA = 25°C
NO LOAD
16
0
025.0
LOAD CURRENT ( mA)
OUTPUT VOLTAGE (V)
05791-009
14
12
10
8
6
4
2
2.5 5.0 7.5 10.0 12.5 15.0 17.5 20.0 22.5
VS = ±15V
VS = ±5V
|VOL|
V
OH
|VOL|
V
OH
120
–20
100
10M
FREQUENCY (Hz )
PSRR (dB)
05791-014
20
80
1k10k100k
1M
100
40
60
0
V
S
= ±5V, ±15V
PSRR–
PSRR+
Figure 19. Input Bias Current vs. Supply Voltage
Figure 22. Supply Current vs. Supply Voltage
Figure 20. Input Bias Current vs. Temperature
Figure 21. Supply Current vs. Temperature
Figure 23. Output Voltage vs. Load Current
Figure 24. PSRR vs. Frequency
Rev. B | Page 8 of 16
Page 9
Data Sheet ADA4000-1/ADA4000-2/ADA4000-4
10
1001k
100
1
110k
FREQUENC
Y (
Hz)
VOLTAGE NOISE DENSITY (nV/√Hz)
05791-026
10
VS = ±5V, ±15V
TA = 25°C
120
0
1k100M
FREQUENCY (Hz )
Z
OUT
(Ω
)
05791-017
60
80
10k100k1M10M
100
20
40
VS = ±15V
TA = 25°C
Av = +100
Av = +10Av = +1
60
0
0600400200
LOAD CAPACIT ANCE ( pF)
OVERSHOOT (%)
05791-022
800
1000
50
40
30
20
10
V
IN
= 100mV p-p
V
S
= ±5V, ±15V
R
L
= 0
A
V
= +1
+OVERSHOOT
–OVERSHOOT
0.6
–0.6
–5
TIME (Seconds)
V p-p (µV)
05791-025
5
0.4
0.2
0
–0.2
–0.4
–4
–3–2
–1
01234
VS = ±5V, ±15V
50
–30
1001k
100M
FREQUENCY (Hz )
CLOSED-LOOP GAIN (dB)
05791-01
1
–10
0
30
10k100k1M10M
40
10
20
–20
A
V
= +100
AV = +10
AV = +1
V
S
= ±5V, ±15V
Figure 25. Voltage Noise Density vs. Frequency
Figure 26. Output Impedance vs. Frequency
Figure 28. 0.1 Hz to 10 Hz Input Voltage Noise
Figure 29. Closed-Loop Gain vs. Frequency
Figure 27. Overshoot vs. Load Capacitance
Rev. B | Page 9 of 16
Page 10
ADA4000-1/ADA4000-2/ADA4000-4 Data Sheet
V
APPLICATIONS INFORMATION
OUTPUT PHASE REVERSAL AND INPUT NOISE
Phase reversal is a change of polarity in the transfer function of
the amplifier. This can occur when the voltage applied at the
input of the amplifier exceeds the maximum common-mode
voltage. Phase reversal happens when the device is configured
in the gain of 1.
Most JFET amplifiers invert the phase of the input signal if the
input exceeds the common-mode input. Phase reversal is a
temporary behavior of the ADA4000-1/ADA4000-2/ADA4000-4
family. Each device returns to normal operation by bringing back
the common-mode voltage. The cause of this effect is saturation
of the input stage, which leads to the forward-biasing of a draingate diode. In noninverting applications, a simple fix for this is
to insert a series resistor between the input signal and the noninverting terminal of the amplifier. The value of the resistor
depends on the application, because adding a resistor adds to the
total input noise of the amplifier. The total noise density of the
circuit is
nTOTAL
2
where:
e
is the input voltage noise density of the device.
n
i
is the input current noise density of the device.
n
R
is the source resistance at the noninverting terminal.
S
k is Boltzmann’s constant (1.38 × 10
T is the ambient temperature in Kelvin (T = 273 + °C).
In general, it is good practice to limit the input current to less
than 5 mA to avoid driving a great deal of current into the
amplifier inputs.
2
nn
kTRRiee4
SS
−23
J/K).
The advantage of this compensation method is that the swing at
the output is not reduced because R
is out of the feedback network,
S
and the gain accuracy does not change. Depending on the
capacitive loading of the circuit, the values of R
and CS change,
S
and the optimum value can be determined empirically. In
Figure 31, the oscilloscope image shows the output of the
ADA4000-1/ADA4000-2/ADA4000-4 family in response to
a 400 mV pulse. The circuit is configured in the unity gain
configuration with 500 pF in parallel with 10 kΩ of load
capacitive.
INPUT SIGNAL
VOLTAG E (200mV/DIV)
Figure 31. Capacitive Load Drive Without Snubber Network
OUTPUT SIGNAL
TIME (1µs/DIV)
05791-032
When the snubber circuit is used, the overshoot is reduced from
30% to 6% with the same load capacitance. Ringing is virtually
eliminated, as shown in Figure 32. In this circuit, R
C
is 10 nF.
S
is 41 Ω and
S
CAPACITIVE LOAD DRIVE
The ADA4000-1/ADA4000-2/ADA4000-4 are stable at all gains
in both inverting and noninverting configurations. The devices
are capable of driving up to 1000 pF of capacitive loads without
oscillations in unity gain configurations.
However, as with most amplifiers, driving larger capacitive loads
in a unity gain configuration can cause excessive overshoot and
ringing. A simple solution to this problem is to use a snubber
network (see Figure 30).
+15
400mV p-p
3
V1
0
Figure 30. Snubber Network Configuration
V+
ADA4000-1
2
V–
–15V
SNUBBER NETWORK
U1
1
R
S
C
S
C
500pF
0
R
L
L
10kΩ
05791-031
Rev. B | Page 10 of 16
INPUT SIGNAL
VOLTAGE (200mV/DIV)
Figure 32. Capacitive Load with Snubber Network
OUTPUT SIGNAL
TIME (1µs/DI V)
05791-033
Page 11
Data Sheet ADA4000-1/ADA4000-2/ADA4000-4
V
SETTLING TIME
Settling time is the amount of time it takes the amplifier output
to reach and remain within a percentage of the final value. This
is an important parameter in data acquisition systems. Because
most bipolar DAC converters have current output, an external
operational amplifier is required to convert the current to voltage.
Therefore, the amplifier settling time plays a role in the total
settling time of the output signal. A good approximation for the
total settling time is
22
)()(AMPtDACtTotalt
SSS
5V/DIV
200mV/DIV
The ADA4000-1/ADA4000-2/ADA4000-4 settle to within 0.1%
of their final value in less than 1.2 μs. The settling time has been
tested by using the configuration circuit in Figure 34.
The input signal is a 10 V pulse and the output is the error
signal for the settling time shown in Figure 33.
+15
3
10V p-p
0
10kΩ
V1
V+
ADA4000-1
2
V–
–15V
10kΩ
1
Figure 34. Settling Time Test Circuit
10kΩ
10kΩ
200ns/DIV
05791-035
Figure 33. Settling Time Measurement Using the False Summing Node Method
+15V
8
V+
V
OUT
05791-034
1kΩ
AD828
V–
–15V
4
20kΩ
Rev. B | Page 11 of 16
Page 12
ADA4000-1/ADA4000-2/ADA4000-4 Data Sheet
CONTROLLING DIMENSIONSARE IN MILLIME TERS; INCH DI M E NS IONS
(IN PARENTHESES)ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLYAND ARE NOT APPROPRIATE FOR USE IN DESIGN.
COMPLIANT TO JEDEC STANDARDS MS-012-AA
012407-A
0.25 (0.0098)
0.17 (0.0067)
1.27 (0.0500)
0.40 (0.0157)
0.50 (0.0196)
0.25 (0.0099)
45°
8°
0°
1.75 (0.0688)
1.35 (0.0532)
SEATING
PLANE
0.25 (0.0098)
0.10 (0.0040)
4
1
85
5.00 (0.1968)
4.80 (0.1890)
4.00 (0.1574)
3.80 (0.1497)
1.27 (0.0500)
BSC
6.20 (0.2441)
5.80 (0.2284)
0.51 (0.0201)
0.31 (0.0122)
COPLANARITY
0.10
100708-A
*
COMPLIANT TO JEDEC S TANDARDS MO-193-AB
WITH
THE EXCEPT ION OF P ACKAGE HEIGHT AND THICKNESS.
1.60 BSC
2.80 BSC
1.90
BSC
0.95 BSC
0.20
0.08
0.60
0.45
0.30
8°
4°
0°
0.50
0.30
0.10 MAX
*
1.00 MAX
0.90 MAX
0.70 MIN
2.90 BSC
5
4
123
SE
ATING
PLANE
OUTLINE DIMENSIONS
Figure 35. 8-Lead Standard Small Outline Package [SOIC_N]
Narrow Body
(R-8)
Dimensions shown in millimeters and (inches)
Figure 36. 5-Lead Thin Small Outline Transistor Package [TSOT]
(UJ-5)
Dimensions shown in millimeters
Rev. B | Page 12 of 16
Page 13
Data Sheet ADA4000-1/ADA4000-2/ADA4000-4
COMPLI ANT TO JEDEC STANDARDS MO-187-AA
6°
0°
0.80
0.55
0.40
4
8
1
5
0.65 BSC
0.40
0.25
1.10 MAX
3.20
3.00
2.80
COPLANARITY
0.10
0.23
0.09
3.20
3.00
2.80
5.15
4.90
4.65
PIN 1
IDENTIFIER
15° MAX
0.95
0.85
0.75
0.15
0.05
10-07-2009-B
COMPLIANT TO JEDEC S TANDARDS MO-153-AB- 1
061908-A
8°
0°
4.50
4.40
4.30
14
8
7
1
6.40
BSC
PIN 1
5.10
5.00
4.90
0.65 BSC
0.15
0.05
0.30
0.19
1.20
MAX
1.05
1.00
0.80
0.20
0.09
0.75
0.60
0.45
COPLANARITY
0.10
SEATING
PLANE
CONTROLLING DIMENSIONSARE IN MILLIME TERS; INCH DI M E NS IONS
(IN P
ARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLYAND ARE NOT APPROPRIATE FOR USE IN DESIGN.
COMPLIANT TO JEDEC S
TANDARDS MS-012-AB
060606-A
14
8
7
1
6.20 (0.2441)
5.80 (0.2283)
4.00 (0.1575)
3.80 (0.1496)
8.75 (0.3445)
8.55 (0.3366)
1.27 (0.0500)
BSC
SEATING
PLANE
0.25 (0.0098)
0.10 (0.0039)
0.51 (0.0201)
0.31 (0.0122)
1.75 (0.0689)
1.35 (0.0531)
0.50 (0.0197)
0.25 (0.0098)
1.27 (0.0500)
0.40 (0.0157)
0.25 (0.0098)
0.17 (0.0067)
COPLANARITY
0.10
8°
0°
45°
Figure 37. 8-Lead Mini Small Outline Package [MSOP]
(RM-8)
Dimensions shown in millimeters
Figure 38. 14-Lead Standard Small Outline Package [TSSOP]
(RU-14)
Dimensions shown in millimeters
Figure 39. 14-Lead Standard Small Outline Package [SOIC_N]
(R-14)
Dimensions shown in millimeters
Rev. B | Page 13 of 16
Page 14
ADA4000-1/ADA4000-2/ADA4000-4 Data Sheet
Model1
Temperature Range
Package Description
Package Option
Branding
ADA4000-2ARMZ
−40°C to +125°C
8-Lead MSOP
RM-8
A1H
ADA4000-4ARZ
−40°C to +125°C
14-Lead SOIC_N
R-14
ADA4000-4ARZ-R7
−40°C to +125°C
14-Lead SOIC_N
R-14
ORDERING GUIDE
ADA4000-1ARZ −40°C to +125°C 8-Lead SOIC_N R-8
ADA4000-1ARZ-R7 −40°C to +125°C 8-Lead SOIC_N R-8
ADA4000-1ARZ-RL −40°C to +125°C 8-Lead SOIC_N R-8
ADA4000-1AUJZ-R2 −40°C to +125°C 5-Lead TSOT UJ-5 A14
ADA4000-1AUJZ-R7 −40°C to +125°C 5-Lead TSOT UJ-5 A14
ADA4000-1AUJZ-RL −40°C to +125°C 5-Lead TSOT UJ-5 A14
ADA4000-2ARZ −40°C to +125°C 8-Lead SOIC_N R-8
ADA4000-2ARZ-R7 −40°C to +125°C 8-Lead SOIC_N R-8
ADA4000-2ARZ-RL −40°C to +125°C 8-Lead SOIC_N R-8
ADA4000-2ARMZ-RL −40°C to +125°C 8-Lead MSOP RM-8 A1H
ADA4000-4ARZ-RL −40°C to +125°C 14-Lead SOIC_N R-14
ADA4000-4ARUZ −40°C to +125°C 14-Lead TSSOP RU-14
ADA4000-4ARUZ-RL −40°C to +125°C 14-Lead TSSOP RU-14