Analog Devices AD9943 4 b Datasheet

Complete 10-Bit and 12-Bit, 25 MHz

FEATURES

25 MSPS correlated double sampler (CDS) 6 dB to 40 dB 10-bit variable gain amplifier (VGA) Low noise optical black clamp circuit Preblanking function 10-bit (AD9943), 12-bit (AD9944) 25 MSPS A/D converter No missing codes guaranteed 3-wire serial digital interface 3 V single-supply operation Space-saving 32-lead 5 mm × 5 mm LFCSP package

APPLICATIONS

Digital still cameras Digital video camcorders PC cameras Portable CCD imaging devices CCTV cameras

CCD Signal Processors

AD9943/AD9944

GENERAL DESCRIPTION

The AD9943/AD9944 are complete analog signal processors for CCD applications. They feature a 25 MHz single-channel architecture designed to sample and condition the outputs of interlaced and progressive scan area CCD arrays. The signal chain for the AD9943/AD9944 consists of a correlated double sampler (CDS), a digitally controlled variable gain amplifier (VGA), and a black level clamp. The AD9943 offers 10-bit ADC resolution, while the AD9944 contains a true 12-bit ADC.

The internal registers are programmed through a 3-wire serial digital interface. Programmable features include gain adjustment, black level adjustment, input clock polarity, and power-down modes. The AD9943/AD9944 operate from a single 3 V power supply, typically dissipate 79 mW, and are packaged in space-saving 32-lead LFCSP packages.

CCDIN

AVDD

AVSS

AD9943/AD9944

CDS

REGISTERS

INTERFACE

FUNCTIONAL BLOCK DIAGRAM

REFT

REFB

BAND GAP

REFERENCE

6dB–40dB

VGA

10

CONTROL

DIGITAL

SDATASCKSL

Figure 1. Functional Block Diagram

10-/12-BIT

ADC

CLP

INTERNAL

TIMING

PBLK

10/12

DATACLKSHDSHP

DRVDD

DRVSS

DOUT

CLPOB

DVDD

DVSS

02905-B-001

Rev. B

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AD9943/AD9944

TABLE OF CONTENTS

AD9943/AD9944 Specifications..................................................... 3

Internal Register Map .................................................................... 13

General Specifications ................................................................. 3

Digital Specifications ................................................................... 3

AD9943 System Specifications ....................................................... 4

AD9944 System Specifications ....................................................... 5

Timing Specifications....................................................................... 6

Absolute Maximum Ratings............................................................ 7

Thermal Characteristics .............................................................. 7

ESD Caution.................................................................................. 7

AD9943 Pin Configuration and Function Descriptions............. 8

AD9944 Pin Configuration and Function Descriptions............. 9

Te r m in o l o g y .................................................................................... 10

Equivalent Input Circuits .............................................................. 11

Typical Performance Characteristics ...........................................12

REVISION HISTORY

Serial Interface................................................................................ 14

Circuit Description and Operation.............................................. 15

DC Restore .................................................................................. 15

Correlated Double Sampler ...................................................... 15

Optical Black Clamp .................................................................. 15

A/D Converter............................................................................ 16

Variable Gain Amplifier ............................................................ 16

CCD Mode Timing ........................................................................ 17

Applications Information.............................................................. 18

Internal Power-On Reset Circuitry.......................................... 19

Grounding and Decoupling Recommendations .................... 19

Outline Dimensions....................................................................... 20

Ordering Guide .......................................................................... 20

5/04—Data Sheet Changed from Rev. A to Rev. B

Updated Format..................................................................Universal

Updated Outline Dimensions....................................................... 20

Changes to Ordering Guide.......................................................... 20

5/03—Data Sheet changed from Rev. 0 to Rev. A

Added AD9944....................................................................Universal

Changes to Features Section............................................................ 1

Updated Ordering Guide................................................................. 5

Replaced TPC 3................................................................................. 9

Added Figure 12.............................................................................. 15

Updated Outline Dimensions....................................................... 16

Rev. B | Page 2 of 20

AD9943/AD9944

AD9943/AD9944 SPECIFICATIONS

GENERAL SPECIFICATIONS

T

to T

MIN

Table 1.

Parameter Min Typ Max Unit

TEMPERATURE RANGE

Operating −20 +85 °C Storage −65 +150 °C

POWER SUPPLY VOLTAGE

Analog, Digital, Digital Driver 2.7 3.6 V

POWER CONSUMPTION

Normal Operation 79 mW Power-Down Mode 150 µW

MAXIMUM CLOCK RATE 25 MHz

DIGITAL SPECIFICATIONS

DRVDD = DVDD = 2.7 V, CL = 20 pF, unless otherwise noted.

Table 2.

Parameter Symbol Min Typ Max Unit

LOGIC INPUTS

High Level Input Voltage V

Low Level Input Voltage V

High Level Input Current I

Low Level Input Current I

Input Capacitance C

LOGIC OUTPUTS

High Level Output Voltage, IOH = 2 mA V

Low Level Output Voltage, IOL = 2 mA V

, AVDD = DVDD = DRVDD = 3 V, f

MAX

= 25 MHz, unless otherwise noted.

SAMP

IH

IL

IH

IL

IN

2.1

10

0.6 V

V

µA

pF

OH

OL

2.2

0.5 V

V

Rev. B | Page 3 of 20

AD9943/AD9944

AD9943 SYSTEM SPECIFICATIONS

T

to T

MIN

Table 3.

Parameter Min Typ Max Unit Conditions

CDS

Maximum Input Range before Saturation1 1.0 V p-p Allowable CCD Reset Transient1 500 mV See input waveform in footnote. Maximum CCD Black Pixel Amplitude1 100 mV

VARIABLE GAIN AMPLIFIER (VGA)

Gain Control Resolution 1024 Steps Gain Monotonicity Guaranteed Gain Range

BLACK LEVEL CLAMP

Clamp Level Resolution 256 Steps Clamp Level Measured at ADC output.

A/D CONVERTER

Resolution 10 Bits Differential Nonlinearity (DNL) ±0.3 LSB No Missing Codes Guaranteed Data Output Coding Straight binary Full-Scale Input Voltage 2.0 V

VOLTAGE REFERENCE

Reference Top Voltage (REFT) 2.0 V Reference Bottom Voltage (REFB) 1.0 V

SYSTEM PERFORMANCE Specifications include entire signal chain.

Gain Range

Gain Accuracy ±1 dB Peak Nonlinearity 500 mV Input Signal 0.1 % 12 dB gain applied. Total Output Noise 0.3 LSB rms AC grounded input, 6 dB gain applied. Power Supply Rejection (PSR) 50 dB Measured with step change on supply.

1

Input signal characteristics defined as follows:

, AVDD = DVDD = DRVDD = 3 V, f

MAX

= 25 MHz, unless otherwise noted.

SAMP

Minimum Gain 5.3 dB See Figure 13 for VGA gain curve. Maximum Gain 40 41.5 dB

See Variable Gain Amplifier section for VGA

gain equation.

Minimum Clamp Level 0 LSB Maximum Clamp Level 63.75 LSB

Low Gain (VGA Code = 0) 5.3 dB Maximum Gain (VGA Code = 1023) 40 41.5 dB

500mV TYP

RESET TRANSIENT

OPTICAL BLACK PIXEL

100mV TYP

1V TYP

INPUT SIGNAL RANGE

02905-B-002

Rev. B | Page 4 of 20

AD9943/AD9944

AD9944 SYSTEM SPECIFICATIONS

T

to T

MIN

Table 4.

Parameter Min Typ Max Unit Conditions

CDS

Maximum Input Range before Saturation

Allowable CCD Reset Transient1 500 mV See input waveform in footnote. Maximum CCD Black Pixel Amplitude1 100 mV VARIABLE GAIN AMPLIFIER (VGA)

Gain Control Resolution 1024 Steps

Gain Monotonicity Guaranteed

Gain Range

Minimum Gain 5.3 dB See Figure 13 for VGA gain curve.

Maximum Gain 40 41.5 dB See Variable Gain Amplifier section for VGA

BLACK LEVEL CLAMP

Clamp Level Resolution 256 Steps

Clamp Level Measured at ADC output.

A/D CONVERTER

Resolution 12 Bits

Differential Nonlinearity (DNL) ±0.4 LSB

No Missing Codes Guaranteed

Data Output Coding Straight binary

Full-Scale Input Voltage 2.0 V VOLTAGE REFERENCE

Reference Top Voltage (REFT) 2.0 V

Reference Bottom Voltage (REFB) 1.0 V SYSTEM PERFORMANCE Specifications include entire signal chain.

Gain Range

Gain Accuracy ±1 dB

Peak Nonlinearity 500 mV Input Signal 0.1 % 12 dB gain applied.

Total Output Noise 0.9 LSB rms AC grounded input, 6 dB gain applied.

Power Supply Rejection (PSR) 50 dB Measured with step change on supply.

1

Input signal characteristics defined as follows:

, AVDD = DVDD = DRVDD = 3 V, f

MAX

1

= 25 MHz, unless otherwise noted.

SAMP

1.0 V p-p

Minimum Clamp Level 0 LSB Maximum Clamp Level 255 LSB

Low Gain (VGA Code = 0) 5.3 dB Maximum Gain (VGA Code = 1023) 40 41.5 dB

gain equation.

500mV TYP

RESET TRANSIENT

OPTICAL BLACK PIXEL

100mV TYP

1V TYP

INPUT SIGNAL RANGE

02905-B-002

Rev. B | Page 5 of 20

AD9943/AD9944

TIMING SPECIFICATIONS

CL = 20 pF, f

Table 5.

Parameter Symbol Min Typ Max Unit

SAMPLE CLOCKS

DATACLK, SHP, SHD Clock Period t DATACLK High/Low Pulse Width t SHP Pulse Width t SHD Pulse Width t CLPOB Pulse Width SHP Rising Edge to SHD Falling Edge t SHP Rising Edge to SHD Rising Edge t Internal Clock Delay t

DATA OUTPUTS

Output Delay t Pipeline Delay 9 Cycles

SERIAL INTERFACE

Maximum SCK Frequency f SL to SCK Setup Time t SCK to SL Hold Time t SDATA Valid to SCK Rising Edge Setup t SCK Falling Edge to SDATA Valid Hold t

1

Minimum CLPOB pulse width is for functional operation only. Wider typical pulses are recommended to achieve low noise clamp performance.

= 25 MHz. See CCD-mode timing in Figure 14 and Figure 15, and serial timing in Figure 10 and Figure 11.

SAMP

CONV

ADC

SHP

1

t

SHD

COB

S1

S2

ID

OD

SCLK

LS

LH

DS

DH

40 ns 16 20 ns 10 ns 10 ns 2 20 Pixels 10 ns 16 20 ns

3.0 ns

9.5 ns

10 MHz 10 ns 10 ns 10 ns 10 ns

Rev. B | Page 6 of 20