1 GSPS Direct Digital
FDBK_IN
DAC_OUT
AD9912
S1 TO S4
OUT
OUT_CMOS
FILTER
SYSTEM CLOCK
MULTIPLIER
SERIAL PORT,
I/O LOGIC
CLOCK
OUTPUT
DRIVERS
DIGITAL
INTERFACE
06763-001
DIRECT
DIGITAL
SYNTHESIS
CORE
STARTUP
CONFIGURATION
LOGIC
FEATURES
1 GSPS internal clock speed (up to 400 MHz output directly)
Integrated 1 GSPS 14-bit DAC
48-bit frequency tuning word with 4 µHz resolution
Differential HSTL comparator
Flexible system clock input accepts either crystal or external
reference clock
On-chip low noise PLL REFCLK multiplier
2 SpurKiller channels
Low jitter clock doubler for frequencies up to 750 MHz
Single-ended CMOS comparator; frequencies of <150 MHz
Programmable output divider for CMOS output
Serial I/O control
Excellent dynamic performance
Software controlled power-down
Available in two 64-lead LFCSP packages
Residual phase noise @ 250 MHz
10 Hz offset: −113 dBc/Hz
1 kHz offset: −133 dBc/Hz
100 kHz offset: −153 dBc/Hz
40 MHz offset: −161 dBc/Hz
Synthesizer with 14-Bit DAC
APPLICATIONS
Agile LO frequency synthesis
Low jitter, fine tune clock generation
Test and measurement equipment
Wireless base stations and controllers
Secure communications
Fast frequency hopping
GENERAL DESCRIPTION
The AD9912 is a direct digital synthesizer (DDS) that features
an integrated 14-bit digital-to-analog converter (DAC). The
AD9912 features a 48-bit frequency tuning word (FTW) that
can synthesize frequencies in step sizes no larger than 4 μHz.
Absolute frequency accuracy can be achieved by adjusting the
DAC system clock.
The AD9912 also features an integrated system clock phaselocked loop (PLL) that allows for system clock inputs as low
as 25 MHz.
The AD9912 operates over an industrial temperature range,
spanning −40°C to +85°C.
BASIC BLOCK DIAGRAM
Rev. D
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