ANALOG DEVICES AD9860, AD9862 Service Manual

AD9860 and AD9862

April 24, 2002

The World Leader in High-Performance Signal Processing Solutions

AD9860/2 MxFE

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AD9860/2 MxFE

AD9860/2 FEATURES

TM

for Broadband Communications

A Versatile Mixed Signal Front-End Processor with Dual

Converter Receive and Dual Converter Transmit Paths

Receive path includes Dual 10-/12-Bit, 64 MSPS

Sampling A/D Converters with Internal or External

Independent References, Input Buffers, Programmable

Gain Amplifier (PGA), Low-Pass Decimation Filters

and a Digital Hilbert Block

Transmit path includes Dual 12-/14-bit, 128 MSPS

D/A Converters with Programmable Full Scale Output

Current, Channel independent Fine Gain and Offset

Control, Digital Hilbert and Interpolation Filters, Digital

Tunable Real or Complex Up-Converters

Internal Clock Distribution Block including a Delay-Locked

Loop based clock multiplier and Timing Generation

circuitry allow for single crystal or reference clock operation

Programmable Output Clocks, SPI compliant port, two

VIN+ A

VIN- B

VIN+ B

VIN- B

SIG DELTA

AUX_DAC_A

AUX_DAC_B

AUX_DAC_C

AUX_ADC_A

AUX_ADC_B

AUX_ADC_C

AUX_ADC_D

IOUT+ A

IOUT- A

IOUT+ B

IOUT- B

1X

AUX DAC

PGA

AUX ADC

DAC

ADC

SPI

REGISTERS

DIGITAL

PROCESSING

(BYPASSABLE)

HILBERT FILTER

MODULATION

DIGITAL

PROCESSING

(BYPASSABLE)

DECIMATION

HILBERT FILTER

DISTRIBUTION

+

CLOCK

LATCH

&

DEMUX

DATA

MUX

&

LATCH

DLL

RX DATA [0:

SERIAL PORT

OSC 1

OSC 2

CLKOUT1

CLKOUT2

TX DATA [0:1

Programmable Sigma Delta Outputs, four Auxiliary Analog

outputs and four Auxiliary ADC inputs

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AD9860/62 Dual Channel Mixed Signal

Front End (

Targeted at Broadband Wireless and other High Performance

Broadband Modem Applications

 Dual 10/12-bit 64 MSPS ADC and Dual 12/14-bit 128MSPS DAC with 1X, 2X or 4X

Interpolation Integrated on a single IC

 Tx Signal Path accepts and processes real or I&Q signals

 Digital Hilbert filter facilitates an image rejection architecture when only

real data is available

 Fs/4 and Fs/8 Digital Real or Complex Modulator  Fine Complex Modulator with a 24 bit controlled Numerically Controlled Oscillator

 Supports Transmit LO suppression techniques with Independent Offset Control

and Single Sideband (SSB) architectures using Independent Fine Gain Control to compensate for System offsets

MxFE))

MxFE

 Rx Signal Path supports diversity or I&Q demodulation applications

 Digital Decimation Filter can improve receive path performance  Hilbert Filter supports Receive Image Reject Architecture

 Versatile Clock Interface, Low Phase Noise Internal DLL Clock Multiplier  Programmable registers accessed via SPI compliant Port

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AD9862: Broadband Wireless Access Modem App.

Antenna

Customer Premise Station

Linear Circuitry

2.5 - 2.68 GHz (MMDS)

3.5 GHz (Europe)

5.25 – 5.8 GHz (UNII)

RF / IF

up- / down converts

Baseband Signal

to / from RF frequencies

426 MHz

330 MHz

6-15 MHz BW

AD9862 Mixed Signal

Front End

ADCs, DACs

Signal Conditioning

MxFE

ADC

DAC

70 MBit/s max.

@15MHz BW

PLL

6 MBit/s max.

@15MHz BW

Modulator

Tone Mapper

QAM

OFDM

WCDMA

Digital Modem

Beam Former / Equalizer

Filter

Gain

Control

Filter

FFT

Timing

Recovery

IFFT

Complexity to handle high

channel at very high CNR:

complicated equalizer,

PHY

OFDM

QAM-

Decoder

OFDM

QAM-

Coder

Diversity Receive

frequency wireless

“beamforming”

Correction

Forward

Correction

Error

MAC

RISC-

Processor

MAC

Hardware

Ethernet

10 MBit/s

Media Access Control

Channel Sharing

Address Filtering

Security

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