ANALOG DEVICES AD9389B Service Manual

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A

T

High Performance

Preliminary Technical Data

FEATURES

General

Digital video

Digital audio

Special features for easy system design

APPLICATIONS

DVD players and recorders
Digital set-top boxes
A/V receivers
Digital cameras and camcorders
HDMI repeater/splitter

GENERAL DESCRIPTION

The AD9389B is a 165 MHz, high definition multimedia inter­face (HDMI) v. 1.3 transmitter. It supports HDTV formats up to
1080p, and computer graphic resolutions up to UXGA (1600 ×
1200 @ 60 Hz). With the inclusion of HDCP, the AD9389B allows
the secure transmission of protected content as specified by the
HDCP v. 1.2 protocol.

™

HDMI

/DVI transmitter compatible with HDMI v. 1.3,
DVI v. 1.0, and HDCP v. 1.2
Internal key storage for HDCP
Single 1.8 V power supply
Video/audio inputs accept logic levels from 1.8 V to 3.3 V
80-lead LQFP, Pb-free package
64-lead LFCSP, Pb-free package

165 MHz operation supports all resolutions from 480i to

1080p and UXGA at 60 Hz
Programmable two-way color space converter
Supports RGB, YCbCr, and DDR
Supports ITU656-based embedded syncs
Automatic input video format timing detection (CEA-861B)

Supports standard S/PDIF for stereo LPCM or compressed

audio up to 192 kHz
8-channel, uncompressed, LPCM I

On-chip MPU with I

2

C® master to perform HDCP

2

S audio up to 192 kHz

operations and EDID reading operations
5 V tolerant I

2

C and HPD I/Os, no extra device needed

No audio master clock needed for supporting

S/PDIF and I

2

S

On-chip MPU reports HDMI events through interrupts and

registers

HDMI/DVI Transmitter

AD9389B

FUNCTIONAL BLOCK DIAGRAM

INTERRUPT

HANDLER

HDCP-EDID

MICRO-

CONTROLLER

MASTER

XOR

MASK

AD9389B

IN

I2C

HDMI

Tx

CORE

HPD

DDCSDA
DDCSCL

Tx0–/Tx0+

Tx1–/Tx1+

Tx2–/Tx2+

TxC–/TxC+

2

S audio.

SD

CLK
VSYNC
HSYNC

DE

D[23:0]

S/PDIF

MCLK
I2S[3:0]
LRCLK

SCLK

SCL

I2C

SLAVE

REGISTER

CONFIGURATION

LOGIC

VIDEO

DATA

CAPTURE

AUDIO

DATA

CAPTURE

COLOR
SPACE

CONVER-

SION

4:2:2 TO

4:4:4

CONVER-

SION

MDAMCL

HDCP
CORE

Figure 1.

The AD9389B supports both S/PDIF and 8-channel I

2

Its high fidelity, 8-channel I

S can transmit either stereo or 7.1
surround audio at 192 kHz. The S/PDIF can carry stereo LPCM
audio or compressed audio, including DTS®, THX®, and Dolby®
Digital.

The AD9389B helps reduce system design complexity and cost
by incorporating such features as an internal MPU for HDCP
operations, an I
supply, and 5 V tolerance on the I

2

C master for EDID reading, a single 1.8 V power

2

C and hot plug detect pins.

Fabricated in an advanced CMOS process, the AD9389B is
available in a space-saving, 64-lead LFCSP surface-mount
package, and an 80-lead LQFP surface-mount package. All
packages are available as Pb-free and are specified from −25°C
to +85°C.

06555-001

Rev. PrA

Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Anal og Devices for its use, nor for any infringements of patents or ot her
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: [phone] www.analog.com
Fax: [phone] ©2007 Analog Devices, Inc. All rights reserved.

AD9389B Preliminary Technical Data

TABLE OF CONTENTS

Features .............................................................................................. 1

Design Resources ..........................................................................9

Applications....................................................................................... 1

General Description......................................................................... 1

Functional Block Diagram .............................................................. 1

Specifications..................................................................................... 3

Absolute Maximum Ratings............................................................ 5

Explanation of Test Levels........................................................... 5

ESD Caution.................................................................................. 5

Pin Configuration and Function Descriptions............................. 6

Applications....................................................................................... 9

Document Conventions ...............................................................9

PCB Layout Recommendations.................................................... 10

Power Supply Bypassing ............................................................ 10

Digital Inputs .............................................................................. 10

External Swing Resistor............................................................. 10

Output Signals ............................................................................ 10

Outline Dimensions ....................................................................... 11

Ordering Guide .......................................................................... 12

Rev. PrA | Page 2 of 12

Preliminary Technical Data AD9389B

SPECIFICATIONS

Table 1.

Te st

Parameter Conditions Temp

DIGITAL INPUTS

Input Voltage, High (VIH) Full VI 1.4 3.5 V
Input Voltage, Low (VIL) Full VI 0.7 V
Input Capacitance 25°C V 3 pF

DIGITAL OUTPUTS

Output Voltage, High (VOH) Full VI VDD − 0.1 V
Output Voltage, Low (VOL) Full VI 0.4 V

THERMAL CHARACTERISTICS

Thermal Resistance

θJC Junction-to-Case V 15.2 °C/W
θJA Junction-to-Ambient V 59 °C/W

Ambient Temperature Full V −25 +25 +85 °C

DC SPECIFICATIONS

Input Leakage Current, I

IL

25°C VI −10 +10 μA
Input Clamp Voltage −16 mA 25°C V −0.8 V
+16 mA 25°C V +0.8 V
Differential High Level Output

V AV
Voltage

Differential Output Short-Circuit

IV 10 μA
Current

POWER SUPPLY

VDD (All) Supply Voltage Full IV 1.71 1.8 1.89 V
VDD Supply Voltage Noise Full V 50 mV p-p
Power-Down Current

With active video applied, 165 MHz, typical

25°C IV 9 mA

random pattern
I

AVDD

2

With active video applied, 165 MHz, typical

25°C IV TBD

random pattern

2

I

PVDD

With active video applied, 165 MHz, typical

25°C IV TBD

random pattern

2

I

DVDD

With active video applied, 165 MHz, typical

25°C IV TBD

random pattern
Transmitter Supply Current

2

With active video applied, 165 MHz, typical

25°C IV TBD mA

random pattern
Transmitter Total Power Full VI TBD mW

AC SPECIFICATIONS

CLK Frequency 25°C IV 13.5 80 MHz
TMDS Output CLK Duty Cycle 25°C IV 48 52 %
Worst Case CLK Input Jitter Full IV 2 ns
Input Data Setup Time Full IV 1 ns
Input Data Hold Time Full IV 1 ns
TMDS Differential Swing VI 800 1000 1200 mV
V

SYNC

and H

Delay from DE

SYNC

VI 1 UI
Falling Edge

V

SYNC

and H

Delay to DE

SYNC

VI 1 UI
Rising Edge

DE High Time 25°C VI 8191 UI
DE Low Time 25°C VI 138 UI
Differential Output Swing

Low-to-High Transition Time 25°C VII 75 490 ps
High-to-Low Transition Time 25°C VII 75 490 ps

Level

1

Min Typ Max Unit

V

CC

3

Rev. PrA | Page 3 of 12

AD9389B Preliminary Technical Data

Te st

Parameter Conditions Temp

AUDIO AC TIMING

Sample Rate I2S and S/PDIF Full IV 32 192 kHz
I2S Cycle Time 25°C IV 1 UI
I2S Setup Time 25°C IV 15 ns
I2S Hold Time 25°C IV 0 ns
Audio Pipeline Delay 25°C IV 75 μs

1

See Explanation of Test Levels section.

2

Using low output drive strength.

3

UI = unit interval.

Level

1

Min Typ Max Unit

Rev. PrA | Page 4 of 12