ANALOG DEVICES AD9387NK Service Manual

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A
High Performance, Low Power
Preliminary Technical Data
FEATURES
General
Low power HDMI/DVI transmitter ideal for portable
applications Compatible with HDMI v. 1.3, DVI v. 1.0, and HDCP v. 1.2 Single 1.8 V power supply Video/audio inputs accept logic levels from 1.8 V to 3.3 V 64-lead LFCSP, Pb-free package 76-ball CSP_BGA, Pb-free package
Digital video
80 MHz operation supports all resolutions from 480i to
1080i and XGA at 75 Hz Programmable 2-way color space converter Supports RGB, YCbCr, and DDR Supports ITU656-based embedded syncs Automatic input video format timing detection (CEA-861D)
Digital audio
Supports standard S/PDIF for stereo LPCM or compressed
audio up to 192 kHz 8-channel, uncompressed LPCM I
Special features for easy system design
On-chip MPU with I
2
C® master to perform HDCP
operations and EDID reading operations 5 V tolerant I
2
C and HPD I/Os, no extra device needed
No audio master clock needed for supporting S/PDIF
2
and I
S
On-chip MPU reports HDMI events through interrupts and
registers
2
S audio up to 192 kHz
CLK VSYNC HSYNC
DE
D[23:0]
S/PDIF
MCLK I2S[3:0] LRCLK
SCLK
HDMI™/DVI Transmitter
AD9387NK
FUNCTIONAL BLOCK DIAGRAM
SD
SCL
I2C
SLAVE
REGISTER
CONFIGURATION
LOGIC
VIDEO
DATA
CAPTURE
AUDIO
DATA
CAPTURE
COLOR SPACE
CONVER-
SION
4:2:2 TO
4:4:4
CONVER-
SION
Figure 1.
MDAMCL
HDCP CORE
INT
INTERRUPT
HANDLER
HDCP-EDID
MICRO-
CONTROLLER
I2C
MASTER
XOR
MASK
AD9387NK
HDMI
Tx
CORE
HPD
DDCSDA DDCSCL
Tx0[1:0]
Tx1[1:0]
Tx2[1:0]
TxC[1:0]
06507-001
APPLICATIONS
Digital video cameras Digital still cameras Personal media players Cellular handsets DVD players and recorders Digital set-top boxes A/V receivers HDMI repeater/splitter
GENERAL DESCRIPTION
The AD9387NK is an 80 MHz, high definition multimedia interface (HDMI) v.1.3 transmitter. It supports HDTV formats up to 720p and 1080i and computer graphic resolutions up to XGA (1024 × 768 @ 75Hz). With the inclusion of HDCP, the AD9387NK allows the secure transmission of protected content, as specified by the HDCP v.1.1 protocol.
Rev. PrA
Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Anal og Devices for its use, nor for any infringements of patents or ot her rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners.
The AD9387NK supports both S/PDIF and 8-channel I2S audio.
2
Its high fidelity, 8-channel I
S can transmit either stereo or 7.1 surround audio at 192 kHz. The S/PDIF can carry stereo LPCM audio or compressed audio, including Dolby® Digital, DTS®, and THX®.
The AD9387NK helps reduce system design complexity and cost by incorporating such features as an internal MPU for HDCP operations, an I supply, and 5 V tolerance on the I
2
C master for EDID reading, a single 1.8 V power
2
C and hot plug detect pins.
Fabricated in an advanced CMOS process, the AD9387NK is available in a space saving, 76-ball CSP_BGA or 64-lead LFCSP surface-mount package. Both packages are available as Pb-free parts and are specified from −25°C to +85°C.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.461.3113 ©2006 Analog Devices, Inc. All rights reserved.
AD9387NK Preliminary Technical Data
TABLE OF CONTENTS
Features .............................................................................................. 1
Design Resources ..........................................................................7
Applications....................................................................................... 1
General Description......................................................................... 1
Functional Block Diagram .............................................................. 1
Specifications..................................................................................... 3
Absolute Maximum Ratings............................................................ 4
Explanation of Test Levels........................................................... 4
ESD Caution.................................................................................. 4
Pin Configuration and Function Descriptions............................. 5
Applications Information ................................................................ 7
Document Conventions ...............................................................7
PCB Layout Recommendations.......................................................8
Power Supply Bypassing ...............................................................8
Digital Inputs .................................................................................8
External Swing Resistor................................................................8
Output Signals ...............................................................................8
Outline Dimensions ..........................................................................9
Ordering Guide .............................................................................9
Rev. PrA | Page 2 of 12
Preliminary Technical Data AD9387NK
SPECIFICATIONS
Table 1.
AD9387NK-BCPZ-80/AD9387NK-BBCZ-80
Parameter Conditions
Temp Test Leve l
1
Min Typ Max Unit
DIGITAL INPUTS
Input Voltage, High (VIH) Full VI 1.4 3.5 V Input Voltage, Low (VIL) Full VI 0.7 V Input Capacitance 25°C V 3 pF
DIGITAL OUTPUTS
Output Voltage, High (VOH) Full VI VDD − 0.1 V Output Voltage, Low (VOL) Full VI 0.4 V
THERMAL CHARACTERISTICS
Thermal Resistance
θJC Junction-to-Case V 15.2 °C/W θJA Junction-to-Ambient V 59 °C/W
Ambient Temperature Full V −25 +25 +85 °C
DC SPECIFICATIONS
Input Leakage Current (IIL) 25°C VI −10 +10 A Input Clamp Voltage −16 mA 25°C V −0.8 V +16 mA 25°C V +0.8 V Differential High Level Output Voltage V AVCC V Differential Output Short-Circuit Current IV 10 µA
POWER SUPPLY
VDD (All) Supply Voltage Full IV 1.71 1.8 1.89 V VDD Supply Voltage Noise Full V 50 mV p-p Power-Down Current 25°C IV 10 µA Transmitter Supply Current
2
25°C IV 55 mA
Transmitter Total Power Full VI 100 mW
AC SPECIFICATIONS
CLK Frequency 25°C IV 13.5 80 MHz TMDS Output CLK Duty Cycle 25°C IV 48 52 % Worst Case CLK Input Jitter Full IV 2 ns Input Data Setup Time Full IV 1 ns Input Data Hold Time Full IV 1 ns TMDS Differential Swing VI 800 1000 1200 mV VSYNC and HSYNC Delay from DE Falling Edge VI 1 UI VSYNC and HSYNC Delay to DE Rising Edge VI 1 UI DE High Time 25°C VI 8191 UI DE Low Time 25°C VI 138 UI
3
3
3
3
Differential Output Swing
Low-to-High Transition Time 25°C VII 75 490 Ps High-to-Low Transition Time 25°C VII 75 490 Ps
AUDIO AC TIMING
Sample Rate I2S and S/PDIF Full IV 32 192 kHz I2S Cycle Time 25°C IV 1 UI
3
I2S Setup Time 25°C IV 15 ns I2S Hold Time 25°C IV 0 ns Audio Pipeline Delay 25°C IV 75 µs
1
See the Explanation of Test Levels section.
2
Using low output drive strength.
3
UI = unit interval.
Rev. PrA | Page 3 of 12
AD9387NK Preliminary Technical Data
ABSOLUTE MAXIMUM RATINGS
Table 2.
Parameter Rating
Digital Inputs 5 V to 0.0 V Digital Output Current 20 mA Operating Temperature Range −40°C to +85°C Storage Temperature Range −65°C to +150°C Maximum Junction Temperature 150°C Maximum Case Temperature 150°C
Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
EXPLANATION OF TEST LEVELS
I. 100% production tested.
II. 100% production tested at 25°C and sample tested at
specified temperatures.
III. Sample tested only.
IV. Parameter is guaranteed by design and characterization
testing.
V. Parameter is a typical value only.
VI. 100% production tested at 25°C; guaranteed by design
and characterization testing.
VII. Limits defined by HDMI specification; guaranteed by
design and characterization testing.
ESD CAUTION
Rev. PrA | Page 4 of 12
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