Datasheet AD8665, AD8666, AD8668 Datasheet (ANALOG DEVICES)

16 V, 4 MHz Rail-to-Rail

O

www.BDTIC.com/ADI

FEATURES

Offset voltage: 2.5 mV max
Low input bias current: 1 pA max
Single-supply operation: 5 V to 16 V
Dual-supply operation: ±2.5 V to ±8 V
Low noise: 8 nV/√Hz @ 10 kHz
Wide bandwidth: 4 MHz
Rail-to-rail output
Unity-gain stable
Lead-free packaging

APPLICATIONS

Sensor amplification
Reference buffers
Medical equipment
Physiological measurements
Signal filters and conditioning
Consumer audio
Photodiode amplification
ADC driver
Level shifting circuits

GENERAL DESCRIPTION

The AD866x family are single supply, rail-to-rail output
amplifiers with low noise performance featuring an extended
operating range with supply voltages up to 16 V. They also
feature low input bias currents, wide signal bandwidth, and low
input voltage and current noise. For lower offset voltage, choose
the

AD8661/AD8662/AD8664 family.

The combination of low offsets, very low input bias currents,

nd wide supply range make these amplifiers useful in a wide

a
variety of cost sensitive applications normally associated with
much higher priced JFET amplifiers. Systems using high
impedance sensors, such as photo diodes, benefit from the
combination of low input bias current, low noise, and low offset
and bandwidth. The wide operating voltage range matches high
performance ADCs and DACs. Audio applications and medical
monitoring equipment can take advantage of the high input
impedance, low voltage and current noise, wide bandwidth, and
the lack of popcorn noise found in many other low input bias
current amplifiers.

The AD866x family is specified over the extended industrial
t

emperature range (−40°C to +125°C).

Output Amplifiers

AD8665/AD8666/AD8668

PIN CONFIGURATIONS

1

OUT

V–

+IN

AD8665

TOP VIEW

2

(Not to Scale)

3

Figure 1. AD8665, 5-Lead SOT-23 (RJ-5)

NC

1

AD8665

2

–IN

+IN

3

TOP VIEW

(Not to Scale)

VEE

4

NC = NO CONNECT

Figure 2. AD8665, 8-Lead SOIC_N (R-8)

OUT A

1

AD8666

2

–IN A

+IN A

3

TOP VIEW

(Not to Scale)

V–

4

Figure 3. AD8666, 8-Lead SOIC_N (R-8)

1

UT A

2

–IN A

+IN A

V–

AD8666

3

TOP VIEW

(Not to Scale)

4

Figure 4. AD8666, 8-Lead MSOP (RM-8)

1

OUT A

2

IN A

3

+IN A

V+

+IN B

–IN B

OUT B

AD8668

TOP VIEW

4

(Not to Scale)

5

6

7

Figure 5. AD8668, 14-Lead TSSOP (RU-14)

1

OUT A

OUT A

2

–IN A

3

+IN A

+INB +INC

–IN B

OUT B

V+

AD8648

AD8668

AD8648

AD8668

4

TOP VIEW

TOP VIEW

TOP VIEW

TOP VIEW

(Not to Scale)

(Not to Scale)

(Not to Scale)

(Not to Scale)

5

6

7

Figure 6. AD8668, 14-Lead SOIC_N (R-14)

5

4

14

13

12

11

10

8

7

6

5

8

7

6

5

8

7

6

5

14

13

12

11

10

9

8

9

8

V+

–IN

NC

VCC

OUT

NC

V+

OUT B

–IN B

+IN B

V+

OUT B

–IN B

+IN B

OUT D

–IN D

+IN D

V–

+IN C

–IN C

OUT C

OUT D

–IN D

+IN D

V–

–IN C

OUT C

06195-039

6195-040

06018-001

06195-002

06195-003

06195-004

Rev. A

Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Anal og Devices for its use, nor for any infringements of patents or ot her
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: [phone] www.analog.com
Fax: [phone] ©2006 Analog Devices, Inc. All rights reserved.

AD8665/AD8666/AD8668

www.BDTIC.com/ADI

TABLE OF CONTENTS

Features .............................................................................................. 1

Absolute Maximum Ratings ............................................................5

Applications....................................................................................... 1

General Description......................................................................... 1

Pin Configurations ........................................................................... 1

Revision History ............................................................................... 2

Specifications..................................................................................... 3

REVISION HISTORY

10/06—Rev. 0 to Rev. A

Added AD8665 ...................................................................Universal

Added New Figure 1 and Figure 2,
Re

numbered Sequentially................................................................ 1

Changes to Table 4............................................................................ 5

Changes to Figure 8, Figure 9, and Figure 11 ............................... 6

Change to Figure 40 ....................................................................... 11

Updated Outline Dimensions....................................................... 12

Changes to Ordering Guide.......................................................... 13

4/06—Rev 0: Initial Version

Thermal Resistance .......................................................................5

ESD Caution...................................................................................5

Typical Perf or m an c e Charac t e r istics ..............................................6

Outline Dimensions ....................................................................... 12

Ordering Guide .......................................................................... 13

Rev. A | Page 2 of 16

AD8665/AD8666/AD8668

www.BDTIC.com/ADI

SPECIFICATIONS

VDD = 5.0 V, VCM = VDD/2, TA = 25oC, unless otherwise noted.

Table 1.

Parameter Symbol Conditions Min Typ Max Unit

INPUT CHARACTERISTICS

Offset Voltage V
V

−40°C < TA < +125°C 5.0 mV
Offset Voltage Drift ΔVOS/ΔT −40°C < TA < +125°C 3.0 10 μV/°C
Input Bias Current I

−40°C < TA < +125°C 550 pA
Input Offset Current I

−40°C < TA < +125°C 70 pA
Input Voltage Range V
Common-Mode Rejection Ratio CMRR VCM = −0.1 V to +3.0 V 84 100 dB

−40°C < TA < +125°C 79 dB
Large-Signal Voltage Gain A

OUTPUT CHARACTERISTICS

Output Voltage High V

−40°C < TA < +125°C 4.86 V
Output Voltage Low V

−40°C < TA < +125°C 105 mV
Short-Circuit Output Current I
Closed-Loop Output Impedance Z

POWER SUPPLY

Power Supply Rejection Ratio PSRR VDD = 5.0 V to 16 V 98 115 dB

−40°C < TA < +125°C 94 dB
Supply Current per Amplifier I

−40°C < TA < +125°C 2.0 mA
DYNAMIC PERFORMANCE

Slew Rate SR RL = 2 kΩ 3.5 V/μs
Gain Bandwidth Product GBP 4 MHz
Phase Margin Φ

NOISE PERFORMANCE

Peak-to-Peak Noise en p-p 0.1 Hz to 10 Hz 2.4 μV p-p
Voltage Noise Density e
f = 10 kHz 8 nV/√Hz
Channel Separation CS f = 10 kHz −115 dB

OS

B

OS

CM

VO

OH

OL

SC

OUT

SY

M

n

VCM = 2.5 V 0.7 2.5 mV

= −0.1 V to +3.0 V 3.0 mV

CM

0.2 1 pA

0.1 0.5 pA

−0.1 +3.0 V

RL = 2 kΩ, VO = 0.5 V to 4.5 V 68 145 V/mV

I

= 1 mA 4.88 4.93 V

OUT

I

= 1 mA 50 85 mV

OUT

±19 mA
At 1 MHz, AV = 1 50 Ω

1.1 1.4 mA

70 Degrees

f = 1 kHz 10 nV/√Hz

Rev. A | Page 3 of 16

AD8665/AD8666/AD8668

www.BDTIC.com/ADI

VDD = 16 V, VCM = VDD/2, TA = 25oC, unless otherwise noted.

Table 2.

Parameter Symbol Conditions Min Typ Max Unit

INPUT CHARACTERISTICS

Offset Voltage V

OS

V

−40°C < TA < +125°C 5.0 mV
Offset Voltage Drift ΔVOS/ΔT −40°C < TA < +125°C 3.0 10 μV/°C
Input Bias Current I

B

−40°C < TA < +125°C 550 pA

Input Offset Current I

OS

−40°C < TA < +125°C 70 pA
Input Voltage Range V

CM

Common-Mode Rejection Ratio CMRR VCM = −0.1 V to +14.0 V 90 110 dB

−40°C < TA < +125°C 80 dB
Large-Signal Voltage Gain A

VO

OUTPUT CHARACTERISTICS

Output Voltage High V

OH

−40°C < TA < +125°C 15.90 V
Output Voltage Low V

OL

−40°C < TA < +125°C 50 mV
Short-Circuit Output Current I
Closed-Loop Output Impedance Z

SC

OUT

POWER SUPPLY

Power Supply Rejection Ratio PSRR VDD = 5.0 V to 16 V 98 115 dB

−40°C < TA < +125°C 94 dB
Supply Current per Amplifier I

SY

−40°C < TA < +125°C 2.0 mA

DYNAMIC PERFORMANCE

Slew Rate SR RL = 2 kΩ 3.5 V/μs
Gain Bandwidth Product GBP 4 MHz
Phase Margin Φ

M

NOISE PERFORMANCE

Peak-to-Peak Noise en p-p 0.1 Hz to 10 Hz 2.5 μV p-p
Voltage Noise Density e

n

f = 10 kHz 8 nV/√Hz
Channel Separation CS f = 10 kHz −115 dB

VCM = 8 V 0.6 2.5 mV

= −0.1 V to +14.0 V 3.0 mV

CM

0.2 1 pA

0.1 0.5 pA

−0.1 +14.0 V

RL = 2 kΩ, VO = 0.5 V to 15.5 V 130 255 V/mV

I

= 1 mA 15.94 15.96 V

OUT

I

= 1 mA 22 40 mV

OUT

±140 mA
At 1 MHz, AV = 1 50 Ω

1.15 1.55 mA

73 Degrees

f = 1 kHz 10 nV/√Hz

Rev. A | Page 4 of 16

AD8665/AD8666/AD8668

www.BDTIC.com/ADI

ABSOLUTE MAXIMUM RATINGS

Table 3.

Parameter Rating

Supply Voltage 18 V
Input Voltage GND to V
Differential Input Voltage ±18 V
Output Short-Circuit to GND Indefinite
Storage Temperature Range −65°C to +150°C
Operating Temperature Range −40°C to +125°C
Lead Temperature (Soldering, 60 sec) 300°C
Junction Temperature 150°C

Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.

DD

THERMAL RESISTANCE

Table 4. Thermal Resistance

Package Type θ

5-Lead SOT-23 (RJ-5) 240 92 °C/W
8-Lead SOIC_N (R-8) 158 43 °C/W
8-Lead MSOP (RM-8) 210 45 °C/W
14-Lead SOIC (R-14) 120 36 °C/W
14-Lead TSSOP (RU-14) 180 35 °C/W

JA

θ

JC

Unit

ESD CAUTION

Rev. A | Page 5 of 16

AD8665/AD8666/AD8668

www.BDTIC.com/ADI

TYPICAL PERFORMANCE CHARACTERISTICS

100

VDD = 16V
V

= 8V

90

CM

T

= 25°C

A

80

600 AMPLIFIERS

70

60

50

40

30

NUMBER OF AMPLIFIERS

20

10

0

–3 3

–2 –1 0 1 2

INPUT OFFSET VOLTAGE (mV)

Figure 7. Input Offset Voltage Distribution

06195-005

300

VS = 5V AND 16V

250

200

150

100

INPUT BIAS CURRENT (pA)

50

0

–40

TEMPERATURE (° C)

Figure 10. Input Bias Current vs. Temperature

1201008040 60200–20

06195-008

20

18

16

14

12

10

8

6

NUMBER OF AMPLIFIERS

4

2

0

01

1234567891011

TCV

OS

Figure 8. V

5

VDD = 16V
T

4

= 25°C

A

3

2

1

0

–1

–2

INPUT OFFSET VOLTAGE ( mV)

–3

–4

–5

–1 15

01234567891011121314

Drift (TCVOS) Distribution

OS

INPUT COMMON-MODE VOLTAGE (V)

(µV/°C)

VDD = 16V
V

= 8V

CM

–40°C < T
300 AMPLIF IERS

< +125°C

A

2

06195-006

6195-007

Figure 9. Offset Voltage vs. Common-Mode Voltage

10000

VDD = 16V
T

= 25°C

A

1000

0

10

10

1

OUTPUT SATURATION VOLTAGE (mV)

0.1

0.001 100

0.01 0. 1 1 10

Figure 11. Output Saturation Voltage vs. Load Current

100

VDD = 16V
I

= 1mA

OUT

80

60

40

20

OUTPUT SATURATION VOLTAGE (mV)

0

–40 120

–20 0 20 40 60 80 100

Figure 12. Output Saturation Voltage vs. Temperature

V

DD

SOURCING

LOAD CURRENT (mA)

VDD TO V
SOURCING

V

OL

SINKING

TEMPERATURE (° C)

TO V

OH

OH

V
SINKING

OL

6195-009

6195-010

Rev. A | Page 6 of 16

AD8665/AD8666/AD8668

www.BDTIC.com/ADI

100

VDD = 16V
T

= 25°C

A

80

= 2kΩ
= 10pF

0

45

80

60

VDD = 16V
R

L

C

L

40

20

OPEN-LOOP GAIN (dB)

0

–20

1k 10M

10k 100k 1M

PHASE

GAIN

FREQUENCY (Hz)

ФM = 73°

Figure 13. Open-Loop Gain and Phase vs. Frequency

1000

VDD = 16V

100

10

(Ω)

OUT

Z

0.1

AV = +100

AV = +10

1

AV = +1

90

135

180

225

60

PSRR (dB)

40

OPEN-LOOP PHASE SHIF T (Degrees)

06195-011

20

0

1k 4M

Figure 16. Power Supply Rejecti

100

10

VOLTAGE NOISE DENSITY (nV/√Hz)

10k 100k 1M

FREQUENCY (Hz)

on Ratio vs. Frequency

PSRR–

PSRR+

VDD = 5V TO 16V
T

= 25°C

A

6195-014

0.01
100 10M

Figure 14. Closed-Loop Outpu

120

100

80

60

CMRR (dB)

40

20

0

1k 4M

Figure 15. Common-Mode Rejectio

1k 10k 100k 1M

FREQUENCY (Hz)

t Impedance vs. Frequency

10k 100k 1M

FREQUENCY (Hz)

n Ratio vs. Frequency

VDD = 16V
T

= 25°C

A

1

10 10k

06195-012

100 1k

FREQUENCY (Hz)

6195-015

Figure 17. Voltage Noise Density vs. Frequency

VDD = 5V TO 16V

= 25°C

T

A

VOLTAGE (1µV/DIV)

TIME (1s/DIV)

06195-013

06195-016

Figure 18. 0.1 Hz to 10 Hz Voltage Noise

Rev. A | Page 7 of 16

AD8665/AD8666/AD8668

V

www.BDTIC.com/ADI

(20mV/DIV)

OUT

V

VDD = 16V

= 10kΩ

R

L

= 10pF

C

L

= +1

A

V

–100mV

0V

V

IN

8V

V

OUT

0V

VDD = ±8V

= –100

A

V

TIME (0.5µs/DIV)

06195-017

TIME (5µs/DIV)

06195-020

Figure 19. Small-Signal Transient Response Figure 22. Positive Overload Recovery Time

10

8

6

4

2

(V)

0

OUT

V

–2

–4

–6

–8

–10

TIME (2µs/DIV)

Figure 20. Large-Signal Transient Response

70

VDD = 16V
V

= 100mV p-p

IN

60

50

40

30

OVERSHOOT (%)

20

+OS

VDD =±8V
R

= 10kΩ

L

C

= 10pF

L

A

= +1

V

–OS

100m

V

IN

0V

0V

V

OUT

–8V

06195-018

TIME (5µs/DIV)

Figure 23. Negative Overload Recovery Time

80

VDD = 5V
V

= 2.5V

CM

70

T

= 25°C

A

550 AMPLIFIERS

60

50

40

30

NUMBER OF AMPL IFIERS

20

VDD = ±8V

= –100

A

V

06195-021

10

0

1 1000

10 100

LOAD CAPACITANCE ( pF)

Figure 21. Small-Signal Overshoot vs. Load Capacitance

06195-019

10

0

–3 3

–2 –1 0 1 2

INPUT OFFSET VOLTAGE (mV)

Figure 24. Input Offset Voltage Distribution

Rev. A | Page 8 of 16

06195-022

AD8665/AD8666/AD8668

www.BDTIC.com/ADI

30

25

20

VDD = 5V

= 2.5V

V

CM

–40°C ≤ T
300 AMPLIF IERS

≤ +125°C

A

120

100

80

VDD = 5V

= 1mA

I

LOAD

VDD TO V
SOURCING

OH

15

10

NUMBER OF AMPLIFIERS

5

0

01

123456789

(µV/°C)

TCV

OS

Figure 25. V Drift (TCV ) Distribution

5

4

3

2

1

0

–1

–2

INPUT OFFSET VOLTAGE ( mV)

–3

–4

–5

–0.5 3.5

0 0.5 1.0 1.5 2.0 2.5 3.0

OS OS

INPUT COMMON-MODE VOLTAGE (V)

VDD = 5V
T

0

06195-023

=25°C

A

06195-024

Figure 26. Offset Voltage vs. Common-Mode Voltage

60

40

20

OUTPUT SATURATION VOLTAGE (mV)

0

–40 120

–20 0 20 40 60 80 100

Figure 28. Output Saturation Voltage vs. Temperature

80

60

40

20

OPEN-LOOP GAIN (dB)

0

–20

1k 10M

10k 100k 1M

Figure 29. Open-Loop Gain and Phase vs. Frequency

TEMPERATURE (° C)

PHASE

GAIN

FREQUENCY (Hz)

V

OL

SINKING

V
R
C

ФM = 70°

= 5V

DD

= 2kΩ

L

= 10pF

L

0

45

90

135

180

225

06195-026

OPEN-LOOP PHASE SHIFT (Degrees)

06195-027

3000

VDD = 5V

= 25°C

T

A

1000

100

VDD TO V

OH

10

1

OUTPUT SATURATION VOLTAGE (mV)

0.1

0.001

SOURCING

0.01 0.1 1 10 20

LOAD CURRENT (mA)

V

OL

SINKING

Figure 27. Output Saturation Voltage vs. Load Current

06195-025

1000

VDD = 5V

100

10

AV = +100

(Ω)

OUT

Z

1

= +10

A

V

0.1

= +1

A

V

0.01
100 10M

1k 10k 100k 1M

Figure 30. Closed-Loop Outpu

Rev. A | Page 9 of 16

FREQUENCY (Hz)

t Impedance vs. Frequency

06195-028

AD8665/AD8666/AD8668

–

V

www.BDTIC.com/ADI

120

VDD = 5V

=25°C

T

A

100

80

60

CMRR (dB)

40

20

1.5

1.0

0.5

0

(V)

–0.5

OUT

V

–1.0

–1.5

–2.0

VDD =±2.5V

= 10kΩ

R

L

= 10pF

C

L

= +1

A

V

0

1k 4M

10k 100k 1M

FREQUENCY (Hz)

n Ratio vs. Frequency

100

VDD = 5V
T

= 25°C

A

80

60

PSRR (dB)

40

20

PSRR+

0

1k 4M

Figure 32. Power Supply Rejecti

10k 100k 1M

FREQUENCY (Hz)

on Ratio vs. Frequency Figure 35. Small-Signal Overshoot vs. Load Capacitance

PSRR–

–2.5

6195-029

TIME (1µs/DIV)

Figure 34. Large-Signal Transient Response Figure 31. Common-Mode Rejectio

70

VDD =5V
V

= 100mV p-p

IN

60

50

40

30

OVERSHOOT (%)

20

10

0

1 1000

06195-030

10 100

LOAD CAPACITANCE ( pF)

+OS

–OS

06195-032

06195-033

VDD = 5V

= 100kΩ

R

L

= 10pF

C

(20mV/DIV)

OUT

V

TIME (0.4µs/DIV)

Figure 33. Small-Signal Transient Response

L

= +1

A

V

06195-031

100m

2.5V

0V

0V

V

OUT

V

IN

Figure 36. Positive Overload Recovery Time

Rev. A | Page 10 of 16

TIME (4µs/DIV)

VDD =±2.5V

= –100

A

V

06195-034

AD8665/AD8666/AD8668

www.BDTIC.com/ADI

2.00

1.75

1.50

1.25

1.00

0.75

SUPPLY CURRENT (mA)

0.50

0.25

0

01

2468101214

SUPPLY VOLTAGE (V)

6

6195-037

Figure 39. Supply Current vs. Supply Voltage

100mV

–2.5V

V

IN

0V

0V

V

OUT

TIME (4µs/DIV)

Figure 37. Negative Overload Recovery Time

VDD =±2.5V

= –100

A

V

06195-035

2.0
V

= VDD/2

OUT

1.8

1.6

1.4

1.2

1.0

0.8

0.6

SUPPLY CURRENT (mA)

0.4

0.2

0

–40 120

–20 0 20 40 60 80 100

VDD = 16V

VDD = 5V

TEMPERATURE ( °C)

06195-036

10

8

6

4

2

0

–2

VOLTAGE (V)

–4

–6

–8

–10

V

IN

V

OUT

TIME (10µs/DIV)

VDD =±8V

= +1

A

V

06195-038

Figure 40. No Output Phase Reversal Figure 38. Supply Current vs. Temperature

Rev. A | Page 11 of 16

AD8665/AD8666/AD8668

www.BDTIC.com/ADI

OUTLINE DIMENSIONS

5.00 (0.1968)

4.80 (0.1890)

4.00 (0.1574)

3.80 (0.1497)

0.25 (0.0098)

0.10 (0.0040)

COPLANARITY

0.10

CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.

85

1.27 (0.0500)

SEATING

PLANE

COMPLIANT TO JEDEC STANDARDS MS-012-AA

Figure 41. 8-Lead Standard Small Outline Package [SOIC_N]

Dimensions shown in millimeters and (inches)

3.20

3.00

2.80

8

3.20

3.00

1

2.80

PIN 1

0.65 BSC

0.95

0.85

0.75

0.15

0.38

0.00

0.22

COPLANARITY

0.10

COMPLIANT TO JEDEC STANDARDS MO-187-AA

Figure 42. 8-Lead Mini Small Outline Package [MSOP]

Dim

6.20 (0.2440)

5.80 (0.2284)

41

BSC

1.75 (0.0688)

1.35 (0.0532)

0.51 (0.0201)

0.31 (0.0122)

Nar

row Body

0.25 (0.0098)

0.17 (0.0067)

(R-8)

5

5.15

4.90

4.65

4

1.10 MAX

0.23

SEATING
PLANE

0.08

(RM-8)

ensions shown in millimeters

8°
0°

0.50 (0.0196)

0.25 (0.0099)

8°

1.27 (0.0500)

0°

0.40 (0.0157)

0.80

0.60

0.40

5.10

5.00

4.90

14

4.50

4.40

1.05

1.00

0.80

4.30

PIN 1

0.15

0.05

0.65
BSC

×

45°

COMPLIANT TO JEDEC STANDARDS MO-153-AB-1

Figure 43. 14-Lead Thin Shrink S

0.30

0.19

8

6.40
BSC

71

1.20
MAX

SEATING
PLANE

0.20

0.09

COPLANARITY

0.10

8°
0°

mall Outline Package [TSSOP]

0.75

0.60

0.45

(RU-14)

Dimensions shown in millimeters

8.75 (0.3445)

8.55 (0.3366)

4.00 (0.1575)

3.80 (0.1496)

0.25 (0.0098)

0.10 (0.0039)

COPLANARITY

0.10

CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.

14

1

1.27 (0.0500)
BSC

0.51 (0.0201)

0.31 (0.0122)

COMPLIANT TO JEDEC STANDARDS MS-012-AB

8

6.20 (0.2441)

7

5.80 (0.2283)

1.75 (0.0689)

1.35 (0.0531)

SEATING
PLANE

0.25 (0.0098)

0.17 (0.0067)

0.50 (0.0197)

0.25 (0.0098)

8°
0°

1.27 (0.0500)

0.40 (0.0157)

× 45°

Figure 44. 14-Lead Standard Small Outline Package [SOIC_N]

row Body

Nar

(R-14)

Dimensions shown in millimeters and (inches)

Rev. A | Page 12 of 16

AD8665/AD8666/AD8668

www.BDTIC.com/ADI

2.90 BSC

1.60 BSC

1.30

1.15

0.90

0.15 MAX

5

123

PIN 1

COMPLIANT TO JEDEC STANDARDS MO-178-AA

1.90

BSC

0.50

0.30

4

2.80 BSC

0.95 BSC

1.45 MAX

SEATING
PLANE

0.22

0.08

10°

5°
0°

0.60

0.45

0.30

Figure 45. 5-Lead Small Outline Transistor Package [SOT-23]

(RJ-5)

Dim

ensions shown in millimeters

ORDERING GUIDE

Model Temperature Range Package Description Package Option Branding

AD8665ARZ −40°C to +125°C 8-Lead SOIC_N R-8
AD8665ARZ-REEL −40°C to +125°C 8-Lead SOIC_N R-8
AD8665ARZ-REEL7 −40°C to +125°C 8-Lead SOIC_N R-8
AD8665ARJZ-R2 −40°C to +125°C 5-Lead SOT-23 RJ-5 A1B
AD8665ARJZ-REEL −40°C to +125°C 5-Lead SOT-23 RJ-5 A1B
AD8665ARJZ-REEL7 −40°C to +125°C 5-Lead SOT-23 RJ-5 A1B
AD8666ARZ −40°C to +125°C 8-Lead SOIC_N R-8
AD8666ARZ-REEL −40°C to +125°C 8-Lead SOIC_N R-8
AD8666ARZ-REEL7 −40°C to +125°C 8-Lead SOIC_N R-8
AD8666ARMZ-R2 −40°C to +125°C 8-Lead MSOP RM-8 A16
AD8666ARMZ-REEL −40°C to +125°C 8-Lead MSOP RM-8 A16
AD8668ARZ −40°C to +125°C 14-Lead SOIC_N R-14
AD8668ARZ-REEL −40°C to +125°C 14-Lead SOIC_N R-14
AD8668ARZ-REEL7 −40°C to +125°C 14-Lead SOIC_N R-14
AD8668ARUZ −40°C to +125°C 14-Lead TSSOP RU-14
AD8668ARUZ-REEL −40°C to +125°C 14-Lead TSSOP RU-14

1

Z = Pb-free part.

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

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NOTES

Rev. A | Page 14 of 16

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www.BDTIC.com/ADI

NOTES

Rev. A | Page 15 of 16

AD8665/AD8666/AD8668

www.BDTIC.com/ADI

NOTES

©2006 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D06195-0-10/06(A)

Rev. A | Page 16 of 16