ANALOG DEVICES AD8643-EP Service Manual

Low Power, Rail-to-Rail,

FEATURES

Low supply current: 250 μA maximum
Very low input bias current: 1 pA maximum
Low offset voltage: 750 μV maximum
Single-supply operation: 5 V to 26 V
Dual-supply operation: ±2.5 V to ±13 V
Rail-to-rail output
Unity-gain stable
No phase reversal

ENHANCED PRODUCT FEATURES

Supports defense and aerospace applications

(AQEC standard)
Military temperature range (−55°C to +125°C)
Controlled manufacturing baseline
1 assembly/test site
1 fabrication site
Enhanced product change notification
Qualification data available on request

Output Precision JFET Amplifier

AD8643-EP

PIN CONFIGURATION

1

OUT A

2

–IN A

3

+IN A

+IN B
–IN B

OUT B

AD8643-EP

TOP VIEW

4

V+

(Not to Scal e)

5
6
7

Figure 1. 14-Lead SOIC (R-14)

14
13
12
11
10

9
8

OUT D
–IN D
+IN D
V–
+IN C
–IN C
OUT C

09590-103

APPLICATIONS

Line-/battery-powered instruments
Photodiode amplifiers
Precision current sensing
Precision filters
Portable audio

GENERAL DESCRIPTION

The AD8643-EP is a low power, precision JFET input amplifier
featuring extremely low input bias current and rail-to-rail output.
The ability to swing nearly rail-to-rail at the input and rail-to-rail at
the output enables designers to buffer CMOS digital-to-analog
converters (DACs), ASICs, and other wide output swing devices
in single-supply systems. The outputs remain stable with capacitive
loads of more than 500 pF.

The AD8643-EP is suitable for applications using multichannel
boards that require low power to manage heat. Other applications
include photodiodes and battery management.

The AD8643-EP is fully specified over the military temperature
range of −55°C to +125°C. This device is available in a 14-lead SOIC.

Additional applications information is available in the AD8643
data sheet.

Rev. 0

Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Anal og Devices for its use, nor for any infringements of patents or ot her
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: [phone] www.analog.com
Fax: [phone] ©2011 Analog Devices, Inc. All rights reserved.

AD8643-EP

TABLE OF CONTENTS

Features.............................................................................................. 1

Enhanced Product Features ............................................................ 1

Applications....................................................................................... 1

Pin Configuration............................................................................. 1

General Description ......................................................................... 1

Revision History ............................................................................... 2

Specifications..................................................................................... 3

REVISION HISTORY

1/11—Revision 0: Initial Version

Electrical Characteristics..............................................................3

Absolute Maximum Ratings ............................................................5

Thermal Resistance.......................................................................5

ESD Caution...................................................................................5

Typical Performance Characteristics..............................................6

Outline Dimensions....................................................................... 12

Ordering Guide .......................................................................... 12

Rev. 0 | Page 2 of 12

AD8643-EP

SPECIFICATIONS

ELECTRICAL CHARACTERISTICS

VS = 5.0 V, VCM = 2.5 V, TA = 25°C, unless otherwise noted.

Table 1.

Parameter Symbol Test Conditions/Comments Min Typ Max Unit

INPUT CHARACTERISTICS

Offset Voltage VOS 50 1000 μV

−55°C < TA < +85°C 1.8 mV
+85°C < TA < +125°C, VCM = 1.5 V 1.9 mV

Input Bias Current IB 0.25 1 pA

−55°C < TA < +125°C 180 pA

Input Offset Current IOS 0.5 pA

−55°C < TA < +125°C 60 pA
Input Voltage Range 0 3 V
Common-Mode Rejection Ratio CMRR VCM = 0 V to 2.5 V 74 93 dB
Large Signal Voltage Gain AVO R
Offset Voltage Drift ΔVOS/ΔT −55°C < TA < +125°C 2.5 μV/°C

OUTPUT CHARACTERISTICS

Output Voltage High VOH 4.95 V

I

Output Voltage Low VOL 0.05 V
I
Output Current I

±6 mA

OUT

POWER SUPPLY

Power Supply Rejection Ratio PSRR VS = 5 V to 26 V 90 107 dB
Supply Current/Amplifier ISY 195 250 μA

−55°C < TA < +125°C 270 μA

DYNAMIC PERFORMANCE

Slew Rate SR 2 V/μs
Gain Bandwidth Product GBP 2.5 MHz
Phase Margin Ø

m

NOISE PERFORMANCE

Voltage Noise eN p-p f = 0.1 Hz to 10 Hz 4.0 μV p-p
Voltage Noise Density eN f = 1 kHz 28.5 nV/√Hz
Current Noise Density iN f = 1 kHz 0.5 fA/√Hz

= 10 kΩ, VO = 0.5 to 4.5 V 80 140 V/mV

L

= 1 mA, −55°C to +125°C 4.94 V

L

= 1 mA, −55°C to +125°C 0.01 0.05 V

L

50 Degrees

Rev. 0 | Page 3 of 12

AD8643-EP

VS= ±13 V, VCM = 0 V, TA = 25°C, unless otherwise noted.

Table 2.

Parameter Symbol Test Conditions/Comments Min Typ Max Unit

INPUT CHARACTERISTICS

Offset Voltage VOS 70 1000 μV

−55° < TA < +125°C 1.8 mV
Input Bias Current IB 0.25 1 pA

–55°C < TA < +125°C 260 pA

Input Offset Current IOS 0.5 pA

−55°C < TA < +125°C 65 pA
Input Voltage Range −13 +10 V
Common-Mode Rejection Ratio CMRR VCM = −13 V to +10 V 90 107 dB
Large Signal Voltage Gain AVO R
Offset Voltage Drift ΔVOS/ΔT −55°C < TA < +125°C 2.5 μV/°C

OUTPUT CHARACTERISTICS

Output Voltage High VOH 12.95 V

I

Output Voltage Low VOL −12.95 V

I

Output Current I

±12 mA

OUT

POWER SUPPLY

Power Supply Rejection Ratio PSRR VS = ±2.5 V to ±13 V 90 107 dB
Supply Current/Amplifier ISY 200 290 μA

−55°C < TA < +125°C 330 μA

DYNAMIC PERFORMANCE

Slew Rate SR 3 V/μs
Gain Bandwidth Product GBP 3.5 MHz
Phase Margin

Ø

m

NOISE PERFORMANCE

Voltage Noise eN p-p f = 0.1 Hz to 10 Hz 4.2 μV p-p
Voltage Noise Density eN f = 1 kHz 27.5 nV/√Hz
Current Noise Density iN f = 1 kHz 0.5 fA/√Hz

= 10 kΩ, VO = –11 V to +11 V 215 290 V/mV

L

= 1 mA, −55°C to +125°C 12.94 V

L

= 1 mA, −55°C to +125°C −12.94 V

L

60 Degrees

Rev. 0 | Page 4 of 12

AD8643-EP

ABSOLUTE MAXIMUM RATINGS

Absolute maximum ratings apply at 25°C, unless otherwise noted.

Table 3.

Parameter Rating

Supply Voltage 27.3 V
Input Voltage V− to V+
Differential Input Voltage ±Supply Voltage
Output Short-Circuit Duration Indefinite
Storage Temperature Range −65°C to +150°C
Operating Temperature Range −55°C to +125°C
Junction Temperature Range −65°C to +150°C
Lead Temperature (Soldering, 60 sec) 300°C

Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.

THERMAL RESISTANCE

θJA is specified for the worst-case conditions, that is, a device
soldered in a circuit board for surface-mount packages.

Table 4. Thermal Resistance

Package Type θJA θJC Unit

14-Lead SOIC (R) 120 36 °C/W

ESD CAUTION

Rev. 0 | Page 5 of 12

AD8643-EP

Y

Y

TYPICAL PERFORMANCE CHARACTERISTICS

80

V

= ±13V

SY

70

60

50

40

FREQUENC

30

20

10

0

–0.60

–0.55

–0.50

–0.45

–0.40

–0.35

–0.30

–0.25

–0.20

–0.15

–0.10

VOS (mV)

0

0.05

0.10

–0.05

0.35

0.15

0.20

0.25

0.30

0.40

0.45

0.50

0.55

0.60

09590-002

Figure 2. Input Offset Voltage

16

14

12

10

8

6

4

NUMBER OF AMPLIFIERS

2

0

0

0.5

1.0

1.5

2.0

2.5

3.0

3.5

4.0

4.5

5.0

5.5

6.0

6.5

OFFSET VOLT AGE (μV/°C)

= ±13V

V

SY

7.0

7.5

8.0

8.5

9.0

9.5

10.0

09590-003

Figure 3. Offset Voltage Drift

70

= ±2.5V

V

SY

60

50

20

18

16

14

12

10

8

6

NUMBER OF AMPLIFIERS

4

2

0

0

0.5

1.0

1.5

2.0

2.5

3.0

3.5

4.0

4.5

5.0

5.5

6.0

6.5

7.0

7.5

TCVOS (μV/°C)

Figure 5. Offset Voltage Drift

4.5
VSY = ±13V

4.0
T

= 25°C

A

3.5

3.0

2.5

2.0

1.5

INPUT BIA S (pA)

1.0

0.5

0

–0.5

–15 –13 –11 –9 –7 –5 –3 –1 1 3 5 7 9 11 13 15

VCM (V)

Figure 6. Input Bias Current vs. V

CM

1000

VSY = ±13V

100

VSY = 5V

V

CM

8.0

8.5

= 1.5V

9.0

9.5

10.0

09590-005

09590-006

40

10

30

FREQUENC

20

1

INPUT BIAS CURRE NT (pA)

10

0

–0.60

–0.55

–0.50

–0.45

–0.40

–0.35

–0.30

–0.25

–0.20

–0.15

–0.10

VOS (mV)

0

0.05

0.10

0.15

0.20

0.25

0.30

0.40

0.45

0.50

0.55

–0.05

0.35

0.60

09590-004

Figure 4. Input Offset Voltage

Rev. 0 | Page 6 of 12

0.1

50 750 25 100 125 150

TEMPERATURE (°C)

Figure 7. Input Bias Current vs. Temperature

09590-008

AD8643-EP

(

1.0
VSY = +5V OR ±5V

0.8

0.6

0.4

0.2

0

–0.2

INPUT BIAS ( pA)

–0.4

–0.6

–0.8

–1.0

–5 –4 –3 –2 –1 0 1 2 3 4 5

V

(V)

CM

Figure 8. Input Bias Current vs. V

CM

1000

VSY = ±13V

900
800
700
600
500

(μV)

OS

400

V

300
200
100

0

–100

–15 –13 –11 –9 –7 –5 –3 –1 1 3 5 7 9 11 13 15

VCM (V)

Figure 9. Input Offset Voltage (V

) vs. VCM

OS

500

VSY = 5V

400

300

200

100

μV)

0

OS

V

–100

–200

–300

–400

–500

Figure 10. Input Offset Voltage vs. V

1.0 1.500.5 2.02.5
(V)

V

CM

CM

09590-009

09590-010

09590-011

10M

1M

VSY = ±13V

100k

OPEN-LOOP GAIN (V/V)

10k

0.1 101100

VSY = ±2.5V

09590-012

Figure 11. Open-Loop Gain vs. Load Resistance

1000

A
B

C

100

(V/mV)

VO

A

10

D
E

A. VSY = ±13V, VO = ±11V, RL = 10kΩ

= ±13V, VO = ±11V, RL = 2kΩ

B. V

SY

= +5V, VO = +0.5V/+4.5V, RL = 10kΩ

C. V

SY

= +5V, VO = +0.5V/+4.5V, RL = 2kΩ

D. V

SY

= +5V, VO = +0.5V/+4.5V, RL = 600Ω

E. V

SY

1

–70 –50 –30 –10 10 30 50 70 90 110 130 150

TEMPERAT URE (°C)

09590-013

Figure 12. Open-Loop Gain vs. Temperature

600

VSY = ±13V

500
400
300
200
100

0
–100
–200
–300
–400
–500
–600

–5 0–15 –10 5 10 15

OUTPUT VOLTAGE (V)

09590-014

Figure 13. Input Error Voltage vs. Output Voltage for Resistive Loads

Rev. 0 | Page 7 of 12

AD8643-EP

(

250
200
150
100

50

μV)

0

–50
–100
–150

INPUT VOLTAGE

–200
–250
–300
–350

0 50 100 150 200 250 300 350

OUTPUT VOLTAGE FROM SUPPLY RAIL (mV)

VSY = ±5V

RL = 1kΩ
R

= 2kΩ

L

R

L

R

R

= 2kΩ

L

= 10kΩ

= 10kΩ

L

= 100kΩ

R

L

= 100kΩ

R

L

R

= 1kΩ

L

POS RAIL

NEG RAIL

Figure 14. Input Error Voltage vs. Output Voltage

Within 300 mV of Supply Rails

800

700

600

500

400

300

200

100

0

4 8 12 16 20 24 28

+25°C

+125°C

–55°C

V

(V)

SY

Figure 15. Quiescent Current vs. Supply Voltage at Different Temperatures

10000

VSY = ±13V

VSY– V

1000

100

10

SATURATION VOLTAGE (mV)

1

0.001 0.01 0.1 1 10 100
LOAD CURRENT (mA)

OH

–VSY– V

OL

Figure 16. Output Saturation Voltage vs. Load Current

10000

VSY = 5V

1000

100

10

SATURATION VOLTAGE (mV)

1

0.001 0.01 0.1 1 10 100

09590-015

LOAD CURRENT (mA)

VSY– V

OH

V

OL

09590-018

Figure 17. Output Saturation Voltage vs. Load Current

70

60

50

40

30

20

GAIN (dB)

10

0

–10

–20

–30 –135

10k 100k 1M 10M

09590-016

GAIN

FREQUENCY (Hz)

=±13V

V

SY

R

= 2k

L

CL = 40pF

PHASE

315

270

Ω

225

180

135

90

45

PHASE (Degrees)

0

–45

–90

09590-019

Figure 18. Open-Loop Gain and Phase Margin vs. Frequency

70

60

50

40

30

20

GAIN (dB)

10

0

–10

–20

–30 –135

10k 100k 1M 10M

09590-017

GAIN

FREQUENCY (Hz)

VSY = 5V
R

= 2k

L

CL = 40pF

PHASE

315

270

Ω

225

180

135

90

45

PHASE (Degrees)

0

–45

–90

09590-020

Figure 19. Open-Loop Gain and Phase Margin vs. Frequency

Rev. 0 | Page 8 of 12

AD8643-EP

70

VSY =±13V

60

R

= 2k

Ω

L

CL = 40pF

50

40

G = +100

30

20

GAIN (dB)

–10

–20

–30

G = +10

10

0

G = +1

1k 10k 100k 1M 10M

FREQUENCY (Hz)

Figure 20. Closed-Loop Gain vs. Frequency

70

60

50

40

G = +100

30

20

GAIN (dB)

G = +10

10

0

G = +1

–10

–20

–30

1k 10k 100k 1M 10M

FREQUENCY (Hz)

Figure 21. Closed-Loop Gain vs. Frequency

140

VSY =±13V

120

100

80

60

40

CMRR (dB)

20

0

–20

–40

–60

1k 10k 100k 1M 10M

FREQUENCY (Hz)

Figure 22. CMRR vs. Frequency

09590-021

09590-022

09590-023

140

VSY = 5V

120

100

80

60

40

CMRR (dB)

20

0

–20

–40

–60

1k 10k 100k 1M 10M

FREQUENCY (Hz)

Figure 23. CMRR vs. Frequency

140

=±13V

V

SY

120

100

80

60

40

PSRR (dB)

20

0

–20

–40

–60

1k 10k 100k 1M 10M

+PSRR

–PSRR

FREQUENCY (Hz)

Figure 24. PSRR vs. Frequency

140

VSY = 5V

120

100

80

60

40

PSRR (dB)

20

0

–20

–40

–60

1k 10k 100k 1M 10M

+PSRR

–PSRR

FREQUENCY (Hz)

Figure 25. PSRR vs. Frequency

09590-024

09590-025

09590-026

Rev. 0 | Page 9 of 12

AD8643-EP

(

Ω)

Z

OUT

1000

VSY = ±13V

G = +100

100

10

G = +10

1

G = +1

0.1

15

VS = ±13V
GAIN = +5

10

5

0

–5

OUTPUT SWING (V)

–10

TS + (1%)

TS + (0.1%)

TS – (0.1%)

TS – (1%)

0.01
1k 10k 100k 1M 10M 100M

FREQUENC Y (Hz)

Figure 26. Output Impedance vs. Frequency

1000

VSY = 5V

100

10

(Ω)

OUT

Z

1

0.1

0.01
1k 10k 100k 1M 10M 100M

G = +100

G = +10

G = +1

FREQUENC Y (Hz)

Figure 27. Output Impedance vs. Frequency

T

1

VSY = ±13V

V

IN

–15

0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0

09590-027

SETTLING TIME (μs)

09590-030

Figure 29. Output Swing and Error vs. Settling Time

70

VS =±13V

= 10k

Ω

R

L

60

VIN = 100mV p- p

= +1

A

V

50

40

30

OVERSHOOT (%)

20

10

0

110010 1000

09590-028

CAPACITANCE (pF)

OS–

OS+

09590-031

Figure 30. Small Signal Overshoot vs. Load Capacitance

70

VS = ±2.5V

= 10k

Ω

R

L

60

VIN = 100mV p-p

= +1

A

V

50

2

CH1 10.0V CH2 10.0V M400μs A CH1 1.00V

T 0.00000s

V

OUT

Figure 28. No Phase Reversal

40

30

OVERSHOOT (%)

20

10

0

09590-029

110010 1000

CAPACITANCE (pF)

Figure 31. Small Signal Overshoot vs. Load Capacitance

OS–

OS+

09590-032

Rev. 0 | Page 10 of 12

AD8643-EP

–

VS = ±13V

G = +1M

CH1 p-p = 4.26V

1

1k

VSY = 5V

100

10

VOLTAGE NOISE DE NS I TY (nV/ Hz)

CH1 1.00V M1.00s A CH1 –2 0.0V

Figure 32. 0.1 Hz to 10 Hz Noise

VS = ±2.5V

CH1 p-p = 4.06V

1

CH1 1.00V M1.00s A CH1 –20.0V

Figure 33. 0.1 Hz to 10 Hz Noise

1k

VSY = ±13V

100

10

VOLTAGE NOISE DE NS I TY (nV/ Hz)

1

10 1k100 10k

FREQUENCY ( Hz )

Figure 34. Voltage Noise Density

G = +1M

09590-033

09590-034

09590-035

1

10 1k100 10k

FREQUENCY ( Hz )

Figure 35. Voltage Noise Density

0.004

V

= ±13V

0.001

0.0001

THD + NOISE (%)

0.00001

0.000001

SY

LOAD = 100kΩ
GAIN = +1

4V p-p INPUT

8V p-p INPUT

1V p-p INPUT

2V p-p INPUT

1k1001 20k

FREQUENCY (Hz)

Figure 36. Total Harmonic Distortion + Noise vs. Frequency

40
–50
–60
–70
–80
–90

–100

(dB)

–110
–120
–130
–140
–150
–160

20 100 1k 10k 100k

–
+

V

IN

VIN = 4.5V p-p

= 9V p-p

V

IN

2kΩ

20kΩ

–
+

2kΩ

FREQUENCY (Hz )

2kΩ

Figure 37. Channel Separation

10k

VIN = 18V p-p

09590-036

09590-037

09590-041

Rev. 0 | Page 11 of 12

AD8643-EP

OUTLINE DIMENSIONS

8.75 (0.3445)

8.55 (0.3366)

BSC

8

7

6.20 (0.2441)

5.80 (0.2283)

1.75 (0.0689)

1.35 (0.0531)

SEATING
PLANE

8°
0°

0.25 (0.0098)

0.17 (0.0067)

0.50 (0.0197)

0.25 (0.0098)

1.27 (0.0500)

0.40 (0.0157)

45°

060606-A

4.00 (0.1575)

3.80 (0.1496)

0.25 (0.0098)

0.10 (0.0039)

COPLANARITY

0.10

14

1

1.27 (0.0500)

0.51 (0.0201)

0.31 (0.0122)

CONTROLLING DIME NSIONS ARE IN MILLIMETERS; INCH DIMENSI ONS
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER E QUIVALENTS FOR
REFERENCE ONLYAND ARE NOT APPROPRI ATE F OR USE IN DESI GN.

COMPLIANT TO JEDEC STANDARDS MS-012-AB

Figure 38. 14-Lead Standard Small Outline Package [SOIC_N]

Narrow Body

(R-14)

Dimensions shown in millimeters and (inches)

ORDERING GUIDE

Model1 Temperature Range Package Description Package Option

AD8643TRZ-EP −55°C to +125°C 14-lead SOIC_N R-14
AD8643TRZ-EP-R7 −55°C to +125°C 14-lead SOIC_N R-14

1

Z = RoHS Compliant Part.

©2011 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D09590-0-1/11(0)

Rev. 0 | Page 12 of 12