The AD8615/AD8616/AD8618 are dual/quad, rail-to-rail, input
and output, single-supply amplifiers featuring very low offset
voltage, wide signal bandwidth, and low input voltage and
Input/Output Operational Amplifiers
AD8615/AD8616/AD8618
current noise. The parts use a patented trimming technique
that achieves superior precision without laser trimming.
The AD8615/AD8616/AD8618 are fully specified to operate
from 2.7 V to 5 V single supplies.
The combination of 20 MHz bandwidth, low offset, low noise,
and very low input bias current make these amplifiers useful in
a wide variety of applications. Filters, integrators, photodiode
amplifiers, and high impedance sensors all benefit from the
combination of performance features. AC applications benefit
from the wide bandwidth and low distortion. The
AD8615/AD8616/AD8618 offer the highest output drive
capability of the DigiTrim
line drivers and other low impedance applications.
Applications for the parts include portable and low powered
instrumentation, audio amplification for portable devices,
portable phone headsets, bar code scanners, and multipole
filters. The ability to swing rail-to-rail at both the input and
output enables designers to buffer CMOS ADCs, DACs, ASICs,
and other wide output swing devices in single-supply systems.
The AD8615/AD8616/AD8618 are specified over the extended
industrial (–40°C to +125°C) temperature range. The AD8615
is available in 5-lead TSOT-23 packages. The AD8616 is available in 8-lead MSOP and narrow SOIC surface-mount packages;
the MSOP version is available in tape and reel only. The
AD8618 is available in 14-lead SOIC and TSSOP packages.
TM
family, which is excellent for audio
PIN CONFIGURATIONS
5
4
8
7
6
5
8
7
6
5
V+
–IN
V+
OUT B
–IN B
+IN B
V+
OUT B
–IN B
+IN B
04648-B-050
04648-0-001
04648-0-002
1
OUT
AD8615
V–
2
TOP VIEW
(Not to Scale)
+IN
3
Figure 1. 5-Lead TSOT-23 (UJ-5)
OUT A
1
AD8616
2
–IN A
+IN A
3
TOP VIEW
(Not to Scale)
V–
4
Figure 2. 8-Lead MSOP (RM-8)
OUT A
1
V–
AD8616
2
3
TOP VIEW
(Not to Scale)
4
–IN A
+IN A
Figure 3. 8-Lead SOIC (R-8)
Rev. C
Information furnished by Analog Devices is believed to be accurate and reliable.
However, no responsibility is assumed by Analog Devices for its use, nor for any
infringements of patents or other rights of third parties that may result from its use.
Specifications subject to change without notice. No license is granted by implication
or otherwise under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective owners.
VS =5 V, VCM = VS/2, TA = 25°C, unless otherwise noted.
Table 1.
Parameter Symbol Conditions Min Typ Max Unit
INPUT CHARACTERISTICS
Offset Voltage AD8616/AD8618/
V
OS
AD8615
V
−40°C < TA < +125°C 800 μV
/∆T −40°C < TA < +125°C
Offset Voltage Drift AD8616/AD8618/
∆V
OS
AD8615
Input Bias Current I
B
−40°C < TA < +85°C 50 pA
−40°C < TA < +125°C 550 pA
Input Offset Current I
OS
−40°C < TA < +85°C 50 pA
−40°C < TA < +125°C 250 pA
Input Voltage Range 0 5 V
Common-Mode Rejection Ratio CMRR VCM = 0 V to 4.5 V 80 100 dB
Large Signal Voltage Gain A
Input Capacitance C
C
VO
DIFF
CM
OUTPUT CHARACTERISTICS
Output Voltage High V
OH
I
−40°C < TA < +125°C 4.7 V
Output Voltage Low V
OL
I
−40°C < TA < +125°C 200 mV
Output Current I
Closed-Loop Output Impedance Z
OUT
OUT
POWER SUPPLY
Power Supply Rejection Ratio PSRR VS = 2.7 V to 5.5 V 70 90 dB
Supply Current per Amplifier I
SY
−40°C < TA < +125°C 2.5 mA
DYNAMIC PERFORMANCE
Slew Rate SR RL = 2 kΩ 12 V/μs
Settling Time t
s
Gain Bandwidth Product GBP 24 MHz
Phase Margin Ø
m
NOISE PERFORMANCE
Peak-to-Peak Noise en p-p 0.1 Hz to 10 Hz 2.4 μV
Voltage Noise Density e
n
f = 10 kHz 7 nV/√Hz
Current Noise Density i
n
Channel Separation Cs f = 10 kHz –115 dB
f = 100 kHz –110 dB
VS = 3.5 V at VCM = 0.5 V and 3.0 V
= 0 V to 5 V 80 500 μV
CM
23
23
1.5
3
60
100
7
10
μV
μV
μV/°C
μV/°C
0.2 1 pA
0.1 0.5 pA
RL = 2 kΩ, VO = 0.5 V to 5 V 105 1500 V/mV
2.5 pF
6.7 pF
IL = 1 mA 4.98 4.99 V
= 10 mA 4.88 4.92 V
L
IL = 1 mA 7.5 15 mV
= 10 mA 70 100 mV
L
±150 mA
f = 1 MHz, AV = 1 3 Ω
VO = 0 V 1.7 2.0 mA
To 0.01% <0.5 μs
63 Degrees
f = 1 kHz 10 nV/√Hz
f = 1 kHz 0.05 pA/√Hz
Rev. C | Page 3 of 20
AD8615/AD8616/AD8618
VS = 2.7 V, VCM = VS/2, TA = 25°C, unless otherwise noted.
Table 2.
Parameter Symbol Conditions Min Typ Max Unit
INPUT CHARACTERISTICS
Offset Voltage AD8616/AD8618/
V
OS
AD8615
V
−40°C < TA < +125°C 800 μV
/∆T −40°C < TA < +125°C
Offset Voltage Drift AD8616/AD8618/
∆V
OS
AD8615
Input Bias Current I
B
−40°C < TA < +85°C 50 pA
−40°C < TA < +125°C 550 pA
Input Offset Current I
OS
−40°C < TA < +85°C 50 pA
−40°C < TA < +125°C 250 pA
Input Voltage Range 0 2.7 V
Common-Mode Rejection Ratio CMRR VCM = 0 V to 2.7 V 80 100 dB
Large Signal Voltage Gain A
Input Capacitance C
C
VO
DIFF
CM
OUTPUT CHARACTERISTICS
Output Voltage High V
OH
−40°C < TA < +125°C 2.6 V
Output Voltage Low V
OL
−40°C < TA < +125°C 30 mV
Output Current I
Closed-Loop Output Impedance Z
OUT
OUT
POWER SUPPLY
Power Supply Rejection Ratio PSRR VS = 2.7 V to 5.5 V 70 90 dB
Supply Current per Amplifier I
SY
−40°C < TA < +125°C 2.5 mA
DYNAMIC PERFORMANCE
Slew Rate SR RL = 2 kΩ 12 V/μs
Settling Time t
s
Gain Bandwidth Product GBP 23 MHz
Phase Margin Ø
m
NOISE PERFORMANCE
Peak-to-Peak Noise en p-p 0.1 Hz to 10 Hz 2.1 μV
Voltage Noise Density e
n
f = 10 kHz 7 nV/√Hz
Current Noise Density i
n
Channel Separation Cs f = 10 kHz –115 dB
f = 100 kHz –110 dB
VS = 3.5 V at VCM = 0.5 V and 3.0 V
= 0 V to 2.7 V 80 500 μV
CM
23
23
1.5
3
65
100
7
10
μV
μV
μV/°C
μV/°C
0.2 1 pA
0.1 0.5 pA
RL = 2 kΩ, VO = 0.5 V to 2.2 V 55 150 V/mV
2.5 pF
7.8 pF
IL = 1 mA 2.65 2.68 V
IL = 1 mA 11 25 mV
±50 mA
f = 1 MHz, AV = 1 3 Ω
VO = 0 V 1.7 2 mA
To 0.01% < 0.3 μs
42 Degrees
f = 1 kHz 10 nV/√Hz
f = 1 kHz 0.05 pA/√Hz
Rev. C | Page 4 of 20
AD8615/AD8616/AD8618
ABSOLUTE MAXIMUM RATINGS
Table 3.
Parameter Rating
Supply Voltage 6 V
Input Voltage GND to V
Differential Input Voltage ±3 V
Output Short-Circuit Duration to GND Indefinite
Storage Temperature –65°C to +150°C
Operating Temperature Range –40°C to +125°C
Lead Temperature Range (Soldering 60 sec) 300°C
Junction Temperature 150°C
S
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only and functional operation of the device at these or
any other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
ESD CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on
the human body and test equipment and can discharge without detection. Although this product features
proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy
electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance
degradation or loss of functionality.
THERMAL RESISTANCE
θJA is specified for the worst-case conditions, that is, θJA is
specified for device soldered in circuit board for surface-mount
packages.
Figure 8. Input Offset Voltage vs. Common-Mode Voltage
(200 Units, Five Wafer Lots Including Process Skews)
04648-0-004
04648-0-005
1000
VS = 5V
= 25°C
T
A
100
(mV)
10
OUT
–V
SY
V
1
0.1
0.0010.010.1110
SOURCE
I
LOAD
SINK
(mA)
Figure 10. Output Voltage to Supply Rail vs. Load Current
120
VS = 5V
100
80
60
40
OUTPUT VOLTAGE (mV)
20
1mA LOAD
0
–40 –25 –10 520 35 5065 8095 110 125
10mA LOAD
TEMPERATURE (
°
C)
Figure 11. Output Saturation Voltage vs. Temperature
100
04648-B-007
04648-0-008
Rev. C | Page 6 of 20
AD8615/AD8616/AD8618
100
VS = ±2.5V
80
T
= 25°C
A
Ø
= 63°
m
60
40
20
0
GAIN (dB)
–20
–40
–60
–80
–100
1M10M
FREQUENCY (Hz)
Figure 12. Open-Loop Gain and Phase vs. Frequency
60M
225
180
135
90
45
0
–45
–90
–135
–180
–225
PHASE (Degrees)
04648-B-009
120
100
80
60
CMRR (dB)
40
20
0
10k1k100k1M10M
FREQUENCY (Hz)
Figure 15. Common-Mode Rejection Ratio vs. Frequency
VS = ±2.5V
04648-0-012
5.0
VS = 5.0V
4.5
V
= 4.9V p-p
IN
T
= 25°C
4.0
A
R
= 2k
Ω
L
AV = 1
3.5
3.0
2.5
2.0
1.5
OUTPUT SWING (V p-p)
1.0
0.5
0
10k1k100k1M10M
FREQUENCY (Hz)
Figure 13. Closed-Loop Output Voltage Swing
100
VS = ±2.5V
90
80
70
60
50
40
30
OUTPUT IMPEDANCE (Ω)
20
10
0
1k10k100k1M10M100M
AV = 100AV = 1
AV = 10
FREQUENCY (Hz)
Figure 14. Output Impedance vs. Frequency
04648-0-010
04648-0-011
120
100
80
60
PSRR (dB)
40
20
0
10k1k100k1M10M
FREQUENCY (Hz)
Figure 16. PSRR v s. Frequency
50
VS = 5V
45
=
∞
R
L
TA=25°C
40
= 1
A
V
35
30
25
20
15
10
SMALL-SIGNAL OVERSHOOT (%)
5
0
101001000
CAPACITANCE (pF)
–OS
+OS
Figure 17. Small-Signal Overshoot vs. Load Capacitance
VS = ±2.5V
04648-0-013
04648-0-014
Rev. C | Page 7 of 20
AD8615/AD8616/AD8618
2.4
2.2
2.0
1.8
1.6
1.4
1.2
1.0
0.8
0.6
0.4
SUPPLY CURRENT PER AMPLIFIER (mA)
0.2
0
–40 –25 –10 52035 50 6580 95 110 125
VS = 2.7V
VS = 5V
TEMPERATURE (
°
C)
Figure 18. Supply Current vs. Temperature
04648-0-015
VS = 5V
R
= 10k
Ω
L
CL = 200pF
A
= 1
V
VOLTAGE (50mV/DIV)
TIME (1μs/DIV)
04648-0-019
Figure 21. Small-Signal Transient Response
2000
1800
1600
1400
1200
1000
800
600
400
SUPPLY CURRENT PER AMPLIFIER (μA)
200
0
00.5 1.0 1.52.0 2.5 3.03.5 4.0 4.55.0
SUPPLY VOLTAGE (V)
Figure 19. Supply Current vs. Supply Voltage
1k
)
0.5
100
VS = ±2.5V
= ±1.35V
V
S
04648-0-016
E (500mV/DIV)
VOLTAG
0.01
0.1
VS = 5V
= 10kΩ
R
L
= 200pF
C
L
= 1
A
V
TIME (1μs/DIV)
Figure 22. Large-Signal Transient Response
VS = ±2.5V
V
= 0.5V rms
IN
A
= 1
V
BW = 22kHz
R
= 100k
Ω
L
04648-0-020
10
VOLTAGE NOISE DENSITY (nV/ Hz
1
101001k10k100k
FREQUENCY (Hz)
Figure 20. Voltage Noise Density vs. Frequency
04648-B-017
Rev. C | Page 8 of 20
THD+N (%)
0.001
0.0001
201001k20k
FREQUENCY (Hz)
Figure 23. THD + N
04648-0-021
AD8615/AD8616/AD8618
500
VS = ±2.5V
= 2V p-p
V
IN
= 10
A
V
VOLTAGE (2V/DIV)
TIME (200ns/DIV)
04648-0-022
Figure 24. Settling Time
VS = 2.7V
VOLTAGE (1μV/DIV)
TIME (1s/DIV)
04648-0-023
Figure 25. 0.1 Hz to 10 Hz Input Voltage Noise
VS = 2.7V
400
T
=25°C
A
300
200
100
0
–100
–200
INPUT OFFSET VOLTAGE (μV)
–300
–400
–500
00.30.60.91.21.51.82.12.42.7
COMMON-MODE VOLTAGE (V)
Figure 27. Input Offset Voltage vs. Common-Mode Voltage
(200 Units, Five Wafer Lots Including Process Skews)
500
VS = 3.5V
400
T
= 25°C
A
300
V)
μ
200
100
0
–100
–200
INPUT OFFSET VOLTAGE (
–300
–400
–500
00.51.01.52.02.53.03.5
COMMON-MODE VOLTAGE (V)
Figure 28. Input Offset Voltage vs. Common-Mode Voltage
(200 Units, Five Wafer Lots Including Process Skews)
04648-0-025
04648-0-026
1400
VS = 2.7V
T
= 25°
C
A
1200
V
= 0V TO 2.7V
CM
1000
800
600
400
NUMBER OF AMPLIFIERS
200
0
–700 –500 –300 –100100300500700
OFFSET VOLTAGE (μV)
Figure 26. Input Offset Voltage Distribution
04648-0-024
Rev. C | Page 9 of 20
1000
VS = ±1.35V
T
= 25°C
A
100
(mV)
10
OUT
-V
SY
V
1
0.1
0.0010.010.1110
SOURCE
I
(mA)
LOAD
SINK
Figure 29. Output Voltage to Supply Rail vs. Load Current
04648-B-027
AD8615/AD8616/AD8618
18
VS = 2.7V
16
14
12
10
8
6
OUTPUT VOLTAGE (mV)
4
2
0
VOL@ 1mA LOAD
–40 –25 –10 520 35 5065 8095 110 125
Figure 30. Output Saturation Voltage vs. Temperature
VOH@ 1mA LOAD
TEMPERATURE (°C)
04648-0-028
50
VS = ±1.35V
45
=
∞
R
L
TA=25°C
40
= 1
A
V
35
30
25
20
15
10
SMALL SIGNAL OVERSHOOT (%)
5
0
101001000
CAPACITANCE (pF)
–OS
+OS
Figure 33. Small-Signal Overshoot vs. Load Capacitance
04648-0-0331
100
VS = ±1.35V
80
= 25°C
T
A
= 42°
Ø
m
60
40
20
0
GAIN (dB)
–20
–40
–60
–80
–100
1M10M
FREQUENCY (Hz)
Figure 31. Open-Loop Gain and Phase vs. Frequency
2.7
VS = 2.7V
2.4
2.1
1.8
1.5
1.2
0.9
OUTPUT SWING (V p-p)
0.6
0.3
= 2.6V p-p
V
IN
= 25°C
T
A
= 2k
Ω
R
L
AV = 1
0
10k1k100k1M10M
FREQUENCY (Hz)
Figure 32. Closed-Loop Output Voltage Swing vs. Frequency
60M
225
180
135
90
45
0
–45
–90
–135
–180
–225
PHASE (Degrees)
04648-B-029
04648-0-030
VS = 2.7V
= 10kΩ
R
L
= 200pF
C
L
A
= 1
V
VOLTAGE (50mV/DIV)
TIME (1μs/DIV)
04648-0-034
Figure 34. Small-Signal Transient Response
VS = 2.7V
= 10kΩ
R
L
= 200pF
C
L
= 1
A
V
VOLTAGE (500mV/DIV)
TIME (1μs/DIV)
04648-0-035
Figure 35. Large-Signal Transient Response
Rev. C | Page 10 of 20
AD8615/AD8616/AD8618
APPLICATIONS
INPUT OVERVOLTAGE PROTECTION
The AD8615/AD8616/AD8618 have internal protective circuitry that allows voltages exceeding the supply to be applied
at the input.
It is recommended, however, not to apply voltages that exceed
the supplies by more than 1.5 V at either input of the amplifier.
If a higher input voltage is applied, series resistors should be
used to limit the current flowing into the inputs.
The input current should be limited to <5 mA. The extremely
low input bias current allows the use of larger resistors, which
allows the user to apply higher voltages at the inputs. The use
of these resistors adds thermal noise, which contributes to the
overall output voltage noise of the amplifier.
For example, a 10 kΩ resistor has less than 13 nV/√Hz of
thermal noise and less than 10 nV of error voltage at room
temperature.
This reduces the overshoot and minimizes ringing, which
in turn improves the frequency response of the AD8615/
AD8616/AD8618. One simple technique for compensation is
the snubber, which consists of a simple RC network. With this
circuit in place, output swing is maintained and the amplifier
is stable at all gains.
Figure 38 shows the implementation of the snubber, which
reduces overshoot by more than 30% and eliminates ringing
that can cause instability. Using the snubber does not recover
the loss of bandwidth incurred from a heavy capacitive load.
VS = ±2.5V
= 1
A
V
= 500pF
C
L
OUTPUT PHASE REVERSAL
The AD8615/AD8616/AD8618 are immune to phase
inversion, a phenomenon that occurs when the voltage
applied at the input of the amplifier exceeds the maximum input common mode.
Phase reversal can cause permanent damage to the amplifier and can create lock-ups in systems with feedback loops.
VS= ±2.5V
V
= 6V p-p
IN
A
= 1
V
R
= 10kΩ
L
V
OUT
VOLTAGE (2V/DIV)
TIME (2ms/DIV)
Figure 36. No Phase Reversal
V
IN
04648-0-036
VOLTAGE (100mV/DIV)
TIME (2μs/DIV)
Figure 37. Driving Heavy Capacitive Loads Without Compensation
V
CC
+
V–
V+
+
–
–
200mV
200Ω
500pF
V
EE
500pF
04648-0-038
Figure 38. Snubber Network
VS = ±2.5V
= 1
A
V
= 200
Ω
R
S
CS = 500pF
= 500pF
C
L
04648-0-037
DRIVING CAPACITIVE LOADS
Although the AD8615/AD8616/AD8618 are capable of driving
capacitive loads of up to 500 pF without oscillating, a large
amount of overshoot is present when operating at frequencies
above 100 kHz. This is especially true when the amplifier is
configured in positive unity gain (worst case). When such large
capacitive loads are required, the use of external compensation
is highly recommended.
Rev. C | Page 11 of 20
VOLTAGE (100mV/DIV)
TIME (10μs/DIV)
Figure 39. Driving Heavy Capacitive Loads Using the Snubber Network
04648-0-039
AD8615/AD8616/AD8618
0V0
OVERLOAD RECOVERY TIME
Overload recovery time is the time it takes the output of the
amplifier to come out of saturation and recover to its linear
region. Overload recovery is particularly important in applications where small signals must be amplified in the presence of
large transients.
Figure 40 and Figure 41 show the positive and
negative overload recovery times of the AD8616. In both cases,
the time elapsed before the AD8616 comes out of saturation is
less than 1 μs. In addition, the symmetry between the positive
and negative recovery times allows excellent signal rectification
without distortion to the output signal.
VS = ±2.5V
= 10kΩ
R
L
= 100
A
V
V
IN
= 50mV
04648-0-040
04648-0-041
0V
0V
V
+2.5V
–50mV
VS = ±2.5V
= 10kΩ
R
L
A
= 100
V
= 50mV
V
IN
–2.5V
+50mV
TIME (1μs/DIV)
Figure 40. Positive Overload Recovery
TIME (1μs/DIV)
Figure 41. Negative Overload Recovery
D/A CONVERSION
The AD8616 can be used at the output of high resolution DACs.
Their low offset voltage, fast slew rate, and fast settling time
make the parts suitable to buffer voltage output or current
output DACs.
SERIAL
INTERFACE
0.1
μ
F
CS
DIN
SCLK
LDAC
5V2.5V
DD
0.1
REFFV
AD5542
10
μ
F
+
μ
F
REFS
AGNDDGND
OUT
1/2
AD8616
UNIPOLAR
OUTPUT
Figure 42. Buffering DAC Output
LOW NOISE APPLICATIONS
Although the AD8618 typically has less than 8 nV/√Hz of
voltage noise density at 1 kHz, it is possible to reduce it further. A simple method is to connect the amplifiers in parallel,
as shown in
by the square root of the number of amplifiers. In this case, the
total noise is approximately 4 nV/√Hz at room temperature.
The 100 Ω resistor limits the current and provides an effective
output resistance of 50 Ω.
V
Figure 43. The total noise at the output is divided
IN
3
V+
R1
10Ω
R4
10Ω
R7
10Ω
R10
10Ω
2
3
2
3
2
3
2
V–
1kΩ
V+
V–
1kΩ
V+
V–
1kΩ
V+
V–
R11
1kΩ
1
R2
1
R5
1
R8
1
Figure 43. Noise Reduction
100Ω
100Ω
100Ω
R12
100Ω
R3
R6
V
OUT
R9
04648-0-043
04648-0-042
Figure 42 shows an example of the AD8616 at the output of the
AD5542. The AD8616’s rail-to-rail output and low distortion
help maintain the accuracy needed in data acquisition systems
and automated test equipment.
Rev. C | Page 12 of 20
AD8615/AD8616/AD8618
HIGH SPEED PHOTODIODE PREAMPLIFIER
The AD8615/AD8616/AD8618 are excellent choices for I-to-V
conversions. The very low input bias, low current noise, and
high unity-gain bandwidth of the parts make them suitable,
especially for high speed photodiode preamps.
In high speed photodiode applications, the diode is operated
in a photoconductive mode (reverse biased). This lowers the
junction capacitance at the expense of an increase in the
amount of dark current that flows out of the diode.
The total input capacitance, C1, is the sum of the diode and op
amp input capacitances. This creates a feedback pole that causes
degradation of the phase margin, making the op amp unstable.
Therefore, it is necessary to use a capacitor in the feedback to
compensate for this pole.
To get the maximum signal bandwidth, select
1C
f2R
U
C2
R2
+2.5V
–
C
R
SH
C
D
IN
V–
V+
+
where
2Cπ=
2
f
is the unity-gain bandwidth of the amplifier.
U
I
D
10
0
–10
GAIN (dB)
–20
–30
–40
10.1101001k10k100k1M
FREQUENCY (Hz)
04648-0-046
Figure 46. Second-Order Butterworth, Low-Pass Filter Frequency Response
POWER DISSIPATION
Although the AD8615/AD8616/AD8618 are capable of
providing load currents up to 150 mA, the usable output, load
current, and drive capability is limited to the maximum power
dissipation allowed by the device package.
In any application, the absolute maximum junction temperature
for the AD8615/AD8616/AD8618 is 150°C. This should never
be exceeded because the device could suffer premature failure.
Accurately measuring power dissipation of an integrated circuit
is not always a straightforward exercise;
for setting a safe output current drive level or selecting a heat
sink for the package options available on the AD8616.
1.5
Figure 47 is a design aid
–V
BIAS
–2.5V
04648-0-044
Figure 44. High Speed Photodiode Preamplifier
ACTIVE FILTERS
The low input-bias current and high unity-gain bandwidth
of the AD8616 make it an excellent choice for precision filter
design.
Figure 45 shows the implementation of a second-order, lowpass filter. The Butterworth response has a corner frequency
of 100 kHz and a phase shift of 90°. The frequency response
is shown in
Figure 46.
2nF
V
CC
1.1k
1.1k
V
Ω
IN
Ω
1nF
Figure 45. Second-Order, Low-Pass Filter
V–
V+
V
EE
04648-0-045
1.0
0.5
POWER DISSIPATION (W)
0
20
0
SOIC
MSOP
406080120100140
TEMPERATURE (°C)
Figure 47. Maximum Power Dissipation vs. Ambient Temperature
04648-0-047
Rev. C | Page 13 of 20
AD8615/AD8616/AD8618
These thermal resistance curves were determined using
the AD8616 thermal resistance data for each package and
a maximum junction temperature of 150°C. The following
formula can be used to calculate the internal junction temperature of the AD8615/AD8616/AD8618 for any application:
T
= P
× θJA + T
J
DISS
where:
T
= junction temperature
J
P
= power dissipation
DISS
θ
= package thermal resistance, junction-to-case
JA
T
= ambient temperature of the circuit
A
To calculate the power dissipated by the AD8615/
AD8616/AD8618, use
P
= I
DISS
LOAD
A
× (VS – V
OUT
)
Calculating Power by Measuring Ambient and Case
Temperature
The two equations for calculating junction temperature are
T
= TA + P θ
J
JA
where:
T
= junction temperature
J
T
= ambient temperature
A
θ
= the junction-to-ambient thermal resistance
JA
T
= TC + P θ
where T
J
is case temperature and θ
C
JC
and θJC are given in the
JA
data sheet.
The two equations for calculating P (power) are
T
+ P θ
A
= TC + P θ
JA
JC
where:
I
= output load current
LOAD
V
= supply voltage
S
V
= output voltage
OUT
The quantity within the parentheses is the maximum voltage
developed across either output transistor.
POWER CALCULATIONS FOR VARYING OR
UNKNOWN LOADS
Often, calculating power dissipated by an integrated circuit to
determine if the device is being operated in a safe range is not
as simple as it might seem. In many cases, power cannot be
directly measured. This may be the result of irregular output
waveforms or varying loads. Indirect methods of measuring
power are required.
There are two methods to calculate power dissipated by
an integrated circuit. The first is to measure the package
temperature and the board temperature. The second is
to directly measure the circuits supply current.
P = (TA – T
C
)/(θ
JC
– θ
)
JA
Once power has been determined, it is necessary to recalculate
the junction temperature to ensure that it has not been
exceeded.
The temperature should be measured directly on and near the
package, but not touching it. Measuring the package can be
difficult. A very small bimetallic junction glued to the package
can be used, or an infrared sensing device can be used if the
spot size is small enough.
Calculating Power by Measuring Supply Current
Power can be calculated directly if the supply voltage and
current are known. However, the supply current can have a dc
component with a pulse directed into a capacitive load, which
could make the rms current very difficult to calculate. This
difficulty can be overcome by lifting the supply pin and
inserting an rms current meter into the circuit. For this method
to work, make sure the current is delivered by the supply pin
being measured. This is usually a good method in a singlesupply system; however, if the system uses dual supplies, both
supplies may need to be monitored.
Rev. C | Page 14 of 20
AD8615/AD8616/AD8618
OUTLINE DIMENSIONS
3.00
BSC
8
5
3.00
BSC
1
PIN 1
0.65 BSC
0.15
0.00
0.38
0.22
COPLANARITY
0.10
COMPLIANT TO JEDEC STANDARDS MO-187-AA
BSC
4
SEATING
PLANE
4.90
1.10 MAX
0.23
0.08
8°
0°
0.80
0.60
0.40
Figure 48. 8-Lead Mini Small Outline Package [MSOP]
(RM-8)
Dimensions shown in millimeters
5.00 (0.1968)
4.80 (0.1890)
4.00 (0.1574)
3.80 (0.1497)
0.25 (0.0098)
0.10 (0.0040)
COPLANARITY
0.10
CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN
85
1.27 (0.0500)
SEATING
PLANE
COMPLIANT TO JEDEC STANDARDS MS-012-AA
BSC
6.20 (0.2440)
5.80 (0.2284)
41
1.75 (0.0688)
1.35 (0.0532)
0.51 (0.0201)
0.31 (0.0122)
0.25 (0.0098)
0.17 (0.0067)
0.50 (0.0196)
0.25 (0.0099)
8°
1.27 (0.0500)
0°
0.40 (0.0157)
Figure 49. 8-Lead Standard Small Outline Package [SOIC]
Narrow Body (R-8)
Dimensions shown in millimeters and (inches)
× 45°
8.75 (0.3445)
8.55 (0.3366)
4.00 (0.1575)
3.80 (0.1496)
0.25 (0.0098)
0.10 (0.0039)
COPLANARITY
0.10
CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN
14
1
1.27 (0.0500)
BSC
0.51 (0.0201)
0.31 (0.0122)
COMPLIANT TO JEDEC STANDARDS MS-012-AB
8
6.20 (0.2441)
7
5.80 (0.2283)
SEATING
PLANE
1.75 (0.0689)
1.35 (0.0531)
0.25 (0.0098)
0.17 (0.0067)
0.50 (0.0197)
0.25 (0.0098)
8°
0°
1.27 (0.0500)
0.40 (0.0157)
× 45°
Figure 50. 14-Lead Standard Small Outline Package [SOIC]
Narrow Body (R-14)
Dimensions shown in millimeters and (inches)
5.10
5.00
4.90
14
4.50
4.40
4.30
PIN 1
1.05
1.00
0.80
0.65
BSC
0.15
0.05
COMPLIANT TO JEDEC STANDARDS MO-153-AB-1
0.30
0.19
8
6.40
BSC
71
SEATING
PLANE
1.20
MAX
COPLANARITY
0.20
0.09
0.10
8°
0°
0.75
0.60
0.45
Figure 51. 14-Lead Thin Shrink Small Outline Package [TSSOP]
(RU-14)
Dimensions shown in millimeters
Rev. C | Page 15 of 20
AD8615/AD8616/AD8618
2.90 BSC
54
0.50
0.30
2.80 BSC
0.95 BSC
*
1.00 MAX
SEATING
PLANE
0.20
0.08
1.60 BSC
*
0.90
0.87
0.84
0.10 MAX
123
PIN 1
1.90
BSC
*
COMPLIANT TO JEDEC STANDARDS MO-193-AB WITH
THE EXCEPTION OF PACKAGE HEIGHT AND THICKNESS.
Figure 52. 5-Lead Thin Small Outline Transistor Package [TSOT ]
(UJ-5)
Dimensions shown in millimeters
8°
4°
0°
0.60
0.45
0.30
Rev. C | Page 16 of 20
AD8615/AD8616/AD8618
ORDERING GUIDE
Model Temperature Range Package Description Package Option Branding
AD8615AUJZ-R2
AD8615AUJZ-REEL
AD8615AUJZ-REEL7
AD8616ARM-R2 –40°C to +125°C 8-Lead MSOP RM-8 BLA
AD8616ARM-REEL –40°C to +125°C 8-Lead MSOP RM-8 BLA
AD8616ARMZ-R2
AD8616ARMZ-REEL
AD8616AR –40°C to +125°C 8-Lead SOIC R-8
AD8616AR-REEL –40°C to +125°C 8-Lead SOIC R-8
AD8616AR-REEL7 –40°C to +125°C 8-Lead SOIC R-8
AD8616ARZ
AD8616ARZ-REEL
AD8616ARZ-REEL7
AD8618AR –40°C to +125°C 14-Lead SOIC R-14
AD8618AR-REEL –40°C to +125°C 14-Lead SOIC R-14
AD8618AR-REEL7 –40°C to +125°C 14-Lead SOIC R-14
AD8618ARZ
AD8618ARZ-REEL
AD8618ARZ-REEL7
AD8618ARU –40°C to +125°C 14-Lead TSSOP RU-14
AD8618ARU-REEL –40°C to +125°C 14-Lead TSSOP RU-14
AD8618ARUZ
AD8618ARUZ-REEL
1
Z = Pb-free part.
1
1
1
1
1
1
1
1
1
1
1
1
–40°C to +125°C 5-Lead TSOT-23 UJ-5 BKA
–40°C to +125°C 5-Lead TSOT-23 UJ-5 BKA
1
–40°C to +125°C 5-Lead TSOT-23 UJ-5 BKA
–40°C to +125°C 8-Lead MSOP RM-8
–40°C to +125°C 8-Lead MSOP RM-8
–40°C to +125°C 8-Lead SOIC R-8
–40°C to +125°C 8-Lead SOIC R-8
–40°C to +125°C 8-Lead SOIC R-8
–40°C to +125°C 14-Lead SOIC R-14
–40°C to +125°C 14-Lead SOIC R-14
–40°C to +125°C 14-Lead SOIC R-14
–40°C to +125°C 14-Lead TSSOP RU-14
–40°C to +125°C 14-Lead TSSOP RU-14