ANALOG DEVICES AD8613, AD8617, AD8619 Service Manual

Low Cost Micropower, Low Noise CMOS Rail-to-
www.BDTIC.com/ADI
Rail, Input/Output Operational Amplifiers

FEATURES

Offset voltage: 2.2 mV max Low input bias current: 1 pA max Single-supply operation: 1.8 V to 5 V Low noise: 22 nV/√Hz Micropower: 38 μA No phase reversal Unity gain stable

APPLICATIONS

Battery-powered instrumentation Multipole filters Current shunt sense Sensors ADC predrivers DAC drivers/level shifters Low power ASIC input or output amplifiers

GENERAL DESCRIPTION

The AD8613/AD8617/AD8619 are single, dual, and quad micropower, rail-to-rail input and output amplifiers that feature low supply current, low input voltage, and low current noise.
The parts are fully specified to operate from 1.8 V to 5.0 V
ingle supply, or ±0.9 V and ±2.5 V dual supply. The combination
s of low noise, very low input bias currents, and low power consumption make the AD8613/AD8617/AD8619 especially useful in portable and loop-powered instrumentation.
The ability to swing rail-to-rail at both the input and output
bles designers to buffer CMOS ADCs, DACs, ASICs, and
ena other wide output swing devices in low power, single-supply systems.
The AD8613 is available in a 5-lead SC70 package and a 5-lead TSOT
-23 package. The AD8617 is available in 8-lead MSOP and 8-lead SOIC packages. The AD8619 is available in 14-lead TSSOP and 14-lead SOIC packages.
AD8613/AD8617/AD8619

PIN CONFIGURATIONS

14 13 12 11 10
5
4
8 7 6 5
8 7 6 5
14 13
12
11
10
9 8
V+ OUT B –IN B +IN B
9
8
OUT D –IN D +IN D V– +IN C –IN C OUT C
V+
–IN
V+ OUT B –IN B +IN B
OUT D
–IN D
+IN D V–
+IN C –IN C
OUT C
05622-037
05622-001
05622-002
05622-035
05622-036
1
OUT
+IN
V–
AD8613
TOP VIEW
2
(Not to Scale)
3
Figure 1. 5-Lead SC70 and 5-Lead TSOT-23
1
OUT A
–IN A +IN A
V–
AD8617
2
TOP VIEW
3
(Not toScale)
4
Figure 2. 8-Lead MSOP
1
OUT A
–IN A +IN A
V–
AD8617
2 3
TOP VIEW
(Not to Scale)
4
Figure 3. 8-Lead SOIC_N
1
OUT A
2
–IN A
3
+IN A
V+
+IN B –IN B
OUT B
AD8619
TOP VIEW
4
(Not to Scale)
5
6
7
Figure 4. 14-Lead TSSOP
OUT A
1 2
–IN A +IN A
3
AD8619
TOP VIEW
V+
4
(Not to Scale)
+IN B
5 6
–IN B
OUT B
7
Figure 5. 14-Lead SOIC_N
Rev. B
Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Anal og Devices for its use, nor for any infringements of patents or ot her rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.461.3113 ©2006 Analog Devices, Inc. All rights reserved.
AD8613/AD8617/AD8619
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TABLE OF CONTENTS

Features.............................................................................................. 1
Thermal Resistance.......................................................................5
Applications....................................................................................... 1
General Description ......................................................................... 1
Pin Configurations ........................................................................... 1
Revision History ............................................................................... 2
Specifications..................................................................................... 3
Absolute Maximum Ratings............................................................ 5

REVISION HISTORY

1/06—Rev. A to Rev. B
Added AD8613 ...................................................................Universal
Changes to Features.......................................................................... 1
Changes to Table 1............................................................................ 3
Changes to Table 2............................................................................ 4
Updated Outline Dimensions....................................................... 12
Changes to Ordering Guide.......................................................... 13
ESD Caution...................................................................................5
Typical Performance Characteristics..............................................6
Outline Dimensions....................................................................... 12
Ordering Guide .......................................................................... 13
10/05—Rev. 0 to Rev. A
A
dded AD8619 ...................................................................Universal
Change to Specifications Section ....................................................3
Updated Outline Dimensions....................................................... 12
Changes to Ordering Guide.......................................................... 13
9/05—Revision 0: Initial Version
Rev. B | Page 2 of 16
AD8613/AD8617/AD8619
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SPECIFICATIONS

Electrical characteristics @ VS = 5 V, VCM = VS/2, TA = 25°C, unless otherwise noted.
Table 1.
Parameter Symbol Conditions Min Typ Max Unit
INPUT CHARACTERISTICS
Offset Voltage VOS −0.3 V < VCM < +5.3 V 0.4 2.2 mV
−40°C < TA < +125°C, −0.3 V < VCM < +5.2 V 2.2 mV Offset Voltage Drift VOS/T −40°C < TA < +125°C 1 4.5 µV/°C AD8613 2.5 7.0 µV/°C Input Bias Current IB 0.2 1 pA
−40°C < TA < +85°C 110 pA
−40°C < TA < +125°C 780 pA Input Offset Current IOS 0.1 0.5 pA
−40°C < TA < +85°C 50 pA
−40°C < TA < +125°C 250 pA Common-Mode Rejection Ratio CMRR 0 V < VCM < 5 V 95 dB
−40°C < TA < +125°C 68 dB Large Signal Voltage Gain AVO R
Input Capacitance C C OUTPUT CHARACTERISTICS
Output Voltage High VOH I
−40°C to +125°C 4.9 V
I
−40°C to +125°C 4.50 V
Output Voltage Low VOL I
−40°C to +125°C 50 mV
I
−40°C to +125°C 335 mV
Short-Circuit Current ISC ±80 mA
Closed-Loop Output Impedance Z POWER SUPPLY
Power Supply Rejection Ratio PSRR 1.8 V < VS < 5 V 67 94 dB
−40°C < TA < +125°C 64 dB
Supply Current/Amplifier ISY V
−40°C <TA < +125°C 50 µA DYNAMIC PERFORMANCE
Slew Rate SR RL = 10 kΩ 0.1 V/µs
Settling Time 0.1% t
Gain Bandwidth Product GBP RL = 100 kΩ 400 kHz
R
Phase Margin ØO R NOISE PERFORMANCE
Peak-to-Peak Noise 2.3 3.5 µV
Voltage Noise Density en f = 1 kHz 25 nV/√Hz
f = 10 kHz 22 nV/√Hz
Current Noise Density in f = 1 kHz 0.05 pA/√Hz
1.9 pF
DIFF
2.5 pF
CM
f = 10 kHz, AV = 1 15
OUT
S
= 10 kΩ, 0.5 V < VO < 4.5 V 235 500 V/mV
L
= 1 mA 4.95 4.98 V
L
= 10 mA 4.7 V
L
= 1 mA 20 30 mV
L
= 10 mA 190 275 mV
L
= VS/2 38 µA
O
G = ±1, 2 V step, CL = 20 pF, RL = 1 kΩ 23 s
= 10 kΩ 350 kHz
L
= 10 kΩ, RL = 100 kΩ, CL = 20 pF 70 Degrees
L
Rev. B | Page 3 of 16
AD8613/AD8617/AD8619
www.BDTIC.com/ADI
Electrical characteristics @ VS = 1.8 V, VCM = VS/2, TA = 25°C, unless otherwise noted.
Table 2.
Parameter Symbol Conditions Min Typ Max Unit
INPUT CHARACTERISTICS
Offset Voltage VOS −0.3 V < VCM < +1.9 V 0.4 2.2 mV
−0.3 V < VCM < +1.8 V; −40°C < TA < +125°C 2.2 mV Offset Voltage Drift VOS/T −40°C < TA < +125°C 1 8.5 µV/°C AD8613 3.7 9.0 µV/°C Input Bias Current IB 0.2 1 pA
−40°C < TA < +85°C 110 pA
−40°C < TA < +125°C 780 pA Input Offset Current IOS 0.1 0.5 pA
−40°C < TA < +85°C 50 pA
−40°C < TA < +125°C 250 pA Common-Mode Rejection Ratio CMRR 0 V < VCM < 1.8 V 58 86 dB
−40°C < TA < +125°C 55 dB Large Signal Voltage Gain AVO R
Input Capacitance C C OUTPUT CHARACTERISTICS
Output Voltage High VOH I
−40°C to +125°C 1.6 V
Output Voltage Low VOL I
−40°C to +125°C 80 mV
Short-Circuit Current ISC ±7 mA
Closed-Loop Output Impedance Z POWER SUPPLY
Power Supply Rejection Ratio PSRR 1.8 V < VS < 5 V 67 94 dB
Supply Current/Amplifier ISY V
−40°C <TA < +125°C 50 µA
DYNAMIC PERFORMANCE
Slew Rate SR RL = 10 kΩ 0.1 V/µs
Settling Time 0.1% t
Gain Bandwidth Product GBP RL = 100 kΩ 400 kHz
R
Phase Margin ØO R NOISE PERFORMANCE
Peak-to-Peak Noise 2.3 3.5 µV
Voltage Noise Density en f = 1 kHz 25 nV/√Hz
f = 10 kHz 22 nV/√Hz
Current Noise Density in f = 1 kHz 0.05 pA/√Hz
2.1 pF
DIFF
3.8 pF
CM
f = 10 kHz, AV = 1 15
OUT
S
= 10 kΩ, 0.5 V < VO < 1.3 V 85 1000 V/mV
L
= 1 mA 1.65 1.73 V
L
= 1 mA 44 60 mV
L
= VS/2 38 µA
O
G = ±1, 1 V step, CL = 20 pF, RL = 1 kΩ 6.5 µs
= 10 kΩ 350 kHz
L
= 10 kΩ, RL = 100 kΩ, CL = 20 pF 70 Degrees
L
Rev. B | Page 4 of 16
AD8613/AD8617/AD8619
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ABSOLUTE MAXIMUM RATINGS

TA = 25°C, unless otherwise noted.
Table 3.
Parameter Rating
Supply Voltage 6 V Input Voltage VSS − 0.3 V to VDD + 0.3 V Differential Input Voltage ±6 V Output Short-Circuit Duration to GND Observe derating curve Storage Temperature Range −65°C to +150°C Lead Temperature (Soldering, 60 sec) 300°C Operating Temperature Range −40°C to +125°C Junction Temperature Range −65°C to +150°C
Stresses above those listed under Absolute Maximum Ratings ma
y cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
Absolute maximum ratings apply at 25°C, unless otherwise
d.
note

THERMAL RESISTANCE

θJA is specified for the worst-case conditions, that is, a device soldered in a circuit board for surface-mount packages.
Table 4. Thermal Characteristics
Package Type θJA θ
5-Lead TSOT-23 (UJ-5) 207 61 °C/W 5-Lead SC70 (KS-5) 376 126 °C/W 8-Lead MSOP (RM-8) 210 45 °C/W 8-Lead SOIC_N (R-8) 158 43 °C/W 14-Lead SOIC_N (R-14) 120 36 °C/W 14-Lead TSSOP (RU-14) 180 35 °C/W
Unit
JC

ESD CAUTION

ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although this product features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality.
Rev. B | Page 5 of 16
AD8613/AD8617/AD8619
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TYPICAL PERFORMANCE CHARACTERISTICS

VSY = 5 V or ±2.5 V, unless otherwise noted.
NUMBER OF AMPLIFIERS
1800
1600
1400
1200
1000
800
600
400
200
VSY = 5.5V –0.5V < V T
0
–2000
A
= 25°C
–1700
< +5.5V
CM
–800
–500
–1100
–1400
INPUT OFFSET VOLTAGE (μV)
–200
100
Figure 6. Input Offset Voltage Distribution
400
700
1000
1300
1600
05622-003
1900
400
VSY = 5V AND 1.8V
350
300
250
200
150
100
INPUT BIAS CURRENT (pA)
50
0
25 150
50 75 100 125
TEMPERATURE (°C)
Figure 9. Input Bias Current vs. Temperature
05622-006
40
35
30
25
20
15
NUMBER OF AMPLIFIERS
10
5
0
010
123456789
TCVOS (μV/°C)
–40°C < TA < 125°C V
= 2.5V
CM
05622-004
Figure 7. Input Offset Voltage Drift Distribution
2000
1500
1000
500
0
–500
VSY = 5V T
= 25°C
A
50
TA = 25°C
40
30
20
10
0
05
1234
Figure 10. Supply Current vs. Supply Voltage
50
VSY = ±2.5V,±1.35V, ±0.9V
40
30
20
SUPPLY VOLTAGE (V)
05622-007
–1000
INPUT OFFSET VOLTAGE (μV)
–1500
–2000
0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0
–0.5 5.5
INPUT COMMON-MODE VOLTAGE (V)
Figure 8. Input Offset Voltage vs. Input Common-Mode Voltage
05622-005
10
SUPPLY CURRENT/AMPLIFIER (μA)
0
–40
10205080110
TEMPERATURE (°C)
Figure 11. Supply Current vs. Temperature
Rev. B | Page 6 of 16
05622-008
AD8613/AD8617/AD8619
www.BDTIC.com/ADI
1k
VSY = 5V T
= 25ºC
A
100
10
1
0.1
OUTPUT SATURATION VOLTAGE (mV)
0.01
0.001 10
0.01 0.1 1
SOURCE
LOAD CURRENT (mA)
VSY– V
OH
SINK
V
OL
Figure 12. Output Saturation Voltage vs. Load Current
05622-009
60
50
40
30
20
10
OPEN-LOOP GAIN (dB)
0
VSY = ±2.5V AND ±0.9V
–10
R
= 100kΩ
L
= 20pF
C
L
–20
1k 1M
10k 100k
FREQUENCY (Hz)
Figure 15. Open-Loop Gain and Phase vs. Frequency
135
90
45
φ
M
0
OPEN-LOOP PHASE SHIFT (Degrees)
–45
05622-012
40
VSY = 5V
30
20
10
OUTPUT SATURATION VOLTAGE (mV)
0
–40 125
VSY– VOH @ 1mA
VOL @ 1mA
–25–105 203550658095110
TEMPERATURE (°C)
Figure 13. Output Saturation Voltage vs. Temperature
= 1 mA)
(I
L
350
VSY = 5V
300
250
200
150
100
VDD– VOH @ 10mA
VOL @ 10mA
05622-010
120
100
80
60
CMRR (dB)
40
20
0 100 1M
1k 10k
FREQUENCY (Hz)
VSY = 5V AND 2.7V T
= 25°C
A
100k
Figure 16. CMRR vs. Frequency
120
VSY = ±2.5V AND ±1.35V T
= 25°C
A
100
80
60
PSRR (dB)
40
05622-013
50
OUTPUT SATURATION VOLTAGE (mV)
0
25–105 203550658095110
–40 125
TEMPERATURE (°C)
Figure 14. Output Saturation Voltage vs. Temperature
(I
= 10 mA)
L
05622-011
20
0 100 1M
1k 10k 100k
Figure 17. PSRR vs. Frequency
Rev. B | Page 7 of 16
FREQUENCY (Hz)
05622-014
AD8613/AD8617/AD8619
www.BDTIC.com/ADI
1k
AV = 100
)
100
Ω
AV = 10
10
OUTPUT IMPEDANCE (
1
AV = 1
VOLTAGE (1V/DIV)
VSY = 5V A
= 1
V
= 10kΩ
R
L
= 200pF
C
L
0
100 1M
Figure 18. Closed-Loop Outpu
50
VSY = 5V T
= 25°C
A
45
40
35
30
25
20
15
10
SMALL SIGNAL OVERSHOOT (%)
5
0
10 1000
1k 10k 100k
FREQUENCY (Hz)
t Impedance vs. Frequency
+OS
100
LOAD CAPACITANCE (pF)
VSY = 5V AND 1.8V
–OS
Figure 19. Small Signal Overshoot vs. Load Capacitance
VSY = 5V, 2.7V, 1.8V
= 1
A
V
= 10kΩ
R
L
= 200pF
C
L
05622-015
05622-016
(V)V
V
(mV)
(V)V
V
OUT
–2.5
100
IN
2.5
OUT
TIME (20μs/DIV)
Figure 21. Large Signal Transient Response
0
0
TIME (20μs/DIV)
Figure 22. Positive Overload Recovery
0
VSY = ±2.5V
= –50
A
V
VSY = ±2.5V A
= –50
V
05622-018
05622-019
0
VOLTAGE (50mV/DIV)
TIME (4μs/DIV)
Figure 20. Small Signal Transient Response
05622-017
(mV)
IN
–100
Figure 23. Negative Overload Recovery
Rev. B | Page 8 of 16
TIME (20μs/DIV)
05622-020
AD8613/AD8617/AD8619
www.BDTIC.com/ADI
Hz)
1000
100
VSY = 5V T
= 25ºC
A
V
IN
V
OUT
VOLTAGE (1V/DIV)
VSY = ±2.5V
= 1
A
V
= 10kΩ
R
L
V
= 6V p-p
IN
TIME (20μs/DIV)
Figure 24. No Phase Reversal
VSY = 5V AND 2.7V
VOLTAGE NOISE (1μV/DIV)
TIME (1s/DIV)
Figure 25. 0.1 Hz to 10 Hz Input Voltage Noise
05622-021
05622-022
10
INPUT VOLTAGE NOISE (nV/
1
1 10000
1/F CORNER @ 100Hz
10 100 1000
FREQUENCY (Hz)
Figure 26. Voltage Noise Density
140
120
100
80
60
40
CHANNEL SEPARATION (dB)
20
0 100 1M
1k 10k 100k
FREQUENCY (Hz)
Figure 27. Channel Separation
05622-023
VSY = 5V
05622-024
Rev. B | Page 9 of 16
AD8613/AD8617/AD8619
www.BDTIC.com/ADI
VS = 1.8 V or ±0.9 V, unless otherwise noted.
NUMBER OF AMPLIFIERS
450
VSY = 1.8V 0V < V
< 1.8V
0
T
= 25°C
A
–2000
CM
–1700
–800
–500
–1100
–1400
INPUT OFFSET VOLTAGE (μV)
–200
400
350
300
250
200
150
100
50
Figure 28. Input Offset Voltage Distribution
100
400
700
1000
1300
1600
05622-025
1900
80
VSY = 1.8V
60
VSY–VOH @ 1mA
40
20
OUTPUT SATURATION VOLTAGE (mV)
0
–40 125
25–105 203550658095110
TEMPERATURE (°C)
VOH @ 1mA
Figure 31. Output Saturation Voltage vs. Temperature
= 1 mA)
(I
L
05622-028
2000
VSY = 1.8V
= 25°C
T
A
1500
1000
500
0
–500
–1000
INPUT OFFSET VOLTAGE (μV)
–1500
–2000
–0.5
–0.2 0.1 0.4 0.7 1.0 1.3 1.6 1.9
INPUT COMMON-MODE VOLTAGE (V)
2.2
Figure 29. Input Offset Voltage vs. Input Common-Mode Voltage
1000
VSY = 1.8V
= 25ºC
T
A
100
10
1
0.1
OUTPUT SATURATION VOLTAGE (mV)
0.01
0.001 10
SOURCE
0.01 0.1 1
VSY–V
OH
SINK
V
OL
LOAD CURRENT (mA)
Figure 30. Output Saturation Voltage vs. Load Current
05622-026
05622-027
100
VSY = 1.8V T
= 25°C
A
80
60
CMRR (dB)
40
20
0
100 1M
1k 10k 100k
FREQUENCY (Hz)
Figure 32. CMRR vs. Frequency
120
VSY = 1.8V
= 25°C
T
A
100
80
60
PSRR (dB)
40
20
0
100 1M
1k
FREQUENCY (Hz)
10k
Figure 33. PSRR vs. Frequency
05622-029
05622-030
Rev. B | Page 10 of 16
AD8613/AD8617/AD8619
www.BDTIC.com/ADI
40
30
VSY = 1.8V
= 25°C
T
A
VSY = 1.8V
20
10
SMALL SIGNAL OVERSHOOT (%)
0
10 1k
LOAD CAPACITANCE (pF)
100
–OS
+OS
Figure 34. Small Signal Overshoot vs. Load Capacitance
VSY = 1.8V
= 1
A
V
= 10kΩ
R
L
C
= 200pF
L
VOLTAGE (500mV/DIV)
TIME (20μs/DIV)
Figure 35. Large Signal Transient Response
05622-031
05622-032
VOLTAGE (1μV/DIV)
TIME (1s/DIV)
Figure 36. 0.1 Hz to 10 Hz Input Voltage Noise
1k
VSY = 1.8V T
= 25°C
A
Hz)
100
10
INPUT VOLTAGE NOISE (nV/
1
1 10k
1/F CORNER @ 100Hz
10 100 1k
FREQUENCY (Hz)
Figure 37. Voltage Noise Density
05622-033
05622-034
Rev. B | Page 11 of 16
AD8613/AD8617/AD8619
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OUTLINE DIMENSIONS

3.20
3.00
2.80
8
5
4
SEATING PLANE
5.15
4.90
4.65
1.10 MAX
0.23
0.08
8° 0°
3.20
3.00
1
2.80
PIN 1
0.65 BSC
0.95
0.85
0.75
0.15
0.38
0.00
0.22
COPLANARITY
0.10
COMPLIANT TO JEDEC STANDARDS MO-187-AA
Figure 38. 8-Lead Mini Small Outline Package [MSOP]
(RM-8)
Dim
ensions shown in millimeters
0.80
0.60
0.40
5.00 (0.1968)
4.80 (0.1890)
4.00 (0.1574)
3.80 (0.1497)
0.25 (0.0098)
0.10 (0.0040)
COPLANARITY
0.10
CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
85
1.27 (0.0500) BSC
SEATING
PLANE
COMPLIANT TO JEDEC STANDARDS MS-012-AA
Figure 40. 8-Lead Standard Small Outline Package [SOIC_N]
Dimensions shown in millimeters and (inches)
6.20 (0.2440)
5.80 (0.2284)
41
1.75 (0.0688)
1.35 (0.0532)
0.51 (0.0201)
0.31 (0.0122)
Narrow B
0.25 (0.0098)
0.17 (0.0067)
ody (R-8)
0.50 (0.0196)
0.25 (0.0099)
1.27 (0.0500)
0.40 (0.0157)
× 45°
8.75 (0.3445)
8.55 (0.3366)
4.00 (0.1575)
3.80 (0.1496)
0.25 (0.0098)
0.10 (0.0039)
COPLANARITY
0.10
CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
14 1
1.27 (0.0500) BSC
0.51 (0.0201)
0.31 (0.0122)
COMPLIANT TO JEDEC STANDARDS MS-012-AB
8
6.20 (0.2441)
7
5.80 (0.2283)
SEATING PLANE
1.75 (0.0689)
1.35 (0.0531)
0.25 (0.0098)
0.17 (0.0067)
0.50 (0.0197)
0.25 (0.0098)
8° 0°
1.27 (0.0500)
0.40 (0.0157)
Figure 39. 14-Lead Standard Small Outline Package [SOIC_N]
Narrow B
ody (R-14)
Dimensions shown in millimeters and (inches)
× 45°
5.10
5.00
4.90
14
4.50
4.40
4.30
PIN 1
1.05
1.00
0.80
0.65
BSC
0.15
0.05
COMPLIANT TO JEDEC STANDARDS MO-153-AB-1
0.30
0.19
8
6.40
BSC
71
1.20 MAX
SEATING PLANE
0.20
0.09
COPLANARITY
0.10
8° 0°
0.75
0.60
0.45
Figure 41. 14-Lead Thin Shrink Small Outline Package [TSSOP]
(RU-14)
Dimensions shown in millimeters
Rev. B | Page 12 of 16
AD8613/AD8617/AD8619
www.BDTIC.com/ADI
1.35
1.25
1.15
PIN 1
1.00
0.90
0.70
0
.
1
0
A
M
X
0.10 COPLANARITY
Figure 42. 5-L
2.20
2.00
1.80
2.40
45
123
0.30
0.15
COMPLIANT TO JEDEC STANDARDS MO-203-AA
2.10
1.80
0.65 BSC
1.10
0.80
SEATING PLANE
0.40
0.10
0.22
0.08
ead Thin Shrink Small Outline Transistor Package [SC70]
(KS-5)
Dimensions shown in millimeters
0.46
0.36
0.26
1.60 BSC
PIN 1
*
0.90
0.87
0.84
0.10 MAX
Figure 43. 5-Lead Thin Small Outline Transistor Package [TSOT-23]
2.90 BSC
54
2.80 BSC
123
0.95 BSC
1.90
BSC
*
1.00 MAX
0.50
SEATING PLANE
0.30
*
COMPLIANT TO JEDEC STANDARDS MO-193-AB WITH THE EXCEPTION OF PACKAGE HEIGHT AND THICKNESS.
0.20
0.08 8°
4° 0°
(UJ-5)
Dim
ensions shown in millimeters
0.60
0.45
0.30

ORDERING GUIDE

Model Temperature Range Package Description Package Option Branding
AD8613AKSZ-R2 AD8613AKSZ-REEL AD8613AKSZ-REEL7 AD8613AUJZ-R2 AD8613AUJZ-REEL AD8613AUJZ-REEL7 AD8617ARMZ-R2 AD8617ARMZ-REEL AD8617ARZ AD8617ARZ-REEL AD8617ARZ-REEL7 AD8619ARUZ AD8619ARUZ-REEL AD8619ARZ AD8619ARZ-REEL AD8619ARZ-REEL7
1
Z = Pb-free part.
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
−40°C to +125°C 5-Lead SC70 KS-5 A0Y
−40°C to +125°C 5-Lead SC70 KS-5 A0Y
−40°C to +125°C 5-Lead SC70 KS-5 A0Y
−40°C to +125°C 5-Lead TSOT-23 UJ-5 A0Y
−40°C to +125°C 5-Lead TSOT-23 UJ-5 A0Y
−40°C to +125°C 5-Lead TSOT-23 UJ-5 A0Y
−40°C to +125°C 8-Lead MSOP RM-8 A0T
−40°C to +125°C 8-Lead MSOP RM-8 A0T
−40°C to +125°C 8-Lead SOIC_N R-8
−40°C to +125°C 8-Lead SOIC_N R-8
−40°C to +125°C 8-Lead SOIC_N R-8
−40°C to +125°C 14-Lead TSSOP RU-14
−40°C to +125°C 14-Lead TSSOP RU-14
−40°C to +125°C 14-Lead SOIC_N R-14
−40°C to +125°C 14-Lead SOIC_N R-14
−40°C to +125°C 14-Lead SOIC_N R-14
Rev. B | Page 13 of 16
AD8613/AD8617/AD8619
www.BDTIC.com/ADI
NOTES
Rev. B | Page 14 of 16
AD8613/AD8617/AD8619
www.BDTIC.com/ADI
NOTES
Rev. B | Page 15 of 16
AD8613/AD8617/AD8619
www.BDTIC.com/ADI
NOTES
©2006 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D05622-0-1/06(B)
Rev. B | Page 16 of 16
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