Analog Devices AD8611, AD8612 Service Manual

Ultrafast, 4 ns

+

FEATURES

4 ns propagation delay at 5 V Single-supply operation: 3 V to 5 V 100 MHz input Latch function

APPLICATIONS

High speed timing Clock recovery and clock distribution Line receivers Digital communications Phase detectors High speed sampling Read channel detection PCMCIA cards Zero-crossing detector High speed analog-to-digital converter (ADC) Upgrade for LT1394 and LT1016 designs

Single-Supply Comparators

AD8611/AD8612

PIN CONFIGURATIONS

V+

1

AD8611

IN+

2

3

IN–

TOP VIEW

(Not to Scale)

4

V–

Figure 1. 8-Lead Narrow Body SOIC

V+

1

AD8611

IN+

2

TOP VIEW

IN–

3

(Not to Scale)

4

V–

Figure 2. 8-Lead MSOP

1

QA

2

QA

3

GND

LEA

V–

INA–

INA

AD8612

TOP VIEW

4

(Not to Scale)

5

6

7

Figure 3. 14-Lead TSSOP

(R-8)

(RM-8)

(RU-14)

8

7

6

5

8

7

6

5

QA

GND

LATCH

QA

GND

LATCH

14

QB

13

Q

12

GND

11

LEB

10

V+

9

INB–

8

INB+

06010-001

06010-002

B

06010-003

GENERAL DESCRIPTION

The AD8611/AD8612 are single and dual 4 ns comparators with latch function and complementary output. The latch is not functional if V

Fast 4 ns propagation delay makes the AD8611/AD8612 good choices for timing circuits and line receivers. Propagation delays for rising and falling signals are closely matched and tracked over temperature. This matched delay makes the AD8611/AD8612 good choices for clock recovery because the duty cycle of the output matches the duty cycle of the input.

Rev. A

Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Anal og Devices for its use, nor for any infringements of patents or ot her rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners.

is less than 4.3 V.

CC

The AD8611 has the same pinout as the LT1016 and LT1394, with lower supply current and a wider common-mode input range, which includes the negative supply rail.

The AD8611/AD8612 are specified over the industrial temperature range (−40°C to +85°C). The AD8611 is available in both 8-lead MSOP and narrow 8-lead SOIC surface-mount packages. The AD8612 is available in a 14-lead TSSOP surface-mount package.

AD8611/AD8612

REVISION HISTORY

8/06—Rev. 0 to Rev. A

Updated Format..................................................................Universal

Added No Latch if V

Changes to Pin Names.......................................................Universal

Added Pin Configurations and Function Descriptions Page..... 6

Changes to Table 8.......................................................................... 12

Changes to Figure 26...................................................................... 12

Changes to Ordering Guide.......................................................... 17

< 4.3 V .........................................Universal

CC

Upgrading the LT1394 and LT1016......................................... 10

Maximum Input Frequency and Overdrive............................ 10

Output Loading Considerations............................................... 11

Using the Latch to Maintain a Constant Output.................... 11

Input Stage and Bias Currents .................................................. 11

Using Hysteresis ......................................................................... 11

Clock Timing Recovery............................................................. 12

A 5 V, High Speed Window Comparator................................ 12

Outline Dimensions....................................................................... 16

Ordering Guide .......................................................................... 17

4/00—Revision 0: Initial Version

Rev. A | Page 2 of 20

AD8611/AD8612

SPECIFICATIONS

V+ = 5.0 V, V− = V

Table 1.

Parameter Symbol Conditions Min Typ Max Unit

INPUT CHARACTERISTICS

Offset Voltage VOS 1 7 mV

−40°C ≤ TA ≤ +85°C 8 mV Offset Voltage Drift ΔVOS/ΔT 4 μV/°C Input Bias Current IB VCM = 0 V –6 –4 μA I Input Offset Current IOS VCM = 0 V ±4 μA Input Common-Mode Voltage Range VCM 0.0 3.0 V Common-Mode Rejection Ratio CMRR 0 V ≤ VCM ≤ 3.0 V 55 85 dB Large Signal Voltage Gain AVO RL = 10 kΩ 3000 V/V Input Capacitance CIN 3.0 pF

LATCH ENABLE INPUT

Logic 1 Voltage Threshold VIH VCC > 4.3 V 2.0 1.65 V Logic 0 Voltage Threshold VIL VCC > 4.3 V 1.60 0.8 V Logic 1 Current IIH VCC > 4.3 V, VLH = 3.0 V –1.0 –0.3 μA Logic 0 Current IIL VCC > 4.3 V, VLL = 0.3 V –5 –2.7 μA Latch Enable

Pulse Width t Setup Time tS VCC > 4.3 V 0.5 ns

Hold Time tH VCC > 4.3 V 0.5 ns

DIGITAL OUTPUTS

Logic 1 Voltage VOH IOH = 50 μA, ΔVIN > 250 mV 3.0 3.35 V Logic 1 Voltage VOH IOH = 3.2 mA, ΔVIN > 250 mV 2.4 3.4 V Logic 0 Voltage VOL IOL = 3.2 mA, ΔVIN > 250 mV 0.25 0.4 V

DYNAMIC PERFORMANCE

Input Frequency f Propagation Delay tP 200 mV step with 100 mV overdrive1 4.0 5.5 ns

−40°C ≤ TA ≤ +85°C 5 ns Propagation Delay tP 100 mV step with 5 mV overdrive 5 ns Differential Propagation Delay

(Rising Propagation Delay vs.

Falling Propagation Delay) Rise Time 20% to 80% 2.5 ns Fall Time 80% to 20% 1.1 ns

POWER SUPPLY

Power Supply Rejection Ratio PSRR 4.5 V ≤ V+ ≤ 5.5 V 55 73 dB V+ Supply Current2 I+ 5.7 10 mA

−40°C ≤ TA ≤ +85°C 10 Ground Supply Current2 I

−40°C ≤ TA ≤ +85°C 7 mA V− Supply Current2 I− 2.2 4 mA

−40°C ≤ TA ≤ +85°C 5 mA

1

Guaranteed by design.

2

Per comparator.

= 0 V, TA = 25°C, unless otherwise noted.

GND

−40°C ≤ TA ≤ +85°C –7 –4.5 μA

B

V

PW(E)

400 mV p-p sine wave 100 MHz

MAX

100 mV step with 100 mV overdrive

Δt

P

VO = 0 V, RL = ∞ 3.5 7 mA

GND

> 4.3 V 3 ns

CC

1

0.5 2.0 ns

Rev. A | Page 3 of 20

AD8611/AD8612

V+ = 3.0 V, V− = VGND = 0 V, TA = 25°C, unless otherwise noted.

Table 2.

Parameter Symbol Conditions Min Typ Max Unit

INPUT CHARACTERISTICS

Offset Voltage VOS Input Bias Current IB V

Input Common-Mode Voltage Range VCM Common-Mode Rejection Ratio CMRR 0 V ≤ VCM ≤ 1.0 V 55

OUTPUT CHARACTERISTICS

Output High Voltage VOH I

Output Low Voltage VOL I LATCH ENABLE INPUT Not functional if VCC < 4.3 V POWER SUPPLY

Power Supply Rejection Ratio PSRR 2.7 V ≤ V+ ≤ 6 V

Supply Currents

V+ Supply Current

2

Ground Supply Current

2

V– Supply Current2 I−

DYNAMIC PERFORMANCE

Propagation Delay tP 100 mV step with 20 mV overdrive

1

Output high voltage without pull-up resistor. It may be useful to have a pull-up resistor to V+ for 3 V operation.

2

Per comparator.

3

Guaranteed by design.

= 0 V −6 −4.0

CM

IB −40°C ≤ TA ≤ +85°C −7 −4.5

0

1 7 mV

1.0 V

μA μA

dB

= −3.2 mA, VIN > 250 mV 1.2

OH

= +3.2 mA, VIN > 250 mV

OL

1

V

0.3 V

VO = 0 V, RL = ∞

I+ −40°C ≤ TA ≤ +85°C

46

4.5 6.5 mA

dB

10 mA

I

−40°C ≤ TA ≤ +85°C

GND

2.5 3.5 mA

5.5 mA

−40°C ≤ TA ≤ +85°C

2 3.5 mA

4.8 mA

3

4.5 6.5 ns

Rev. A | Page 4 of 20

AD8611/AD8612

ABSOLUTE MAXIMUM RATINGS

Table 3.

Parameter Rating

Total Analog Supply Voltage 7.0 V Digital Supply Voltage 7.0 V Input Voltage1 ±4 V Differential Input Voltage ±5 V Output Short-Circuit Duration to GND Indefinite Storage Temperature Range

R, RU, RM Packages −65°C to +150°C Operating Temperature Range −40°C to +85°C Junction Temperature Range

R, RU, RM Packages −65°C to +150°C Lead Temperature Range (Soldering, 10 sec) 300°C

1

The analog input voltage is equal to ±4 V or the analog supply voltage,

whichever is less.

Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.

THERMAL RESISTANCE

Table 4.

Package Type θ

8-Lead SOIC (R) 158 43 °C/W 8-Lead MSOP (RM) 240 43 °C/W 14-Lead TSSOP (RU) 240 43 °C/W

1

θJA is specified for the worst-case conditions, that is, a device in socket for

P-DIP and a device soldered in circuit board for SOIC and TSSOP.

1

θ

JA

Unit

JC

ESD CAUTION

ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although this product features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality.

Rev. A | Page 5 of 20

AD8611/AD8612

+

PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS

V+

IN+

IN–

V–

1

AD8611

2

3

TOP VIEW

(Not to Scale)

4

8

7

6

5

QA

GND

LATCH

1

QA

2

QA

3

V–

AD8612

TOP VIEW

4

(Not to Scale)

5

6

7

GND

V+

1

AD8611

IN+

2

TOP VIEW

IN–

3

(Not to Scale)

4

06010-001

V–

8

7

6

5

QA

GND

LATCH

06010-002

LEA

INA–

INA

14

QB

13

Q

B

12

GND

11

LEB

10

V+

9

INB–

8

INB+

Figure 4. 8-Lead Narrow Body SOIC Pin Configuration Figure 5. 8-L ead MS OP Pin Config uration Fig ure 6. 14-Lea d TSSO P Pin C onfigu ration

Table 5. Pin Function Descriptions

Pin No.

SOIC and MSOP

TSSOP Mnemonic Description

1 10 V+ Positive Supply Terminal. 2 IN+ Noninverting Analog Input of the Differential Input Stage. 3 IN− Inverting Analog Input of the Differential Input Stage. 4 5 V− Negative Supply Terminal. 5 LATCH Latch Enable Input. 6 3, 12 GND Negative Logic Supply 7 1 QA One of Two Complementary Output for Channel A. 8 2

QA

One of Two Complementary Output for Channel A.

14 QB One of Two Complementary Output for Channel B. 13

QB

One of Two Complementary Output for Channel B. 4 LEA Channel A Latch Enable. 11 LEB Channel B Latch Enable. 7 INA+ Noninverting Analog Input of the Differential Input Stage for Channel A. 6 INA− Inverting Analog Input of the Differential Input Stage for Channel A. 8 INB+ Noninverting Analog Input of the Differential Input Stage for Channel B. 9 INB− Inverting Analog Input of the Differential Input Stage for Channel B.

06010-003

Rev. A | Page 6 of 20

Analog Devices AD8611, AD8612 Service Manual

FEATURES

APPLICATIONS

PIN CONFIGURATIONS

GENERAL DESCRIPTION

TABLE OF CONTENTS

REVISION HISTORY

SPECIFICATIONS

ABSOLUTE MAXIMUM RATINGS

THERMAL RESISTANCE

ESD CAUTION

PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS