Analog Devices AD8598 Datasheet

Dual 7 ns

a

FEATURES
7 ns Propagation Delay
Single Supply Operation: +3 V to +10 V
Low Power
Symmetrical Layout
Latch Function
TSSOP Packages

APPLICATIONS
Clock Recovery and Clock Distribution
High Speed Data
Line Receivers
Phase Detectors
Digital Communications
I and Q Detection
High Speed Sampling
Upgrade for MAX912
Satellite Receivers
PCMCIA Cards
Wireless Data Links
Battery Operated Instrumentation

Single Supply Comparator

AD8598

PIN CONFIGURATIONS

N-16, RU-16 and R-16A

1

QA

2

QA

3

GND

4

LEA

5

NC

6

V–

7

IN A–

8

IN A+

NC = NO CONNECT

AD8598

TOP VIEW

(Not to Scale)

16

QB

15

QB

14

GND

13

LEB

12

NC

11

V+

10

IN B–

9

IN B+

GENERAL DESCRIPTION

The AD8598 is a dual 7 ns comparator with digital latches.
Separate supplies enable the input stage to be operated from

+5 V to as high as ±5 V.

Ultrafast 7 ns propagation delay makes the AD8598 a good
choice for timing circuits and line receivers. Propagation delays
for rising and falling signals are closely matched and track over
temperature. This matched delay makes the AD8598 a good
choice for clock recovery, since the duty cycle of the output will
match the duty cycle of the input.

The AD8598 has the same pinout as the DIP version of the
AD9698. For a single comparator like the AD8598, please refer
to the AD8561 data sheet.

The AD8598 is specified over the industrial (–40°C to +85°C)

temperature range. The AD8598 is available in both the 16-lead
plastic DIP, 16-lead TSSOP or narrow R-16A surface mount
packages.

REV. A

Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: [phone] World Wide Web Site: http://www.analog.com
Fax: [phone] © Analog Devices, Inc., 1998

AD8598–SPECIFICATIONS

ELECTRICAL SPECIFICATIONS

(@ V+ = +5.0 V, V– = V

= 0 V, TA = +25ⴗC unless otherwise noted)

GND

Parameter Symbol Conditions Min Typ Max Units

INPUT CHARACTERISTICS

Offset Voltage V

OS

–40°C ≤ T

Offset Voltage Drift ∆V

Input Bias Current I

Input Offset Current I
Input Common-Mode Voltage Range V

/∆T4µV/°C

OS

B

I

B

OS

CM

V

= 0 V –6 –3 µA

CM

–40°C ≤ TA ≤ +85°C –7 –3.5 µA

V

= 0 V ±4 µA

CM

Common-Mode Rejection Ratio CMRR 0 V ≤ V

R

Large Signal Voltage Gain A
Input Capacitance C

VO

IN

= 10 kΩ +3,000 V/V

L

≤ +85°C8mV

A

0.0 +3.0 V

≤ +3.0 V 65 85 dB

CM

2.3 7 mV

3.0 pF

LATCH ENABLE INPUT

Logic “1” Voltage Threshold V
Logic “0” Voltage Threshold V
Logic “1” Current I
Logic “0” Current I

IH

IL

IH

IL

V

= +3.0 V –1.0 –0.3 µA

LH

V

= +0.3 V –4 –2 µA

LL

+2.0 +1.65 V

+1.60 +0.8 V

Latch Enable

Pulsewidth t
Setup Time t
Hold Time t

PW(E)

S

H

6ns
1ns

1.2 ns

DIGITAL OUTPUTS

Logic “1” Voltage V
Logic “1” Voltage V
Logic “0” Voltage V

OH

OH

OL

I

= –50 µA, ∆V

OH

I

= –3.2 mA, ∆V

OH

I

= 3.2 mA, ∆V

OL

> 250 mV +3.5 V

IN

> 250 mV +2.4 +3.5 V

IN

> 250 mV +0.25 +0.4 V

IN

DYNAMIC PERFORMANCE␣

Propagation Delay t

Propagation Delay t

P

P

200 mV Step with 100 mV Overdrive 6.75 9.8 ns

–40°C ≤ T

≤ +85°C813ns

A

100 mV Step with 5 mV Overdrive 8 ns

Differential Propagation Delay

(Rising Propagation Delay vs.

Falling Propagation Delay) ∆t

P

100 mV Step with 100 mV Overdrive

1

0.5 2.0 ns

Rise Time 20% to 80% 3.8 ns

Fall Time 80% to 20% 1.5 ns

POWER SUPPLY␣

Power Supply Rejection Ratio PSRR +4.5 V ≤ V+ ≤ +5.5 V 50 65 dB

Positive Supply Current (V+ Pin) I+ 9.0 12.0 mA

Ground Supply Current (GND Pins) I

GND

–40°C ≤ T

VO = 0 V, RL =

–40°C ≤ T

≤ +85°C15.0mA

A

∞

≤ +85°C 7.6 mA

A

4.4 6.6 mA

Analog Supply Current (V– Pin) I– 4.6 9.0 mA

–40°C ≤ TA ≤ +85°C11.0mA

NOTES

1

Guaranteed by design.

Specifications subject to change without notice.

–2– REV. A

AD8598

ELECTRICAL SPECIFICATIONS

(@ V+ = +5.0 V, V

= 0 V, V– = –5 V, TA = +25ⴗC unless otherwise noted)

GND

Parameter Symbol Conditions Min Typ Max Units

INPUT CHARACTERISTICS

Offset Voltage V

OS

–40°C ≤ T

Offset Voltage Drift ∆V

Input Bias Current I

Input Offset Current I
Input Common-Mode Voltage Range V

/∆T4µV/°C

OS

B

I

B

OS

CM

V

= 0 V –6 –3 µA

CM

–40°C ≤ TA ≤ +85°C –7 –2.5 µA

V

= 0 V ±4 µA

CM

Common-Mode Rejection Ratio CMRR –5.0 V ≤ V

R

Large Signal Voltage Gain A
Input Capacitance C

VO

IN

= 10 kΩ +3,000 V/V

L

≤ +85°C8mV

A

–5.0 +3.0 V

≤ +3.0 V 65 85 dB

CM

17 mV

3.0 pF

LATCH ENABLE INPUT

Logic “1” Voltage Threshold V
Logic “0” Voltage Threshold V
Logic “1” Current I
Logic “0” Current I

IH

IL

IH

IL

V

= +3.0 V –1 –0.5 µA

LH

V

= +0.3 V –4 –2 µA

LL

+2.0 +1.65 V

+1.60 +0.8 V

Latch Enable

Pulsewidth t
Setup Time t
Hold Time t

PW(E)

S

H

6ns

1.0 ns

1.2 ns

DIGITAL OUTPUTS

Logic “1” Voltage V
Logic “0” Voltage V

OH

OL

IOH = –3.2 mA +2.6 +3.5 V
IOL = 3.2 mA +0.2 +0.3 V

DYNAMIC PERFORMANCE␣

Propagation Delay t

Propagation Delay t

P

P

200 mV Step with 100 mV Overdrive 6.5 9.8 ns

–40°C ≤ T

≤ +85°C813ns

A

100 mV Step with 5 mV Overdrive 7 ns

Differential Propagation Delay

(Rising Propagation Delay vs.

Falling Propagation Delay) ∆t

P

100 mV Step with 100 mV Overdrive

1

0.5 2 ns

Rise Time 20% to 80% 3.8 ns

Fall Time 80% to 20% 1.5 ns

Dispersion 1ns

POWER SUPPLY

Power Supply Rejection Ratio PSRR ±4.5 V ≤ V

Supply Current V

= 0 V, RL =

O

and V

CC

≤ ±5.5 V 55 70 dB

EE

∞

Positive Supply Current (V+ Pin) I+ 9.4 13.0 mA

≤ +85°C 15.0 mA

A

∞

≤ +85°C 7.6 mA

A

4.4 6.6 mA

Ground Supply Current (GND Pins) I

GND

–40°C ≤ T

VO = 0 V, RL =

–40°C ≤ T

Analog Supply Current (V– Pin) I– 4.8 9.0 mA

–40°C ≤ TA ≤ +85°C 11.0 mA

NOTES

1

Guaranteed by design.

Specifications subject to change without notice.

–3–REV. A

AD8598–SPECIFICATIONS

WARNING!

ESD SENSITIVE DEVICE

ELECTRICAL SPECIFICATIONS

(@ V+ = +3.0 V, V– = V

= 0 V, TA = +25ⴗC unless otherwise noted)

GND

Parameter Symbol Conditions Min Typ Max Units

INPUT CHARACTERISTICS␣

Offset Voltage V
Input Bias Current I

Input Common-Mode Voltage Range V

OS

B

I

B

CM

V

= 0 V –6 –3.0 µA

CM

–40°C ≤ TA ≤ +85°C–7–4µA

0 +1.5 V

7mV

Common-Mode Rejection Ratio CMRR +0.1 V ≤ VCM ≤ +1.5 V 50 dB

OUTPUT CHARACTERISTICS␣

Output High Voltage
Output Low Voltage V

1

V

OH

OL

IOH = –3.2 mA, VIN > 250 mV +1.2 V
IOL = +3.2 mA, VIN > 250 mV +0.3 V

POWER SUPPLY␣

Power Supply Rejection Ratio PSRR +2.7 V ≤ V

Supply Currents V

= 0 V, RL =

O

, V

≤ +6 V 40 dB

CC

EE

∞

Positive Supply Current (V+ Pin) I+ 8.0 9.0 mA

≤ +85°C11.0mA

A

3.2 5.0 mA

≤ +85°C 6.0 mA

A

Ground Supply Current (GND Pins) I

–40°C ≤ T

GND

–40°C ≤ T

Analog Supply Current (V– Pin) I– 4.8 6.6 mA

–40°C ≤ TA ≤ +85°C 7.6 mA

DYNAMIC PERFORMANCE␣

Propagation Delay t

NOTES

1

Output high voltage without pull-up resistor. It may be useful to have a pull-up resistor to V+ for +3 V operation.

2

Guaranteed by design.

Specifications subject to change without notice.

P

100 mV Step with 20 mV Overdrive

2

8.5 9.8 ns

ABSOLUTE MAXIMUM RATINGS

Total Analog Supply Voltage . . . . . . . . . . . . . . . . . . . . . +14 V

Digital Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . +7 V

Analog Positive Supply–Digital Positive Supply . . . . . –600 mV

Input Voltage

1

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±7 V

Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . ±8 V

Output Short-Circuit Duration to GND . . . . . . . . . Indefinite

Storage Temperature Range

N, R, RU Package . . . . . . . . . . . . . . . . . . –65°C to +150°C

Operating Temperature Range . . . . . . . . . . . –40°C to +85°C

Junction Temperature Range

Package Type ␪

16-Lead Plastic DIP 103 43 °C/W
16-Lead SOIC 158 43 °C/W
16-Lead TSSOP 240 43 °C/W

NOTES

1

The analog input voltage is equal to ±7 V or the analog supply voltage, whichever

is less.

2

θJA is specified for the worst case conditions, i.e., θ

for P-DIP and θ

TSSOP packages.

is specified for device soldered in circuit board for SOIC and

JA

N, R, RU Package . . . . . . . . . . . . . . . . . . –65°C to +150°C

Lead Temperature Range (Soldering, 10 sec) . . . . . . . +300°C

ORDERING GUIDE

Temperature Package Package

Model Range Descriptions Options

AD8598AN –40°C to +85°C 16-Lead Plastic DIP N-16
AD8598ARU –40°C to +85°C 16-Lead Thin Shrink Small Outline (TSSOP) RU-16
AD8598AR –40°C to +85°C 16-Lead Narrow Body IC R-16A

CAUTION

ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection.
Although the AD8598 features proprietary ESD protection circuitry, permanent damage may
occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD
precautions are recommended to avoid performance degradation or loss of functionality.

–4– REV. A

2

JA

␪

JC

is specified for device in socket

JA

Units