Analog Devices AD8563 Service Manual

1.8 V to 5 V Auto-Zero,

In-Amp with Shutdown

Preliminary Technical Data

FEATURES

Low offset voltage: 25 μV max
Low input offset drift: 0.1 μV/°C max
High CMR: 120 dB min @ G = 100
Low noise: 0.7 μV p-p from 0.01 Hz to 10 Hz
Wide gain range: 1 to 10,000
Single-supply operation: +2.7 V to +5.5 V
Rail-to-rail output
Shutdown capability

−40°C to +125°C operation

APPLICATIONS

Strain gauge
Weigh scales
Pressure sensors
Laser diode control loops
Portable medical instruments
Thermocouple amplifiers

AD8563

PIN CONFIGURATION

1

RGA

2

P

VIN

VCC

VFB

AD8563

3

T O P

4

VO

(Not to Scale)

5

Figure 1. 10-Lead MSOP

VIEW

10

9
8

7
6

RGB

VINN

GND
V

REF

ENABLE

GENERAL DESCRIPTION

The AD85631 is a precision instrumentation amplifier featuring
low noise, rail-to-rail output and a power-saving shutdown
mode. The AD8563 also features low offset voltage and drift
coupled with high common-mode rejection. In shutdown
mode, the total supply current is reduced to less than 4 µA.
The AD8563 is capable of operating from 2.7 V to 5.5 V.

With a low offset voltage of 30 µV, an offset voltage drift of

0.5 µV/°C, and a voltage noise of only 1 µV p-p (0.01 Hz to
10 Hz), the AD8563 is ideal for applications where error sources
cannot be tolerated. Precision instrumentation, position and
pressure sensors, medical instrumentation, and strain gauge
amplifiers benefit from the low noise, low input bias current,
and high common-mode rejection. The small footprint and low
cost are ideal for high volume applications.

The small package and low power consumption allow
maximum channel density and minimum board size for
space-critical equipment and portable systems.

The AD8563 is specified over the industrial temperature range
from −40°C to +125°C. The AD8563 is available in a Pb-free,
10-lead MSOP.

1

Patent pending.

Rev. PrA

Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Anal og Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: [phone] www.analog.com
Fax: [phone] © 2006 Analog Devices, Inc. All rights reserved.

AD8563 Preliminary Technical Data

TABLE OF CONTENTS

Features.............................................................................................. 1

Gain Selection (Gain-Setting Resistors).....................................7

Applications....................................................................................... 1

Pin Configuration............................................................................. 1

General Description ......................................................................... 1

Revision History ............................................................................... 2

Specifications..................................................................................... 3

Electrical Characteristics ............................................................. 3

Absolute Maximum Ratings............................................................ 5

Thermal Resistance ...................................................................... 5

ESD Caution.................................................................................. 5

Typical Performance Characteristics ........ Error! Bookmark not

defined.

Theory of Operation ........................................................................ 6

Applications....................................................................................... 7

High PSR and CMR ..................................................................... 6

1/f Noise Correction .................................................................... 6

Reference Connection ..................................................................7

Disable Function ...........................................................................7

Output Filtering.............................................................................7

Clock Feedthrough........................................................................7

Low Impedance Output................................................................7

Maximizing Performance Through Proper Layout..................8

Power Supply Bypassing...............................................................8

Input Overvoltage Protection......................................................8

Capacitive Load Drive ..................................................................8

Circuit Diagrams/Connections...................................................9

Outline Dimensions....................................................................... 13

Ordering Guide............................................................................... 13

REVISION HISTORY

06/06—Revision PrA: Initial Version

Rev. PrA | Page 2 of 15

Preliminary Technical Data AD8563

SPECIFICATIONS

ELECTRICAL CHARACTERISTICS

VCC = 5.0 V, VCM = 2.5 V, V
resistor values. Temperature specifications guaranteed by characterization.

Table 1.

Parameter Symbol Conditions Min Typ Max Unit

INPUT CHARACTERISTICS

Input Offset Voltage VOS G = 1000 25 μV
G = 100 25 μV
G = 10 50 μV
G = 1 350 μV
vs. Temperature ΔVOS/

G = 100, −40°C ≤ TA ≤ +125°C 0.01 0.1 μV/°C
G = 10, −40°C ≤ TA ≤ +125°C 0.1 0.3 μV/°C
G = 1, −40°C ≤ TA ≤ +125°C 0.7 3 μV/°C

Input Bias Current IB 0.3 1 nA

−40°C ≤ TA ≤ +125°C 2 nA
Input Offset Current IOS 2 nA
VREF Pin Current I
Input Operating Impedance

Differential 75||2 MΩ||pF

Common Mode 100||2 MΩ||pF
Input Voltage Range 0 3.0 V
Common-Mode Rejection CMR G = 100, VCM = 0 V to 2.85 V 120 140 dB
G = 100, VCM = 0 V to 2.85 V, −40°C ≤ TA ≤ +125°C 105 140
G = 10, VCM = 0 V to 2.85 V, −40°C ≤ TA ≤ +125°C 100 120 dB
Gain Error G = 100, VCM = 12.125 mV, VO = 0.075 V to 4.925 V 0.25 %

G = 10, VCM = 121.25 mV , VO = 0.075 V to 4.925 V 0.5 %

Gain Drift G = 1, 10, 100, 1000, −40°C ≤ TA ≤ +125°C 50 ppm/°C
Nonlinearity G = 100, VCM = 12.125 mV, VO = 0.075 V to 4.925 V 0.006 % FS
G = 10, VCM = 121.25 mV, VO = 0.075 V to 4.925 V 0.035 % FS
V

Range 0.9 4.1 V

REF

OUTPUT CHARACTERISITICS

Output Voltage High VOH 4.925 V
Output Voltage Low VOL 0.075 V
Short-Circuit Current ISC ±35 mA

POWER SUPPLY

Power Supply Rejection PSR G = 100, VS = 2.7 V to 5.5 V, VCM = 0 V 100 120 dB
G = 10, VS = 2.7 V to 5.5 V, VCM = 0 V 90 106 dB
Supply Current ISY I

−40°C ≤ TA ≤ +125°C 1.5 mA
Supply Current Shutdown Mode ISD 2 4 μA

ENABLE INPUTS

Logic High Voltage 2.40 V
Logic Low Voltage 0.80 V

NOISE PERFORMANCE

Voltage Noise e
Voltage Noise Density en G = 100, f = 1 kHz 35 nV/√Hz
G = 10, f = 1 kHz 150 nV/√Hz
Internal Clock Frequency 40 kHz
Signal Bandwidth1 G = 1 to 1000 1 kHz

1

Higher bandwidths result in higher noise.

= VCC/2, VIN = V

REF

ΔT

REF

− V

, R

INP

INN

= 10 kΩ, TA = 25°C, G = 100, unless specified. See Table 5 for gain setting

LOAD

G = 1000, −40°C ≤ TA ≤ +125°C 0.01 0.1 μV/°C

0.02 1 nA

= 0 mA, VIN = 0 V 1.1 1.3 mA

O

f = 0.01 Hz to 10 Hz 0.7 μV p-p

n p-p

Rev. PrA | Page 3 of 15

AD8563 Preliminary Technical Data

VS = 2.7 V, VCM = -0 V, V
resistor values. Temperature specifications guaranteed by characterization.

Table 2.

Parameter Symbol Conditions Min Typ Max Unit

INPUT CHARACTERISTICS

Input Offset Voltage VOS G = 1000 30 μV
G = 100 30 μV
G = 10 60 μV
G = 1 500 μV
Vs. Temperature ΔVOS/

G = 100, −40°C ≤ TA ≤ +125°C 0.1 0.5 μV/°C
G = 10, −40°C ≤ TA ≤ +125°C 3 μV/°C
G = 1, −40°C ≤ TA ≤ +125°C 10 μV/°C

Input Bias Current IB 0.3 1 nA

−40°C ≤ TA ≤ +125°C 2 nA
Input Offset Current IOS 2 nA
VREF Pin Current I

Input Operating Impedance
Differential 75||2 MΩ||pF

Common Mode 100||2 MΩ||pF
Input Voltage Range 0 0.7 V
Common-Mode Rejection CMR G = 100, VCM = 0 V to 0.7 V 100 110 dB
G = 100, VCM = 0 V to 0.7 V, −40°C ≤ TA ≤ +125°C 86
G = 10, VCM = 0 V to 0.7 V 86 95 dB
Gain Error G = 100, VCM =4.125 mV, VO = 0.075 V to 2.625 V 0.2 0.35 %

G = 10, VCM = 41.25 mV, VO = 0.075 V to 2.625 V 0.2 0.5 %

Gain Drift G = 1, 10, 100, 1000, −40°C ≤ TA ≤ +125°C 50 ppm/°C
Nonlinearity G = 100, VCM = 4.125 mV, VO = 0.075 V to 2.625 V 0.015 % FS
G = 10, VCM = 41.25 mV, VO = 0.075 V to 2.625 V 0.015 % FS
V

Range 0.9 1.8 V

REF

OUTPUT CHARACTERISITICS

Output Voltage High VOH 2.625 V
Output Voltage Low VOL 0.075 V
Short-Circuit Current ISC ±5 mA

POWER SUPPLY

Power Supply Rejection PSR G = 100, VS = 2.7 V to 5.5 V, VCM = 0 V 100 120 dB
Supply Current ISY I

−40°C ≤ TA ≤ +125°C 1.4 mA
Supply Current Shutdown Mode ISD 2 4 μA

ENABLE INPUTS

Logic High Voltage 1.4 V
Logic Low Voltage 0.5 V

NOISE PERFORMANCE

Voltage Noise e
Voltage Noise Density en G = 100, f = 1 kHz 45 nV/√Hz
G = 10, f = 1 kHz 180 nV/√Hz
Internal Clock Frequency 40 kHz
Signal Bandwidth1 G = 1 to 1000 1 kHz

1

Higher bandwidths result in higher noise.

= VS/2, VIN = V

REF

− V

, R

INP

INN

= 10 kΩ, TA = 25°C, G = 100, unless specified. See Table 5 for gain setting

LOAD

G = 1000, −40°C ≤ TA ≤ +125°C 0.1 0.5 μV/°C

ΔT

0.02 1 nA

REF

= 0 mA, VIN = 0 V 0.9 1.2 mA

O

f = 0.01 Hz to 10 Hz 1 μV p-p

n p-p

Rev. PrA | Page 4 of 15

Preliminary Technical Data AD8563

ABSOLUTE MAXIMUM RATINGS

Table 3.

Parameter Ratings

Supply Voltage 6 V
Input Voltage +V
Differential Input Voltage1 ±V

SUPPLY

SUPPLY

Output Short-Circuit Duration to GND Indefinite
Storage Temperature Range (RM Package) −65°C to +150°C
Operating Temperature Range −40°C to +125°C
Junction Temperature Range (RM Package) −65°C to +150°C
Lead Temperature Range (Soldering, 10 sec) 300°C

1

Differential input voltage is limited to ±5.0 V, the supply voltage, or

whichever is less.

Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.

THERMAL RESISTANCE

θ JA is specified for the worst-case conditions, that is, a device
soldered in a circuit board for surface-mount packages.

Table 4.

Package Type θ

10-Lead MSOP (RM) 110 32.2 °C/W

1

θJA is specified for the nominal conditions, that is, θJA is specified for the

device soldered on a circuit board.

1

θJC Unit

JA

ESD CAUTION

ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on
the human body and test equipment and can discharge without detection. Although this product features
proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy
electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance
degradation or loss of functionality.

Rev. PrA | Page 5 of 15

AD8563 Preliminary Technical Data

THEORY OF OPERATION

The AD8563 is a precision current-mode correction
instrumentation amplifier capable of single-supply operation.
The current-mode correction topology results in excellent
accuracy, without the need for trimmed resistors on the die.

Figure 2 shows a simplified diagram illustrating the basic
operation of the AD8563 (without correction). The circuit
consists of a voltage-to-current amplifier (M1 to M6), followed
by a current-to-voltage amplifier (R2 and A1). Application of a
differential input voltage forces a current through External
Resistor R1, resulting in conversion of the input voltage to a
signal current. Transistor M3 to Transistor M6 transfer twice
this signal current to the inverting input of the op amp A1.
Amplifier A1 and External Resistor R2 form a current-to­voltage converter to produce a rail-to-rail output voltage at

.

V

OUT

Op amp A1 is a high precision, auto-zero amplifier. This
amplifier preserves the performance of the autocorrecting,
current-mode amplifier topology while offering the user a true
voltage-in, voltage-out instrumentation amplifier. Offset errors
are corrected internally.

An external reference voltage is applied to the non-inverting
input of A1 to set the output reference level. External Capacitor
C2 filters out correction noise.

HIGH PSR AND CMR

Common-mode rejection and power supply rejection indicate
the amount that the offset voltage of an amplifier changes when
its common-mode input voltage or power supply voltage changes.
The auto-correction architecture of the AD8563 continuously
corrects for offset errors, including those induced by changes in
input or supply voltage, resulting in exceptional rejection
performance. The continuous auto-correction provides great
CMR and PSR performances over the entire operating
temperature range (−40°C to +125°C).

The parasitic resistance in series with R2 does not degrade
CMR but causes a small gain error and a very small offset error.
Therefore, an external buffer amplifier is not required to drive
the V
helps reduce system costs over conventional instrumentation
amplifiers.

pin to maintain excellent CMR performance. This

REF

1/f NOISE CORRECTION

Flicker noise, also known as 1/f noise, is noise inherent in the
physics of semiconductor devices and decreases 10 dB per
decade. The 1/f corner frequency of an amplifier is the frequency
at which the flicker noise is equal to the broadband noise of the
amplifier. At lower frequencies, flicker noise dominates causing
large errors in low frequency or dc applications.

The pin out of the AD8563 allows the user to access the signal
current from the output of the voltage-to-current converter
(Pin 5). The user can choose to use the AD8563 as a current­output device instead of a voltage-output device. See Figure 7
for circuit connections.

Flicker noise is effectively visible as a slowly varying offset error,
which the auto-correction topology of the AD8563 reduces. This
allows the AD8563 to have lower noise near dc than standard
low noise instrumentation amplifiers.

Rev. PrA | Page 6 of 15

Preliminary Technical Data AD8563

APPLICATIONS

GAIN SELECTION (GAIN-SETTING RESISTORS)

The gain of the AD8563 is set according to

G = 2 × (R2/R1) (1)

Table 5 lists the recommended resistor values. Resistor R1 must
be at least 3.92 k for proper operation. The use of resistors
larger than the recommended values results in higher offset and
higher noise.

Gain accuracy depends on the matching of R1 and R2. Any
mismatch in resistor values results in a gain error. Resistor
value errors due to drift will affect gain by the amount indicated
by Equation 1. However, due to the current-mode operation of
the AD8563, a mismatch in R1 and R2 does not degrade the
CMR.

Take care when selecting and positioning the gain setting
resistors. The resistors should be made of the same material and
package style. Surface-mount resistors are recommended. They
should be positioned as close together
as possible to minimize TC errors.

To maintain good CMR vs. frequency, the parasitic capacitance
on the R1 gain setting pins should be minimized and matched.
This also helps maintain a low gain error at G < 10.

If resistor trimming is required to set a precise gain, trim
Resistor R2 only. Using a potentiometer for R1 degrades the
amplifier’s performance.

REFERENCE CONNECTION

Unlike traditional three op amp instrumentation amplifiers,
parasitic resistance in series with V
CMR performance. This allows the AD8563 to attain its extremely
high CMR performance without the use of an external buffer
amplifier to drive the V
standard instrumentation amplifiers. This helps save valuable
printed circuit board space and minimizes system costs.

For optimal performance in single-supply applications, V
should be set with a low noise precision voltage reference.
However, for a lower system cost, the reference voltage can be
set with a simple resistor voltage divider between the supply and
ground (see Figure 3). This configuration results in degraded
output offset performance if the resistors deviate from their
ideal values. In dual-supply applications, V
to ground.

The V
external buffer is not required.

pin current is approximately 20 pA, and as a result, an

REF

pin, which is required by industry-

REF

(Pin 7) does not degrade

REF

can be connected

REF

REF

DISABLE FUNCTION

The AD8563 provides a shutdown function to conserve power
when the device is not needed. Although there is a 1 µA pull-up
current on the ENABLE pin, Pin 6 should be connected to the
positive supply for normal operation and to the negative supply
to turn the device off. It is not recommended to leave Pin 6
floating.

Turn-on time upon switching Pin 6 high is dominated by the
output filters. When the device is disabled, the output becomes
high impedance, enabling a multiplexing application of multiple
AD8563 instrumentation amplifiers.

OUTPUT FILTERING

Filter Capacitor C2 is required to limit the amount of switching
noise present at the output. The recommended bandwidth of
the filter created by C2 and R2 is 1.4 kHz. The user should first
select R1 and R2 based on the desired gain, then select C2 based on

C2 = 1/(1400 × 2 × π × R2) (2)

Addition of another single-pole RC filter of 1.4 kHz on the
output (R3 and C3 in Figure 3 to Figure 5) is required for
bandwidths greater than 10 Hz. These two filters produce an
overall bandwidth of 1 kHz.

When driving an ADC, the recommended values for the second
filter are R3 = 100 Ω and C3 = 1 µF. This filter is required to
achieve the specified performance. It also acts as an anti­aliasing filter for the ADC. If a sampling ADC is not being
driven, the value of the capacitor can be reduced, but the filter
frequency should remain unchanged.

For applications with low bandwidths (<10 Hz), only the first
filter is required. In this case, the high frequency noise from the
auto-zero amplifier (output amplifier) is not filtered before the
following stage.

CLOCK FEEDTHROUGH

The AD8563 uses two synchronized clocks to perform the auto­correction. The input voltage-to-current amplifiers are
corrected at 60 kHz.

Trace amounts of these clock frequencies can be observed at the
output. The amount of feedthrough is dependent upon the gain,
because the auto-correction noise has an input and output
referred term. The correction feedthrough is also dependent
upon the values of the external filters R2/C2, and R3/C3.

LOW IMPEDANCE OUTPUT

For applications where a low output impedance is required, the
circuit in Figure 5 should be used. This provides the same
filtering performance as shown in the configuration in Figure 6.

Rev. PrA | Page 7 of 15

AD8563 Preliminary Technical Data

V

MAXIMIZING PERFORMANCE THROUGH PROPER
LAYOUT

To achieve the maximum performance of the AD8563, care
should be taken in the circuit board layout. The PC board
surface must remain clean and free of moisture to avoid leakage
currents between adjacent traces. Surface coating of the circuit
board reduces surface moisture and provides a humidity barrier,
reducing parasitic resistance on the board.

Care must be taken to minimize parasitic capacitance on Pin 1
and Pin 10 (Resistor R1 connections). Traces from Pin 1 and
Pin 10 to R1 should be kept short and symmetric. Excessive
capacitance on these pins will result in a gain error. This effect
is most prominent at low gains (G < 10).

For high impedance sources, the PC board traces from the
AD8563 inputs should be kept to a minimum to reduce input
bias current errors.

POWER SUPPLY BYPASSING

The AD8563 uses internally generated clock signals to perform
the auto-correction. As a result, proper bypassing is necessary
to achieve optimum performance. Inadequate or improper
bypassing of the supply lines can lead to excessive noise and
offset voltage.

For single-supply operation, a 0.1 µF surface-mount capacitor
should be connected from the supply line to ground.

All bypass capacitors should be positioned as close to the DUT
supply pins as possible, especially the bypass capacitor between
the supplies. Placement of the bypass capacitor on the back of
the board directly under the DUT is preferred.

INPUT OVERVOLTAGE PROTECTION

All terminals of the AD8563 are protected against ESD. In the
case of a dc overload voltage beyond either supply, a large
current would flow directly through the ESD protection diodes.
If such a condition should occur, an external resistor should be
used in series with the inputs to limit current for voltages
beyond the supply rails. The AD8563 can safely handle 5 mA of
continuous current, resulting in an external resistor selection of

= (VIN − VS)/5 mA.

R

EXT

CAPACITIVE LOAD DRIVE

The output buffer, Pin 4, can drive capacitive loads up to 100 pF.

A 0.1 µF surface-mount capacitor should be connected between
the supply lines. This capacitor is necessary to minimize ripple
from the correction clocks inside the IC. For dual-supply
operation (see Figure 5), a 0.1 µF (ceramic) surface-mount
capacitor should be connected from each supply pin to ground.

CC

V

M5

INN

I – I

R1

M3 M4

I

I

V

INP

M1

2I 2I

EXTERNAL

R1

– V

INN

I

)

M2

R1

(V

INP

=

R1

Figure 2. Simplified AD8563 Schematic

M6

I – I

I + I

V

R1

R1

BIAS

C2

R2

2I

R1

= V

V

A1

V

REF

OUT

REF

2R2

V

– V

INP

+

R2

INN

05474-030

Rev. PrA | Page 8 of 15

Preliminary Technical Data AD8563

V

V

A

A

CIRCUIT DIAGRAMS/CONNECTIONS

S+

0.1µF

GND

3

V

IN+

R1

V

IN–

2

+

1

AD8553

D8563

10

–

9

8

GND

100kΩ

100kΩ

V

S+

6

4

5

7

R2

C2

0.1µF

R3

100Ω

R3 AND C3 VALUES ARE
RECOMMENDED T O DRIVE
AN A/D CONVERTER

GND

C3
1µF

V

OUT

GND

05474-032

Figure 3. Single-Supply Connection Diagram Using Voltage Divider Reference

S+

0.1µF

GND

V

IN+

V

IN–

0.1µF

V

S–

2

3

+

1

R1

0.1µF

D8563

AD8553

10

–

8

9

VS–

GND

6

4

5

7

R2

C2

R3

100Ω

R3 AND C3 VALUES ARE
RECOMMENDED T O DRIVE
AN A/D CONVERTER

GND

C3
1µF

V

OUT

05474-031

Figure 4. Dual-Supply Connection Diagram

Rev. PrA | Page 9 of 15

AD8563 Preliminary Technical Data

V

V

A

A

S+

0.1µF

GND

V

IN+

V

IN–

0.1µF

V

S–

3

2

+

GND

6

5

7

R3

100Ω

4

C2

GND

R2

R3 AND C3 VALUES ARE
RECOMMENDED T O DRIVE
AN A/D CONVERTER

C3
1µF

V

OUT

05474-034

1

R1

0.1µF

AD8553

D8563

10

–

8

9

VS–

GND

Figure 5. Dual-Supply Connection Diagram with Low Impedance Output

S+

0.1µF

GND

2

V

IN+

R1

10

V

IN–

3

+

1

AD8553

D8563

–

8

9

V

S–

6

4

5

7

R2

C2

R3

100Ω

R3 AND C3 VALUES ARE
RECOMMENDED T O DRIVE
AN A/D CONVERTER

GND

C3
1µF

V

OUT

V

CC

1.0µF

0.1µF

V

IN

V

OUT

GND

Figure 6. Dual-Supply Connection Diagram Using IC Voltage Reference

05474-035

Rev. PrA | Page 10 of 15

Preliminary Technical Data AD8563

V

V

A

A

S+

2

IN

1

R1

10
9

+

AD8553

_

3

D8563

8

V

S–

Figure 7. Voltage-to-Current Converter, 0 μA to 30 μA Source

V

S+

2

3

+

1

AD8553

R1

D8563

10

9

_

Figure 8. Example of an AD8563 Driving a Converter at V

7

5

8

6

7

4

NC (NO CONNECT)

V

IN

5

0.1µF

6

4

V

REF

C2

R2

10kΩ

= 2.5V

100Ω

IO=

R1

A

AMMETER

= 5 V

S+

1µF

05474-037

A/D

A/D

CONVERTER

05474-038

Rev. PrA | Page 11 of 15

AD8563 Preliminary Technical Data

A

A

A

V

S+

LOGIC

2

3

+

1

AD8553

D8563

R1

10

9

2
1

R6

10

9

_

+

AD8553

_

8

V

V

S+

3

D8563

8

6

V

7

5

S–

6

7

5

REF

4

C2

R2

V

REF

4

C3

R7

R3

100Ω

R8

100Ω

1µF

V

OUT

V

S+

6

V

7

5

REF

4

C4

R12

R13

100Ω

05474-039

R11

10

2
1

9

+

AD8553

_

3

D8563

8

Figure 9. Multiplexed Output

Table 5. Recommended External Component Values for Selected Gains

Desired Gain (V/V) R1 (Ω) R2 || C2 (Ω || F) Calculated Gain

1 200 k 100 k || 1200p 1
2 100 k 100 k || 1200p 2
5 40.2 k 100 k || 1200p 4.975
10 20 k 100 k || 1200p 10
50 4.02 k 100 k || 1200p 49.75
100 3.92 k 196 k || 560p 100
500 3.92 k 976 k || 120p 497.95
1000 3.92 k 1.96 M || 56p 1000

Rev. PrA | Page 12 of 15

Preliminary Technical Data AD8563

OUTLINE DIMENSIONS

3.10

3.00

2.90

6

10

3.10

3.00

2.90

1

PIN 1

0.50 BSC

0.95

0.85

0.75

0.15

0.05

0.33

0.17

COPLANARITY

0.10

COMPLIANT TO JEDEC STANDARDS MO-187-BA

Figure 10. 10-Lead Mini Small Outline Package [MSOP]

5.15

4.90

4.65

5

1.10 MAX

SEATING
PLANE

0.23

0.08

(RM-10)

Dimensions shown in millimeters

8°
0°

0.80

0.60

0.40

ORDERING GUIDE

Model Temperature Range Package Description Package Option Branding

AD8563ARMZ-R21 −40°C to +125°C 10-Lead MSOP RM-10 A09
AD8563ARMZ-REEL1 −40°C to +125°C 10-Lead MSOP RM-10 A09

1

Z = Pb-free part.

Rev. PrA | Page 13 of 15

AD8563 Preliminary Technical Data

NOTES

Rev. PrA | Page 14 of 15

Preliminary Technical Data AD8563

NOTES

©2006 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.

PR06202-0-6/06(PrA)

Rev. PrA | Page 15 of 15