Analog Devices AD8557 Service Manual

Digitally Programmable Sensor Signal Amplifier

A

V

VC

VPOS

V

A

VNEG

Preliminary Technical Data

FEATURES

Very low offset voltage: 10 μV max over temperature Very low input offset voltage drift: 50 nV/°C max High CMRR: 96 dB min Digitally programmable gain and output offset voltage Gain Range from 28 to 1300 Single-wire serial interface Stable with any capacitive load SOIC_N and LFCSP_VQ packages

2.7 V to 5.5 V operation

FUNCTIONAL BLOCK DIAGRAM

1

VSS

R4

R1

P1

P3

AD8557

APPLICATIONS

Automotive sensors Pressure and position sensors Precision current sensing Thermocouple amplifiers Industrial weigh scales Strain gages

DD

LAMP

4

R6

SS

VDD

R3

DD 2

SS

P2

R2

VDD

DAC

VSS

R5

P4

Rev.PrC

Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners.

3

Figure 1.

OUT

AD8557 Preliminary Technical Data

TABLE OF CONTENTS

Specifications..................................................................................... 4

Absolute Maximum Ratings....... Error! Bookmark not defined.

Thermal Resistance ................. Error! Bookmark not defined.

ESD Caution............................. Error! Bookmark not defined.

Pin Configurations and Function Descriptions ........................... 7

Typical Performance Characteristics ............................................. 8

Theory of Operation ...................................................................... 10

REVISION HISTORY

XXXX—Revision 0: Initial Version

Gain Values ................................................................................. 11

Open Wire Fault Detection....................................................... 12

Shorted Wire Fault Detection................................................... 12

Floating VPOS, VNEG, or VCLAMP Fault Detection ......... 12

Device Programming................................................................. 12

Outline Dimensions....................................................................... 17

Ordering Guide .......................................................................... 17

Rev. PrC | Page 2 of 19

Preliminary Technical Data AD8557

GENERAL DESCRIPTION

The AD8557 is a zero-drift, sensor signal amplifier with digitally programmable gain and output offset. Designed to easily and accurately convert variable pressure sensor and strain bridge outputs to a well-defined output voltage range, the AD8557 accurately amplifies many other differential or singleended sensor outputs. The AD8557 uses the ADI patented low noise auto-zero and DigiTrim® technologies to create an incredibly accurate and flexible signal processing solution in a very compact footprint.

Gain is digitally programmable in a wide range from 28 to 1300 through a serial data interface. Gain adjustment can be fully simulated in-circuit and then permanently programmed with reliable polyfuse technology. Output offset voltage is also digitally programmable and is ratiometric to the supply voltage. When used in conjunction with an ADC referenced to the same supply, the system accuracy becomes immune to normal supply voltage variations. Output offset voltage can be adjusted with a resolution of better than 0.4% of the difference between VDD

and VSS. A lockout trim after gain and offset adjustment further ensures field reliability.

In addition to extremely low input offset voltage and input offset voltage drift and very high dc and ac CMRR, the AD8557 also includes a pull-up current source at the input pins and a pull-down current source at the VCLAMP pin. Output clamping set via an external reference voltage allows the AD8557 to drive lower voltage ADCs safely and accurately.

When used in conjunction with an ADC referenced to the same supply, the system accuracy becomes immune to normal supply voltage variations. Output offset voltage can be adjusted with a resolution of better than 0.4% of the difference between VDD and VSS. A lockout trim after gain and offset adjustment further ensures field reliability.

The AD8557 is fully specified from −40°C to +125°C. Operating from single-supply voltages of 2.7 V to 5.5 V, the AD8557 is offered in the 8-lead SOIC_N, and 4 mm × 4 mm 16-lead LFCSP_VQ.

Rev. PrC | Page 3 of 19

AD8557 Preliminary Technical Data

SPECIFICATIONS

VDD = 5.0 V, VSS = 0.0 V, VCM = 2.5 V, VO = 2.5 V, Gain = 28, TA = 25°C, unless otherwise specified.

Table 1. Electrical Specifications

Parameter Symbol Conditions Min Typ Max Unit

INPUT STAGE

Input Offset Voltage VOS −40°C ≤ TA ≤ +125°C 2 10 μV

Input Offset Voltage Drift TCVOS 50 nV/°C

Input Bias Current IB −40°C ≤ TA ≤ +125°C 8 18 28 nA

Input Offset Current IOS −40°C ≤ TA ≤ +125°C 1 8 nA

Input Voltage Range 0.8 3.6 V

Common-Mode Rejection Ratio CMRR VCM = 0.9 V to 3.6 V, AV = 28 70 82 dB

V

Linearity VO = 0.2 V to 3.4 V 20 ppm

V

Differential Gain Accuracy Second stage gain = 10 to 70 1.6 %

Differential Gain Accuracy Second stage gain = 100 to 250 2.5 %

Differential Gain Temperature

Coefficient

Second stage gain = 10 to 250 15 40 ppm/°C

DAC

Accuracy Offset codes = 8 to 248 0.7 0.8 %

Ratiometricity Offset codes = 8 to 248 50 ppm

Output Offset Offset codes = 8 to 248 5 35 mV

Temperature Coefficient 20 80 ppm FS/°C VCLAMP

Input Bias Current ICLAMP 100 166 330 nA

Input Voltage Range 1.25 2.64 V OUTPUT STAGE

Short-Circuit Current ISC Source -40 -25 mA

I

Sink 40 50 mA

SC

Output Voltage, Low VOL R

Output Voltage, High VOH R POWER SUPPLY

Supply Current ISY

Power Supply Rejection Ratio PSRR 125 dB

−40°C ≤ TA ≤ +125°C 105

DYNAMIC PERFORMANCE

Gain Bandwidth Product GBP First gain stage 2 MHz

Second gain stage 8 MHz

Settling Time ts To 0.1%, 4 V output step 8 μs NOISE PERFORMANCE

Input Referred Noise f = 1 kHz 32 nV/√Hz

Low Frequency Noise en p-p f = 0.1 Hz to 10 Hz 0.5 μV p-p

Total Harmonic Distortion THD VIN = 16.75 mV rms, f = 1 kHz -100 dB DIGITAL INTERFACE

Input Current 2 μA

DIGIN Pulse Width to Load 0 tw0 0.05 10 μs

DIGIN Pulse Width to Load 1 tw1 50 μs

Time Between Pulses at DIGIN tws 10 μs

DIGIN Low 1 V

DIGIN High 4 V

DIGOUT Logic 0 1 V

= 0.9 V to 3.6 V, AV = 1300 96 112 dB

CM

= 0.2 V to 4.8 V 1000 ppm

O

= 10 kΩ to 5 V 30 mV

L

= 10 kΩ to 0 V 4.94 V

L

= 2.5 V, VPOS = VNEG = 2.5 V, VDAC code

V

O

= XXXX

1.8 mA

Rev. PrC | Page 4 of 19

Preliminary Technical Data AD8557

Parameter Symbol Conditions Min Typ Max Unit

DIGOUT Logic 1 4 V

VDD = 2.7 V, VSS = 0.0 V, VCM = 1.35 V, VO = 1.35 V, Gain = 28, TA = 25°C, unless otherwise specified.

Table 2. Electrical Specifications

Parameter Symbol Conditions Min Typ Max Unit

INPUT STAGE

Input Offset Voltage VOS −40°C ≤ TA ≤ +125°C 2 10 μV Input Offset Voltage Drift TCVOS 50 nV/°C Input Bias Current IB −40°C ≤ TA ≤ +125°C 8 18 28 nA Input Offset Current IOS −40°C ≤ TA ≤ +125°C 0.2 1 nA Input Voltage Range 0.5 1.6 V Common-Mode Rejection Ratio CMRR VCM = 0.9 V to 3.6 V, AV = 28 70 82 dB V Linearity VO = 0.2 V to 3.4 V 20 ppm V Differential Gain Accuracy Second stage gain = 10 to 250 1.6 % Differential Gain Temperature

Coefficient

Second stage gain = 10 to 250 15 40 ppm/°C

DAC

Accuracy Offset codes = 8 to 248 0.7 0.8 % Ratiometricity Offset codes = 8 to 248 50 ppm Output Offset Offset codes = 8 to 248 5 35 mV Temperature Coefficient 20 80 ppm FS/°C

VCLAMP

Input Bias Current ICLAMP 100 166 330 nA Input Voltage Range 1.25 2.64 V

OUTPUT STAGE

Short-Circuit Current ISC Source -12 -7 mA Sink 15 20 mA Output Voltage, Low VOL R Output Voltage, High VOH R

POWER SUPPLY

Supply Current ISY

Power Supply Rejection Ratio PSRR 125 dB

−40°C ≤ TA ≤ +125°C 105

DYNAMIC PERFORMANCE

Gain Bandwidth Product GBP First gain stage 2 MHz Second gain stage 8 MHz Settling Time ts To 0.1%, 4 V output step 8 μs

NOISE PERFORMANCE

Input Referred Noise f = 1 kHz 32 nV/√Hz Low Frequency Noise en p-p f = 0.1 Hz to 10 Hz 0.5 μV p-p Total Harmonic Distortion THD VIN = 16.75 mV rms, f = 1 kHz -100 dB

DIGITAL INTERFACE

Input Current 2 μA DIGIN Pulse Width to Load 0 tw0 0.05 10 μs DIGIN Pulse Width to Load 1 tw1 50 μs Time Between Pulses at DIGIN tws 10 μs DIGIN Low 1 V DIGIN High 4 V DIGOUT Logic 0 1 V DIGOUT Logic 1 4 V

= 0.9 V to 3.6 V, AV = 1300 96 112 dB

CM

= 0.2 V to 4.8 V 1000 ppm

O

= 10 kΩ to 5 V 30 mV

L

= 10 kΩ to 0 V 2.64 V

L

= 2.5 V, VPOS = VNEG = 2.5 V, VDAC code

V

O

= XXXX

Rev. PrC | Page 5 of 19

1.8 mA

AD8557 Preliminary Technical Data

ABSOLUTE MAXIMUM RATINGS

Table 2.

Parameter Rating

Supply Voltage 6 V Input Voltage VSS − 0.3 V to VDD + 0.3 V Differential Input Voltage1 ±5.0 V Output Short-Circuit Duration to

Indefinite

VSS or VDD ESD (Human Body Model) 2000 V Storage Temperature Range −65°C to +150°C Operating Temperature Range −40°C to +125°C Junction Temperature Range −65°C to +150°C Lead Temperature Range 300°C

1

Differential input voltage is limited to ±5.0 V or ± the supply voltage, which-

ever is less.

Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.

THERMAL RESISTANCE

θJA is specified for the worst-case conditions, that is, a device

soldered in a circuit board for surface-mount packages.

Table 3. Thermal Resistance

Package Type θ

8-Lead SOIC_N (R) 158 43 °C/W 16-Lead LFCSP_VQ (CP) 44 31.5 °C/W

1

θJA is specified for the worst-case conditions, that is, θJA is specified for device

soldered in circuit board for LFCSP_VQ package.

1

θJC Unit

JA

ESD CAUTION

ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although this product features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality.

Rev. PrC | Page 6 of 19