Page 1
Low Power, Precision Auto-Zero Op Amp
AD8538
FEATURES PIN CONFIGURATION DIAGRAMS
Low offset voltage: 13 µV maximum
Input offset drift: 0.03 µV/°C
Single-supply operation: 2.7 V to 5.5 V
High gain, CMRR, and PSRR
Low input bias current: 25 pA
Low supply current: 180 µA
OUT
V–
+IN
1
AD8538
2
TOP VIEW
(Not to Scale)
3
V+
5
–IN
4
Figure 1. 5-Lead TSOT-23 (UJ-5)
05624-002
APPLICATIONS
NC
Mobile communications
Portable instrumentation
Battery-powered devices
Sensor interfaces
Temperature measurement
Electronic scales
GENERAL DESCRIPTION
The AD8538 is a very high precision amplifier featuring
extremely low offset voltage, low input bias current, and low
power consumption. The supply current is less than 180 μA at
5.0 V. Operation is fully specified from 2.7 V to 5.0 V single
supply (±1.35 V to ±2.5 V dual supply).
The AD8538 operates using very low power making this
amplifier ideal for battery-powered devices and portable
equipment.
The AD8538 is specified over the extended industrial temperature
range (−40°C to +125°C). The AD8538 amplifier is available in
5-lead TSOT-23, and 8-lead, narrow body SOIC packages.
1
AD8538
2
−IN
3
+IN
TOP VIEW
(Not to Scale)
4
V−
NC = NO CO NNECT
Figure 2. 8-Lead SOIC_N (R-8)
NC
8
7
V+
6
OUT
5
NC
05624-001
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Anal og Devices for its use, nor for any infringements of patents or ot her
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
Fax: 781.461.3113 © 2005 Analog Devices, Inc. All rights reserved.
www.analog.com
Page 2
AD8538
TABLE OF CONTENTS
Features .............................................................................................. 1
Absolute Maximum Ratings ............................................................5
Applications....................................................................................... 1
Pin Configuration Diagrams........................................................... 1
General Description ......................................................................... 1
Revision History ............................................................................... 2
Specifications..................................................................................... 3
Electrical Specifications............................................................... 3
REVISION HISTORY
10/05—Revision 0: Initial Version
Thermal Resistance .......................................................................5
ESD Caution...................................................................................5
Typical Perf or m an c e Charac t e r istic s ..............................................6
Outline Dimensions ....................................................................... 12
Ordering Guide .......................................................................... 12
Rev. 0 | Page 2 of 12
Page 3
AD8538
SPECIFICATIONS
ELECTRICAL SPECIFICATIONS
@VS = 5.0 V, VCM = 2.5 V, VO = 2.5 V, TA = 25°C, unless otherwise specified.
Table 1.
Parameter Symbol Conditions Min Typ Max Unit
INPUT CHARACTERISTICS
Offset Voltage V
OS
−40°C ≤ TA ≤ +125°C 30 µV
Input Bias Current I
B
−40°C ≤ TA ≤ +85°C 35 100 pA
−40°C ≤ TA ≤ +125°C 0.7 1.0 nA
Input Offset Current I
OS
−40°C ≤ TA ≤ +125°C 150 pA
Input Voltage Range 0 5 V
Common-Mode Rejection Ratio CMRR VCM = 0 V to 5 V 115 150 dB
−40°C ≤ TA ≤ +125°C; VCM = 0.2 V to 4.8 V 100 135 dB
Large Signal Voltage Gain A
VO
−40°C ≤ TA ≤ +125°C 110 135 dB
Offset Voltage Drift
ΔV
OS
OUTPUT CHARACTERISTICS
Output Voltage High V
OH
−40°C ≤ TA ≤ +125°C 4.98 V
R
−40°C ≤ TA ≤ +125°C 4.94 V
Output Voltage Low V
OL
−40°C ≤ TA ≤ +125°C 2.8 7 mV
R
−40°C ≤ TA ≤ +125°C 20 30 mV
Short-Circuit Limit I
SC
POWER SUPPLY
Power Supply Rejection Ratio PSRR VS = 2.7 V to 5.0 V 105 125 dB
−40°C ≤ TA ≤ +125°C 100 125 dB
Supply Current/Amplifier I
SY
−40°C ≤ TA ≤ +125°C 190 215 µA
DYNAMIC PERFORMANCE
Slew Rate SR RL =10 kΩ 0.4 V/µs
Settling Time 0.01% t
S
Overload Recovery Time 0.05 ms
Gain Bandwidth Product GBP 600 kHz
Phase Margin Ø
O
NOISE PERFORMANCE
Voltage Noise e
Voltage Noise Density e
n p-p
n
5 13 µV
15 25 pA
20 50 pA
RL = 10 kΩ, VO = 0.1 V to 4.9 V 115 141 dB
/ΔT
−40°C ≤ T
≤ +125°C 0.03 0.1 µV/°C
A
RL = 100 kΩ to ground 4.99 4.998 V
= 10 kΩ to ground 4.95 4.970 V
L
RL = 100 kΩ to V+ 1.9 5 mV
= 10 kΩ to V+ 17 20 mV
L
±25 mA
IO = 0 150 180 µA
G = ±1, 2 V step, CL = 20 pF, RL = 1 kΩ 10 s
RL = 10 kΩ, RL = 100 kΩ, CL = 20 pF 65 Degrees
f = 0.1 Hz to 10 Hz 2.0 µV p-p
f = 1 kHz 50
nV/√Hz
Rev. 0 | Page 3 of 12
Page 4
AD8538
@ VS = 2.7 V, VCM = 1.35 V, VO = 1.35 V, TA = 25°C, unless otherwise specified.
Table 2.
Parameter Symbol Conditions Min Typ Max Unit
INPUT CHARACTERISTICS
Offset Voltage V
OS
−40°C ≤ TA ≤ +125°C 30 µV
Input Bias Current I
B
−40°C ≤ TA ≤ +85°C 35 100 pA
−40°C ≤ TA ≤ +125°C 0.7 1.0 nA
Input Offset Current I
OS
−40°C ≤ TA ≤ +125°C 150 pA
Input Voltage Range 0 2.7 V
Common-Mode Rejection Ratio CMRR VCM = 0 V to 2.5 V 110 140 dB
−40°C ≤ TA ≤ +125°C 100 135 dB
Large Signal Voltage Gain A
VO
−40°C ≤ TA ≤ +125°C 105 135 dB
Offset Voltage Drift
ΔV
OS
OUTPUT CHARACTERISTICS
Output Voltage High V
OH
−40°C ≤ TA ≤ +125°C 2.68 V
R
−40°C ≤ TA ≤ +125°C 2.66 V
Output Voltage Low V
OL
−40°C ≤ TA ≤ +125°C 2.4 5 mV
R
−40°C ≤ TA ≤ +125°C 20 25 mV
Short-Circuit Limit I
SC
POWER SUPPLY
Power Supply Rejection Ratio PSRR VS = 2.7 V to 5.5 V 105 125 dB
−40°C ≤ TA ≤ +125°C 100 125 dB
Supply Current/Amplifier I
SY
−40°C ≤ TA ≤ +125°C 190 215 µA
DYNAMIC PERFORMANCE
Slew Rate SR RL = 10 kΩ 0.4 V/µs
Settling Time 0.01% t
S
Overload Recovery Time 0.05 ms
Gain Bandwidth Product GBP 600 kHz
Phase Margin Ø
O
NOISE PERFORMANCE
Voltage Noise e
Voltage Noise Density e
n p-p
n
5 13 µV
15 25 pA
20 50 pA
RL = 10 kΩ, VO = 0.1 V to 1.7 V 110 140 dB
/ΔT
−40°C ≤ T
≤ +125°C 0.03 0.1 µV/°C
A
RL = 100 kΩ to ground 2.68 2.698 V
= 10 kΩ to ground 2.67 2.68 V
L
RL = 100 kΩ to V+ 1.7 5 mV
= 10 kΩ to V+ 14 20 mV
L
±8 mA
IO = 0 150 180 µA
G = ±1, 1 V step, CL = 20 pF, RL = 1 kΩ 5 s
RL = 10 kΩ, RL = 100 kΩ, CL = 20 pF 65 Degrees
f = 0.1 Hz to 10 Hz 2.0 µV p-p
f = 1 kHz 50
nV/√Hz
Rev. 0 | Page 4 of 12
Page 5
AD8538
ABSOLUTE MAXIMUM RATINGS
T = 25°C, unless otherwise noted.
A
Table 3.
Parameter Rating
Supply Voltage +6 V
Input Voltage V − 0.3 V to V + 0.3 V
Differential Input Voltage ±6 V
Output Short-Circuit Duration to GND Observe derating curve
Storage Temperature Range –65°C to +150°C
Lead Temperature (Soldering, 60 sec) 300°C
Operating Temperature Range –40°C to +125°C
Junction Temperature Range −65°C to +150°C
SS DD
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
Absolute maximum ratings apply at 25°C, unless otherwise
noted.
THERMAL RESISTANCE
θ
is specified for the worst-case conditions, that is, a device
JA
soldered in a circuit board for surface-mount packages.
Table 4. Thermal Characteristics
Package Type θ θ Unit
5-Lead TSOT-23 (UJ-5) 207 61 °C/W
8-Lead SOIC_N (R-8) 158 43 °C/W
JA JC
ESD CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on
the human body and test equipment and can discharge without detection. Although this product features
proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy
electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance
degradation or loss of functionality.
Rev. 0 | Page 5 of 12
Page 6
AD8538
(
(
TYPICAL PERFORMANCE CHARACTERISTICS
V = 5 V or ±2.5 V, unless otherwise noted.
SY
450
VSY = 5V
0V < V
< 5V
400
350
300
250
200
150
NUMBER OF AMPLIFIERS
100
50
CM
T
= 25°C
A
0
–10.0
–8.4 –6.8 –5.2 –3.6 –2.0 –0.4 1.2 2.8 4.4 6.0 7.6 9.2
INPUT OFFSET VOLTAGE (µV)
Figure 3. Input Offset Voltage Distribution
05624-003
700
VSY= 5V AND 2.7V
600
500
400
300
200
INPUT BIAS CURRENT (p A)
100
0
25 45 65 85 105 125
TEMPERATURE (°C)
Figure 6. Input Bias Current vs. Temperature
05624-006
14
VSY=5V
–40°C < T
12
10
8
6
4
NUMBER OF AMPLIFIERS
2
0
00
< +125°C
A
0.012 0.024 0. 036 0.048 0.060 0.072 0.084
TCVOS(µV/°C)
05624-004
.09
6
Figure 4. Input Offset Voltage Drift Distribution
10
VSY=5V
=25°C
T
8
A
6
µV)
4
2
0
–2
–4
INPUT OFFSET VOLTAGE
–6
–8
–10
05
1234
INPUT COMMON-MODE VOLTAGE (V)
05624-005
Figure 5. Input Offset Voltage vs. Input Common-Mode Voltage
160
=25°C
T
A
140
120
100
80
60
SUPPLY CURRENT (µA)
40
20
0
05
1234
Figure 7. Supply Current vs. Supply Voltage
200
150
µA)
100
SUPPLY CURRENT
50
0
–40 10 60 110
Figure 8. Supply Current vs. Temperature
SUPPLY VOLTAGE (V)
VSY=5V
=2.7V
V
SY
TEMPERATURE (°C)
05624-007
05624-008
Rev. 0 | Page 6 of 12
Page 7
AD8538
R
R
10000
VSY=5V
T
=25°C
A
1000
100
10
ATION VOLTAG E (mV)
1
0.1
OUTPUT SATU
0.01
0.001 1010.10.01
SOURCE
SINK
LOAD CURRENT (mA)
VSY–V
Figure 9. Output Saturation Voltage vs. Load Current
OH
V
OL
05624-009
70
60
50
40
30
20
10
OPEN-LOOP GAIN (dB)
0
VSY= ±2.5V AND ±1.35V
–10
R
=100kΩ
L
C
=20pF
L
–20
1k 10k 100k 1M
FREQUENCY (Hz)
Figure 12. Open-Loop Gain and Phase vs. Frequency
ФM
135
90
45
0
–45
OPEN-LO OP PHASE SHIF T (Degrees)
05624-012
35
VSY=5V
R
= 10kΩ
L
30
25
20
ATION VOLTAG E (mV)
15
10
5
OUTPUT SATU
0
–40 –25 –10 5 20 35 50 65 80 95 110 125
TEMPERATURE (°C)
VSY–V
OH
V
OL
Figure 10. Output Saturation Voltage vs. Temperature
60
AV= 100
40
AV=10
20
AV=1
CLOSED-LOOP GAIN (dB)
0
VSY= 5V AND 2.7V
C
= 20pF
L
=2kΩ
R
L
120
100
80
60
CMRR (dB)
40
20
05624-010
0
100 1M
1k 10k 100k
FREQUENCY (Hz)
VSY= 5V AND 2.7V
T
=25°C
A
05624-013
Figure 13. CMRR vs. Frequency
100
80
60
PSRR (dB)
40
20
–PSRR
VSY= ±2.5V AND ±1.35V
T
=25°C
A
+PSRR
–20
1k 10k 100k 1M
FREQUENCY (Hz)
05624-011
0
100 1M
1k 10k 100k
FREQUENCY (Hz)
05624-014
Figure 14. PSRR vs. Frequency Figure 11. Closed-Loop Gain vs. Frequency
Rev. 0 | Page 7 of 12
Page 8
AD8538
1000
VSY= 5V AND 2.7V
100
AV= 100
VSY=5V
=1
A
V
C
= 300pF
L
= 10kΩ
R
L
10
1
OUTPUT IMPEDANCE (Ω)
0.1
0.01
100 1k 10k 100k 1M
AV=10
AV=1
FREQUENCY (Hz)
VOLTAGE (1V/DIV)
05624-022
TIME (4µs/DIV)
Figure 18. Large Signal Transient Response Figure 15. Closed-Loop Output Impedance vs. Frequency
60
VSY=5V
T
=25°C
A
R
=2kΩ
L
50
40
30
20
SMALL SIGNAL OVERSHOOT (%)
10
0
1 1000
10 100
LOAD CAPACIT ANCE (pF)
OS+
OS–
05624-015
VSY=5V
A
=–50
V
100
(mV)
IN
0
0
(V) V
OUT
V
–2.5
TIME (10µs/DIV)
Figure 16. Small Signal Overshoot vs. Load Capacitance Figure 19. Positive Overload Recovery
05624-017
05624-018
VSY=5VAND2.7V
=1
A
V
C
= 300pF
L
R
=2kΩ
L
VOLTAGE (50mV/DIV)
VSY=5V
A
=–50
V
0
(mV)
IN
–100
2.5
(V) V
OUT
V
0
05624-016
TIME (4µs/DIV)
TIME (10µs/DIV)
Figure 17. Small Signal Transient Response Figure 20. Negative Overload Recovery
Rev. 0 | Page 8 of 12
05624-019
Page 9
AD8538
1000
VSY = 5V
T
= 25°C
A
100
VOLTAGE NOISE DENSITY (nV/√Hz )
10
10 100 1k 10k
FREQUENCY ( Hz)
Figure 21. Voltage Noise Density
V
VOLTAGE (1V/DIV)
VSY=5V
A
V
V
IN
R
05624-021
L
V
IN
OUT
=1
=6Vp-p
= 10kΩ
TIME (200µs/DIV)
Figure 23. No Phase Reversal
05624-023
VSY=5VAND2.7V
VOLTAGE (500nV/DIV)
TIME (1s/DIV)
05624-020
Figure 22. 0.1 Hz to 10 Hz Input Voltage Noise
Rev. 0 | Page 9 of 12
Page 10
AD8538
(
V = 2.7 V or ±1.35 V.
S
180
VSY=2.7V
0V < V
<2.7V
160
140
120
100
NUMBER OF AMPLIFIERS
CM
T
=25°C
A
80
60
40
20
0
–10.0 –8.4 –6.8 –5.2 –3.6 –2.0 –0.4 1.2 2.8 4.4 6.0 7.6 9.2
Figure 24. Input Offset Voltage Distribution Figure 27. Output Saturation Voltage vs. Load Current
INPUT OFFSET VOLTAGE (µV)
10000
VSY=2.7V
T
=25°C
A
1000
100
10
SOURCE
1
OUTPUT SATURATION VOLTAGE (mV)
05624-024
0.1
0.001 1
0.01 0.1
SINK
LOAD CURRENT (mA)
05624-027
35
30
25
20
15
10
NUMBER OF AMPLIFIERS
5
0
0 0.012 0.024 0.036 0.048 0.060 0.072 0. 084 0.096
TCVOS(µV/°C)
VSY=2.7V
–40°C < T
< +125°C
A
05624-025
Figure 25. Input Offset Voltage Drift Distribution
10
VSY=2.7V
T
=25°C
A
8
6
µV)
4
2
0
–2
–4
INPUT OFFSET VOLTAGE
–6
–8
–10
02
0.5 1.0 1. 5 2.0
INPUT COMMON-MODE VOLTAGE (V)
05624-026
.5
Figure 26. Input Offset Voltage vs. Input Common-Mode Voltage
30
25
20
15
10
5
OUTPUT SATURATION VOLTAGE (mV)
0
–40 125
Figure 28. Output Saturation Voltage vs. Temperature
80
VSY=2.7V
T
70
R
60
50
40
30
20
SMALL SIGNAL OVERSHOOT (%)
10
0
11
Figure 29. Small Signal Overshoot vs. Load Capacitance
VSY=2.7V
R
=10kΩ
L
VSY=VOH
VOL
–25–105 203550658095110
TEMPERATURE (°C)
=25°C
A
=2kΩ
L
OS+
OS–
10 100
LOAD CAPACIT ANCE (pF)
05624-028
05624-029
000
Rev. 0 | Page 10 of 12
Page 11
AD8538
1000
VOLTAGE NOISE DENSITY (nV/√Hz)
100
VSY = 2.7V
T
= 25°C
A
VOLTAGE (500mV/DIV)
VSY=2.7V
A
=1
V
C
= 100pF
L
R
= 10kΩ
L
TIME (4µs/DIV)
Figure 30. Large Signal Transient Response
05624-030
10
10 100 1k 10k 100k
FREQUENCY ( Hz)
Figure 31. Voltage Noise Density
05624-032
Rev. 0 | Page 11 of 12
Page 12
AD8538
OUTLINE DIMENSIONS
2.90 BSC
54
0.50
0.30
2.80 BSC
0.95 BSC
*
1.00 MAX
SEATING
PLANE
(UJ-5)
0.20
0.08
8°
4°
0°
1.60 BSC
123
PIN 1
*
0.90
0.87
0.84
0.10 MAX
*
COMPLIANT TO JEDEC STANDARDS MO-193-AB WITH
THE EXCEPTION OF PACKAGE HEIGHT AND THICKNESS.
1.90
BSC
Figure 32. 5-Lead Thin Small Outline Transistor Package [TSOT_23]
Dimensions shown in millimeters
0.60
0.45
0.30
5.00 (0.1968)
4.80 (0.1890)
4.00 (0.1574)
3.80 (0.1497)
0.25 (0.0098)
0.10 (0.0040)
COPLANARITY
0.10
CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
85
1.27 (0.0500)
SEATING
PLANE
COMPLIANT TO JEDEC STANDARDS MS-012-AA
BSC
6.20 (0.2440)
5.80 (0.2284)
41
1.75 (0.0688)
1.35 (0.0532)
0.51 (0.0201)
0.31 (0.0122)
0.25 (0.0098)
0.17 (0.0067)
0.50 (0.0196)
0.25 (0.0099)
8°
1.27 (0.0500)
0°
0.40 (0.0157)
× 45°
Figure 33. 8-Lead Standard Small Outline Package [SOIC_N]
Narrow Body
(R-8)
Dimensions shown in millimeters and (inches)
ORDERING GUIDE
Model Temperature Range Package Description Package Option Branding
AD8538AUJZ-R2 −40°C to +125°C 5-Lead TSOT-23 UJ-5 AOC
AD8538AUJZ-REEL −40°C to +125°C 5-Lead TSOT-23 UJ-5 AOC
AD8538AUJZ-REEL7 −40°C to +125°C 5-Lead TSOT-23 UJ-5
AD8538ARZ −40°C to +125°C 8-Lead SOIC_N R-8
AD8538ARZ-REEL −40°C to +125°C 8-Lead SOIC_N R-8
AD8538ARZ-REEL7 −40°C to +125°C 8-Lead SOIC_N R-8
1
Z = Pb-free part.
1
1
1
1
1
1
AOC
© 2005 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D05624-0-10/05(0)
T
Rev. 0 | Page 12 of 12
TTT
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