ANALOG DEVICES AD8428 Service Manual

Low Noise, Low Gain Drift, G = 2000

+IN–

–FIL

V

Data Sheet

FEATURES

Fixed gain of 2000
Access to internal nodes provides flexibility
Low noise: 1.5 nV/√Hz input voltage noise
High accuracy dc performance

Gain drift: 10 ppm/°C
Offset drift: 1 μV/°C
Gain accuracy: 0.2%
CMRR: 130 dB min

Excellent ac specifications

Bandwidth: 3.5 MHz

Slew rate: 40 V/μs
Power supply range: ±4 V to ±18 V
8-pin SOIC package
ESD protection >5000 V (HBM)
Temperature range for specified performance:

−40°C to +85°C

Operational up to 125°C

APPLICATIONS

Sensor interface
Medical instrumentation
Patient monitoring

GENERAL DESCRIPTION

The AD8428 is an ultralow noise instrumentation amplifier
designed to accurately measure tiny, high speed signals. It
delivers industry-leading gain accuracy, noise, and bandwidth.

All gain setting resistors for the AD8428 are internal to the part
and are precisely matched. Care is taken in both the chip pinout
and layout. This results in excellent gain drift and quick settling
to the final gain value after the part is powered on.

The high CMRR of the AD8428 prevents unwanted signals
from corrupting the signal of interest. The pinout of the AD8428
is designed to avoid parasitic capacitance mismatches that can
degrade CMRR at high frequencies.

Instrumentation Amplifier

AD8428

FUNCTIONAL BLOCK DIAGRAM

+

S

IN

6kΩ 6kΩ

3kΩ

30.15Ω

3kΩ

6kΩ 6kΩ

–V

+FIL

S

Figure 1.

Table 1. Instrumentation Amplifiers by Category1

General­Purpose

Zero
Drift

Military
Grade

AD8220 AD8231 AD620 AD627 AD8428
AD8221 AD8290 AD621 AD623 AD8429
AD8222 AD8293 AD524 AD8235
AD8224 AD8553 AD526 AD8236
AD8228 AD8556 AD624 AD8426
AD8295 AD8557 AD8226

AD8227

1

See www.analog.com for the latest instrumentation amplifiers.

The AD8428 is one of the fastest instrumentation amplifiers
available. The circuit architecture is designed for high bandwidth
at high gain. The AD8428 uses a current feedback topology for
the initial preamplifier gain stage of 200, followed by a difference
amplifier stage of 10. This architecture results in a 3.5 MHz
bandwidth at a gain of 2000 for an equivalent gain bandwidth
product of 7 GHz.

The AD8428 pinout allows access to internal nodes between the
first and second stages. This feature can be useful for modifying
the frequency response between the two amplification stages,
thereby preventing unwanted signals from contaminating the
output results.

The performance of the AD8428 is specified over the industrial
temperature range of −40°C to +85°C. It is available in an 8-lead
plastic SOIC package.

120kΩ

120kΩ

AD8428

Low
Power

OUT

REF

Low
Noise

09731-001

Rev. 0

Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: [phone] www.analog.com
Fax: [phone] ©2011 Analog Devices, Inc. All rights reserved.

AD8428 Data Sheet

TABLE OF CONTENTS

Features .............................................................................................. 1

Applications ....................................................................................... 1 

Functional Block Diagram .............................................................. 1

General Description ......................................................................... 1

Revision History ............................................................................... 2

Specifications ..................................................................................... 3

Absolute Maximum Ratings ............................................................ 5

Thermal Resistance ...................................................................... 5

ESD Caution .................................................................................. 5

Pin Configuration and Function Descriptions ............................. 6

Typical Performance Characteristics ............................................. 7

REVISION HISTORY

10/11—Revision 0: Initial Version

Theory of Operation ...................................................................... 13

Architecture ................................................................................ 13

Filter Terminals ........................................................................... 13

Reference Terminal .................................................................... 13

Input Voltage Range ................................................................... 14

Layout .......................................................................................... 14

Input Bias Current Return Path ............................................... 15

Input Protection ......................................................................... 15

Radio Frequency Interference (RFI) ........................................ 16

Calculating the Noise of the Input Stage ................................. 16

Outline Dimensions ....................................................................... 18

Ordering Guide .......................................................................... 18

Rev. 0 | Page 2 of 20

Data Sheet AD8428

SPECIFICATIONS

VS = ±15 V, V

Table 2.

Parameter Test Conditions/Comments Min Typ Max Unit

COMMON-MODE REJECTION RATIO (RTI) VCM = ±10 V

CMRR, DC to 60 Hz 130 dB
CMRR at 50 kHz 110 dB

NOISE (RTI) VIN+, VIN− = 0 V

Voltage Noise f = 1 kHz 1.3 1.5 nV/√Hz

f = 0.1 Hz to 10 Hz 40 50 nV p-p

Current Noise f = 1 kHz 1.5 pA/√Hz
f = 0.1 Hz to 10 Hz 150 pA p-p
VOLTAGE OFFSET

Input Offset, V

Average TC TA = −40°C to +85°C 1 μV/°C

Offset RTI vs. Supply (PSRR) 120 dB
INPUT CURRENT

Input Bias Current 200 nA

Over Temperature TA = −40°C to +85°C 250 pA/°C

Input Offset Current 50 nA

Over Temperature TA = −40°C to +85°C 20 pA/°C

DYNAMIC RESPONSE

−3 dB Small Signal Bandwidth 3.5 MHz

Settling Time to 0.01% 10 V step 0.75 μs

Settling Time to 0.001% 10 V step 1.4 μs

Slew Rate 40 50 V/μs
GAIN

First Stage Gain 200 V/V

Subtractor Stage Gain 10 V/V

Total Gain Error V

Tot al G ain Nonlinearity V

Total Gain vs. Temperature 10 ppm/°C
INPUT

Impedance (Pin to Ground)

Input Operating Voltage Range VS = ±4 V to ±18 V −VS + 2.5 +VS − 2.5 V

Over Temperature TA = −40°C to +85°C −VS + 2.5 +VS − 2.5 V

OUTPUT

Output Swing RL = 2 kΩ −VS + 1.7 +VS − 1.2 V

Over Temperature TA = −40°C −VS + 2.0 +VS − 1.3 V
T

Output Swing RL = 10 kΩ −VS + 1.7 +VS − 1.0 V

Over Temperature TA = −40°C −VS + 1.8 +VS − 1.2 V
T

Short-Circuit Current 30 mA
REFERENCE INPUT

RIN 132 kΩ

IIN V

Voltage Range −VS +VS V

Reference Gain to Output 1 V/V

Reference Gain Error 0.01 %

= 0 V, TA = 25°C, G = 2000, RL = 10 k, unless otherwise noted.

REF

100 μV

OSI

= −10 V to +10 V 0.2 %

OUT

= −10 V to +10 V 5 ppm

OUT

1

1||2 GΩ||pF

= +85°C −VS + 1.6 +VS − 1.1 V

A

= +85°C −VS + 1.4 +VS − 0.9 V

A

+, VIN− = 0 V 6.5 μA

IN

Rev. 0 | Page 3 of 20

AD8428 Data Sheet

Parameter Test Conditions/Comments Min Typ Max Unit

FILTER TERMINALS

2

R

6 kΩ

IN

Voltage Range −VS +VS V

POWER SUPPLY

Operating Range ±4 ±18 V
Quiescent Current 6.5 6.8 mA

Over Temperature TA = −40°C to +85°C 8 mA

1

The differential and common-mode input impedances can be calculated from the pin impedance: Z

2

To calculate the actual impedance, see Figure 1.

DIFF

= 2(Z

); ZCM = Z

PIN

/2.

PIN

Rev. 0 | Page 4 of 20

Data Sheet AD8428

ABSOLUTE MAXIMUM RATINGS

Table 3.

Parameter Rating

Supply Voltage ±18 V
Output Short-Circuit Current Duration Indefinite
Maximum Voltage at −IN, +IN1 ±VS
Maximum Voltage at −FIL, +FIL ±VS
Differential Input Voltage1 ±1 V
Maximum Voltage at REF ±VS
Storage Temperature Range −65°C to +150°C
Specified Temperature Range −40°C to +85°C
Maximum Junction Temperature 140°C
ESD

Human Body Model 5000 V

Charged Device Model 1250 V

Machine Model 400 V

1

For voltages beyond these limits, use input protection resistors. See the

Input Protection section for more information.

Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.

THERMAL RESISTANCE

θJA is specified for the worst-case conditions, that is, a device
soldered in a circuit board for surface-mount packages.

Table 4. Thermal Resistance

Package θJA Unit

8-Lead SOIC_N 121 °C/W

ESD CAUTION

Rev. 0 | Page 5 of 20

AD8428 Data Sheet

A

PIN CONFIGURATION AND FUNCTION DESCRIPTIONS

D8428

–IN

1

–FIL

2

+FIL

3

+IN

4

TOP VIEW

(Not to Scale)

Figure 2. Pin Configuration

Table 5. Pin Function Descriptions

Pin No. Mnemonic Description

1 −IN Negative Input Terminal.
2 −FIL Negative Filter Terminal.
3 +FIL Positive Filter Terminal.
4 +IN Positive Input Terminal.
5 −VS Negative Power Supply Terminal.
6 REF Reference Voltage Terminal. Drive this terminal with a low impedance voltage source to level-shift the output.
7 OUT Output Terminal.
8 +VS Positive Power Supply Terminal.

+V

8

S

OUT

7

REF

6

–V

5

S

09731-002

Rev. 0 | Page 6 of 20