Analog Devices AD8391 Service Manual

xDSL Line Driver
a
FEATURES Ideal xDSL Line Driver for VoDSL or Low Power
Applications such as USB, PCMCIA, or PCI Based Customer Premise Equipment (CPE)
High Output Voltage and Current Drive
340 mA Output Drive Current
Low Power Operation
3 V to 12 V Power Supply Range 1-Pin Logic Controlled Standby, Shutdown Low Supply Current of 19 mA (Typical)
Low Distortion
–82 dBc SFDR, 12 V p-p into Differential 21 @ 100 kHz
4.5 nV/Hz Input Voltage Noise Density, 100 kHz
Out-of-Band SFDR = –72 dBc, 144 kHz to 500 kHz,
= 100 , P
Z
LINE
High Speed
40 MHz Bandwidth (–3 dB) 375 V/s Slew Rate
APPLICATIONS VoDSL Modems xDSL USB, PCI, PCMCIA Cards Line Powered or Battery Backup xDSL Modems
= 13.5 dBm
LINE
3V to 12 V with Power-Down
AD8391

PIN CONFIGURATION

8-Lead SOIC
(Thermal Coastline)
V
MID
IN1
PWDN
+V
V
OUT
V
1
2
 
3
S
4
1
S
AD8391
V
 
8
IN2
S
V
7
MID
6
–V
S
5
V
2
OUT

PRODUCT DESCRIPTION

The AD8391 consists of two parallel, low cost xDSL line drive amplifiers capable of driving low distortion signals while running on both 3 V to 12 V single-supply or equivalent dual-supply rails. It is primarily intended for use in single-supply xDSL systems where low power is essential, such as line powered and battery backup systems. Each amplifier output drives more than 250 mA of current while maintaining –82 dBc of SFDR at 100 kHz on 12 V, outstanding performance for any xDSL CPE application.
The AD8391 provides a flexible power-down feature consisting of a 1-pin digital control line. This allows biasing of the AD8391 to full power (Logic 1), standby (Logic three-state maintains low amplifier output impedance), and shutdown (Logic 0 places amplifier outputs in a high impedance state). PWDN is refer­enced to –V
.
S
Fabricated on ADIs high speed XFCB process, the high bandwidth and fast slew rate of the AD8391 keep distortion to a minimum, while dissipating a minimum of power. The quiescent current of the AD8391 is low: 19 mA total static current draw. The AD8391 comes in a compact 8-lead SOIC “thermal coastline” package and operates over the temperature range –40°C to +85°C.
REV. A
UPSTREAM POWER – 10dB/DIV
EMPTY BIN
25 250137.5
FREQUENCY – kHz
Figure 1. Upstream Transit Spectrum with Empty Bin at 45 kHz; Line Power = 12.5 dBm into 100
Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781/329-4700 www.analog.com Fax: 781/326-8703 © 2003 Analog Devices, Inc. All rights reserved.
AD8391–SPECIFICATIONS
(@ 25C, VS= 12 V, RL = 10 , V unless otherwise noted. See TPC 1 for Basic Circuit Configuration.)
= VS/2, G = –2, RF= 909 , RG= 453 ,
MID
Parameter Conditions Min Typ Max Unit
DYNAMIC PERFORMANCE
–3 dB Bandwidth G = –1, V
G = –2, V
0.1 dB Bandwidth V Large Signal Bandwidth V Slew Rate V Rise and Fall Time V
< 0.4 V p-p 4 MHz
OUT
= 4 V p-p 50 MHz
OUT
= 4 V p-p 375 V/µs
OUT
= 4 V p-p 8 ns
OUT
Settling Time 0.1%, V
< 0.4 V p-p, RG = 909 40 MHz
OUT
< 0.4 V p-p 38 MHz
OUT
= 2 V p-p 60 ns
OUT
NOISE/HARMONIC PERFORMANCE
Distortion, G = –5 (RG = 178 Ω)V
Second Harmonic 100 kHz, R
= 8 V p-p (Differential)
OUT
= 21 –82 dBc
L
Third Harmonic 100 kHz, RL = 21 –95 dBc MTPR (In-Band) 25 kHz to 138 kHz, R SFDR (Out-of-Band) 144 kHz to 500 kHz, R
= 21 70 dBc
L
= 21 72 dBc
L
Input Noise Voltage f = 100 kHz Differential 4.5 nV/Hz Input Noise Current f = 100 kHz 9 pA/Hz Crosstalk f = 1 MHz, G = –2, Output to Output 64 dB
DC PERFORMANCE
Input Offset Voltage V
= +VS/2 ±2 ±15 mV
MID
to T
T V
MIN
MID
MAX
= Float ±2mV
±3mV
Input Offset Voltage Match ±0.25 ±2.6 mV
T
Transimpedance ∆V
to T
MIN
MAX
= 5 V 10 M
OUT
±0.35 mV
INPUT CHARACTERISTICS
Input Resistance 125 Input Bias Current In1, In2 pins 2.5 10 µA Input Bias Current Match In1 – In2 ±0.5 ±6 µA CMRR V
= VIN = 5.5 V to 6.5 V, V
MID
/VIN, cm 48 dB
OS
Input CM Voltage Range 1.2 to 10.8 V
Accuracy V
V
MID
Input Resistance 2.5 k
V
MID
V
Input Capacitance 10 pF
MID
= Float Delta from +VS/2 ±5 ±30 mV
MID
OUTPUT CHARACTERISTICS
Output Resistance Frequency = 100 kHz, PWDN 1 0.3 Output Resistance Frequency = 100 kHz, PWDN 0 3 k Output Voltage Swing R Linear Output Current SFDR < –75 dBc, f = 100 kHz, R
= 100 0.1 11.9 V
LOAD
= 21 340 mA
L
Short-Circuit Current 1500 mA
POWER SUPPLY
Supply Current PWDN = 1 16 19 21 mA
T
MIN
to T
MAX
22 mA STBY Supply Current PWDN = Open or Three-State 10 mA SHUTDOWN Supply Current PWDN = 0 4 6 mA Operating Range Single Supply 3.0 12 V Power Supply Rejection Ratio V
= VS /2, ∆VS = ± 0.5 V 55 dB
MID
LOGIC INPUT (PWDN)
Logic 1 Voltage –VS + 2.0 V Logic 0 Voltage –V
+ 0.8 V
S
Logic Input Bias Current ± 300 µA Turn-On Time RL = 21 , IS = 90% of Typical 200 ns
Specifications subject to change without notice.
–2–
REV. A
AD8391
SPECIFICATIONS
(@ 25C, VS=3 V, RL = 10 , V See TPC 1 for Basic Circuit Configuration.)
= VS/2, G = –2, RF= 909 , RG= 453 , unless otherwise noted.
MID
Parameter Conditions Min Typ Max Unit
DYNAMIC PERFORMANCE
–3 dB Bandwidth G = –1, V
G = –2, V
0.1 dB Bandwidth V Large Signal Bandwidth V Slew Rate V
< 0.4 V p-p 3.5 MHz
OUT
= 2 V p-p 30 MHz
OUT
=2V p-p 50 V/µs
OUT
Rise and Fall Time Differential, V Settling Time 0.1%, V
< 0.4 V p-p 37 MHz
OUT
< 0.4 V p-p 36 MHz
OUT
= 1 V p-p 15 ns
OUT
= 2 V p-p 110 ns
OUT
NOISE/HARMONIC PERFORMANCE
Distortion V
= 4 V p-p (Differential)
OUT
Second Harmonic 100 kHz, RL= 21 81 dBc Third Harmonic 100 kHz, R
= 21 97 dBc
L
Input Noise Voltage f = 100 kHz Differential 4.5 nV/Hz Input Noise Current f = 100 kHz 9 pA/Hz
DC PERFORMANCE
Input Offset Voltage V
= +VS/2 ±3 ±15 mV
MID
to T
T V
MIN
MID
MAX
= Float ±3mV
±4mV
Input Offset Voltage Match ± 0.1 ±2.6 mV
T
Transimpedance ∆V
to T
MIN
MAX
= 1 V 8 M
OUT
±0.2 mV
INPUT CHARACTERISTICS
Input Resistance 125 Input Bias Current In1, In2 pins 1 7 µA Input Bias Current Match In1 – In2 ±0.5 ±4 µA CMRR V
VIN= 1.3 V to 1.5 V, ∆VOS /∆VIN, cm
MID
48 dB
=
Input CM Voltage Range 1.2 to 2.1 V
Accuracy V
V
MID
Input Resistance 2.5 k
V
MID
V
Input Capacitance 10 pF
MID
= Float, Delta from +VS/2 ±5 ±30 mV
MID
OUTPUT CHARACTERISTICS
Output Resistance Frequency = 100 kHz, PWDN 1 0.2 Output Resistance Frequency = 100 kHz, PWDN 0 9 k Output Voltage Swing R Linear Output Current SFDR < –82 dBc, f = 100 kHz, R
= 100 0.1 2.9 V
L
= 21 125 mA
L
Short-Circuit Current 1000 mA
POWER SUPPLY
Supply Current PWDN = 1 13 16 18 mA
T
MIN
to T
MAX
19 mA STBY Supply Current PWDN = Open or Three-State 8 mA SHUTDOWN Supply Current PWDN = 0 1 2 mA Operating Range Single Supply 3.0 12 V Power Supply Rejection Ratio V
= VS/2, ∆VS = ±0.5 V 55 dB
MID
LOGIC INPUTS (PWDN [1,0])
Logic 1 Voltage –VS + 2.0 V Logic 0 Voltage –V
+ 0.8 V
S
Logic Input Bias Current ± 60 µA Turn-On Time RL = 21 , IS = 90% of Typical 200 ns
Specifications subject to change without notice.
REV. A
–3–
AD8391

ABSOLUTE MAXIMUM RATINGS

Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12.6 V
Internal Power Dissipation
2
1
Small Outline Package (R) . . . . . . . . . . . . . . . . . . . 650 mW
Input Voltage (Common-Mode) . . . . . . . . . . . . . . . . . . . . ± V
Logic Voltage, PWDN . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±V
S
S
Output Short-Circuit Duration
. . . . . . . . . . . . . . . . . . . . .Observe Power Derating Curve
Storage Temperature Range . . . . . . . . . . . . –65°C to +150°C
Operating Temperature Range . . . . . . . . . . . –40°C to +85°C
Lead Temperature Range (Soldering 10 sec) . . . . . . . . . 300°C
NOTES
1
Stresses above those listed under Absolute Maximum Ratings may cause perma­nent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
2
Specification is for device on a 4-layer board in free air at 85°C: 8-Lead SOIC package: JA = 100°C/W.

MAXIMUM POWER DISSIPATION

The maximum power that can be safely dissipated by the AD8391 is limited by the associated rise in junction temperature. The maximum safe junction temperature for a plastic encapsu­lated device is determined by the glass transition temperature of the plastic, approximately 150°C. Temporarily exceeding this limit may cause a shift in parametric performance due to a change in the stresses exerted on the die by the package.
To ensure proper operation, it is necessary to observe the maxi­mum power derating curve.
2.0
1.5
8-LEAD SOIC PACKAGE
1.0
0.5
MAXIMUM POWER DISSIPATION – W
0
–50
–40 –30 –20 –10 0 10 20 30 40 50 60 70 80 90
AMBIENT TEMPERATURE – C
TJ = 150C
Figure 2. Plot of Maximum Power Dissipation vs. Temperature

ORDERING GUIDE

Temperature Package Package
Model Range Description Option
AD8391AR –40°C to +85°C 8-Lead SOIC R-8 AD8391AR–REEL –40°C to +85°C 8-Lead SOIC R-8 AD8391AR–REEL7 –40°C to +85°C 8-Lead SOIC R-8 AD8391AR–EVAL Evaluation Board
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the AD8391 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality.
–4–
REV. A
Typical Performance Characteristics–AD8391
TIME – ns
0.3
OUTPUT VOLTAGE – V
0.2
0.1
0
–0.1
–0.2
–0.4
1007550250 125 150 175 200 225 250
–0.3
0.4 VS = 1.5V
G
= –2
R
L
= 10
CF = 3pF
CF = 0pF
TIME – ns
1.5
OUTPUT VOLTAGE – V
1.0
0.5
0
–0.5
–1.0
–2.0
1007550250 125 150 175 200 225 250
–1.5
2.0
VS = 1.5V
G
= –2
R
L
= 10
CF = 3pF
CF = 0pF
TIME – ns
0.01
0 30050
OUTPUT ERROR – V
100 150 200 250
0.008
0.006
0.004
0.002
0
–0.002
–0.004
–0.006
–0.008
–0.01
VS = 6V
G
= –2
V
IN
= 1V p-p
OUTPUT ERROR
C
F
R
G
V
IN
~
V
MID
0.1F
TPC 1. Single-Ended Test Circuit
0.4
0.3
0.2
0.1
0
–0.1
OUTPUT VOLTAGE – V
–0.2
CF = 0pF
CF = 3pF
R
F
R
L
+
0.1F
+
0.1F
6.8F
6.8F
V
OUT
+V
S
–V
TPC 4. Small Signal Step Response
VS = 6V G
= –2
R
= 10
L
REV. A
–0.3
–0.4
1007550250
125 150 175 200 225 250
TIME – ns
TPC 2. Small Signal Step Response
4
3
2
1
0
–1
OUTPUT VOLTAGE – V
–2
–3
–4
TPC 3. Large Signal Step Response
CF = 0pF
C
= 3pF
F
1007550250 125 150 175 200 225 250
TIME – ns
VS = 6V G
= –2
R
= 10
L
TPC 5. Large Signal Step Response
TPC 6. 0.1% Settling Time
–5–
AD8391
12
9
6
3
0
–3
–6
–9
OUTPUT VOLTAGE – dBV
–12
–15
–18
0.1 1 100010 100
FREQUENCY – MHz
TPC 7. Output Voltage vs. Frequency
1500
VS = 6V
1250
1000
750
VOH @+85C
V
@+25C
OH
@–40C
V
OH
VS = 6V
= 10
R
L
= –2
G
6
3
0
–3
–6
–9
–12
–15
OUTPUT VOLTAGE – dBV
–18
–21
–24
0.1 1 100010 100
FREQUENCY – MHz
TPC 10. Output Voltage vs. Frequency
1200
VS = 1.5V
1000
800
600
@
V
+85C
OH
@
+25C
V
OH
@
–40C
V
OH
V
OL@
VS = 1.5V
= 10
R
L
G
= –2
–40C
500
V
@+85C
OL
@+25C
V
250
OUTPUT SATURATION VOLTAGE – m V
0
LOAD CURRENT – mA
OL
V
OL
TPC 8. Output Saturation Voltage vs. Load
18
15
12
9
6
3
GAIN – dB
0
–3
–6
–9
0.1 1 100010 100
STANDBY
FULL POWER
FREQUENCY – MHz
TPC 9. Small Signal Frequency Response
@–40C
900800600 7005004003002001000
= 6V
V
S
R
= 10
L
= 2
G
1000
400
200
OUTPUT SATURATION VOLTAGE – m V
0
LOAD CURRENT – mA
V
V
OL@
OL
@
+25C
+85C
450400300 350250200150100500
TPC 11. Output Saturation Voltage vs. Load
18
15
12
9
6
3
GAIN – dB
0
–3
–6
–9
0.1 1 100010 100
STANDBY
FREQUENCY – MHz
VS = 1.5V
R
= 10
L
= 2
G
FULL POWER
TPC 12. Small Signal Frequency Response
500
–6–
REV. A
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