35 ns settling time to 0.25% into 150 pF load
Slew rate 420 V/μs
Outputs to within 1.3 V of supply rails
High update rates
Fast, 110 MHz clock
Programmable video reference (brightness) and
full-scale (contrast) output levels
Flexible logic
INV bit reverses polarity of video signal
R/L reverses loading order of data
ISW selects frame/row or column/dot inversion
DSW selects single or dual data bus mode
Output short-circuit protection
3.3 V logic, 11 V to 18 V analog supplies
Available in 80-lead, 12 mm × 12 mm, TQFP E-pad
APPLICATIONS
LCD microdisplay driver
GENERAL DESCRIPTION
The AD8387 DecDriver provides dual, fast latched, 12-bit
decimating input, which drives 12 high voltage outputs. Twelvebit input words are loaded into 12 separate high speed, bipolar
DACs sequentially. Flexible digital input format allows more
than one AD8387 to be used in parallel for higher resolution
displays. The output signal can be adjusted for dc reference,
signal inversion, and contrast for maximum flexibility.
The AD8387 is fabricated on ADI’s fast bipolar, 26 V XFCB
process, providing fast input logic, bipolar DACs with trimmed
accuracy and fast settling, high voltage, precision drive
amplifiers on the same chip.
The AD8387 dissipates 1.34 W nominal static power. The
AD8387 is offered in an 80-lead TQFP E-pad package and
operates over the commercial temperature range of 0°C to
+85°C.
Decimating, LCD DecDriver
AD8387
FUNCTIONAL BLOCK DIAGRAM
DBA(0:11)
DBB(0:11)
BYP
TSW
GSW
DSW
CLK
XFR
R/L
ΔVDE CHANNEL MATCHING (mV)
12
1212
BIAS
THERMAL
SWITCH
G-MODE
SWITCH
SEQUENCE
CONTROL
5
4
3
2
1
0
CODE 0
CODE 4095
0
1020304050607080
INTERNAL AMBIENT TEMPERATURE (°C)
Figure 2. Channel Matching vs. Temperature
1212
12
12
TWO-STAGE
LATCH
TWO-STAGE
LATCH
TWO-STAGE
LATCH
TWO-STAGE
LATCH
AD8387
DAC
12
DAC
12
DAC
12
DAC
Figure 1.
NORMAL PROJECTOR OPERATING
TEMPERATURE RANGE
CODE 2048
SCALING
CONTROL
VRLVRHISWINV
VID0
VID1
VID10
VID11
05653-015
®
05653-001
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Anal og Devices for its use, nor for any infringements of patents or ot her
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
Data Switching Settling Time to 0.25% VIDx = 5 V step, CL = 150 pF 35 50 ns
Data Switching Settling Time to 1% 22 28 ns
Data Switching Slew Rate 20% to 80% 420 V/μs
CLK and Data Feedthrough
All-Hostile Crosstalk
3
4
15 mV p-p
Amplitude 69 mV p-p
Glitch Duration 50 ns
DAC Transition Glitch Energy DAC Code 2047 to 2048 0.4 nV-s
Invert Switching Settling Time to 0.25% VIDx = 10 V step, CL = 150 pF 70 150 ns
Invert Switching Settling Time to 1% 34 40 ns
Invert Switching Slew Rate 20% to 80% 700 V/μs
Invert Switching Overshoot 25 mV
Rev. 0 | Page 3 of 16
A MIN
= 0°C, T
= 75°C still air, unless otherwise noted.
A MAX
AD8387
Parameter Conditions Min Typ Max Unit
VIDEO OUTPUT CHARACTERISTICS
Output Voltage Swing AVCC − VOH, VOL − AGND 0.9 1.3 V
Output Voltage—Grounded Mode 0.06 0.150 V
Data Switching Delay: t
Data Switching Delay Skew: Δt
INV Switching Delay: t
INV Switching Delay Skew: Δt
Output Current 100 mA
Output Resistance 28 Ω
REFERENCE INPUTS
VRL Range VRH ≥ VRL 5.25 AVCC − 4 V
VRH Range VRH ≥ VRL VRL VRL + 2.75 V
VRH to VRL Range
VRH Input Resistance To VRL 22 kΩ
VRL Input Current −44 μA
VRH Input Current 111 μA
RESOLUTION Binary Coding 12 Bits
DIGITAL INPUT CHARACTERISTICS
CLK Frequency DSW = HIGH 110 MHz
DSW = LOW 85 MHz
Data Setup Time: t1 0 ns
XFR Setup Time: t3 0 ns
Data Hold Time: t2 3.5 ns
XFR Hold Time: t4 3.5 ns
CLK High Time: t5 DSW = HIGH 2.5 ns
CLK Low Time: t6 DSW = HIGH 3.0 ns
CLK High Time: t7 DSW = LOW 3.5 ns
CLK Low Time: t8 DSW = LOW 4.0 ns
CIN 3 pF
IIH 0.05 μA
IIH TSW 333 μA
IIH XFR 0.05 μA
IIL −0.6 μA
IIL TSW −1.3 μA
IIL XFR −1.2 μA
VIH 2 V
VIL 0.8 V
VTH 1.65 V
POWER SUPPLIES
DVCC, Operating Range 3 3.3 3.6 V
DVCC, Quiescent Current 54 70 mA
AVCC, Operating Range 11 18 V
AVCC, Quiescent Current 75 100 mA
OPERATING TEMPERATURE
Ambient Temperature Range, T
Ambient Temperature Range, T
1
VDE = differential error voltage, VCME = common-mode error voltage, ΔVDE = VDE matching between outputs, ΔV = maximum deviation between outputs, and full-scale output
voltage = VFS = 2 × (VRH − VRL). See the Accuracy section.
2
Guaranteed monotonic by characterization to four sigma limits.
3
Measured on two outputs differentially as CLK and DBx(0:11) are driven and XFR is held LOW.
4
Measured on two outputs differentially as the others are transitioning by 5 V. Measured for both states of INV.
5
Measured from 50% of rising CLK edge to 50% of output change. Measurement is made for both states of INV.
6
Measured from 50% of INV transition to 50% of output change.
7
Operation at elevated ambient temperature requires a thermally optimized PCB and additional thermal management, such as airflow across the surface of the AD8387.
5
7
6
8
1
5
7
6
8
VIDx = 5 V step 15.7 ns
4 ns
VIDx = 10 V step 16.2 ns
4 ns
0 2.75 V
T
A MIN
to T
A MAX
CLK input duty cycle 40% to 60%
7
A
7
A
Still air, TSW = LOW 0 75 °C
200 lfm airflow, TSW = LOW 0 85 °C
Rev. 0 | Page 4 of 16
AD8387
ABSOLUTE MAXIMUM RATINGS
Table 2.
Parameter Rating
Supply Voltages
AVCCx − AGNDx 18 V
DVCC − DGND 4.5 V
Input Voltages
Maximum Digital Input Voltage DVCC + 0.5 V
Minimum Digital Input Voltage DGND − 0.5 V
Maximum Analog Input Voltage AVCC + 0.5 V
Minimum Analog Input Voltage AGND − 0.5 V
Internal Power Dissipation
1
TQFP E-Pad @ TA = 25°C 4.38 W
Operating Temperature Range 0°C to 85°C
Storage Temperature Range −65°C to +125°C
Lead Temperature Range (Soldering 10 sec) 300°C
1
80-lead TQFP E-Pad:
θJA = 28.5°C/W (still air) [JEDEC Standard, 4-layer PCB in still air]
θJC = 12.2°C/W
θJB = 14.6°C/W
ΨJB = 12.0°C/W
ΨJT = 0.3°C/W.
Stresses above those listed under the Absolute Maximum
Ratings may cause permanent damage to the device. This is a
stress rating only; functional operation of the device at these or
any other conditions above those indicated in the operational
section of this specification is not implied. Exposure to the
absolute maximum ratings for extended periods may reduce
device reliability.
EXPOSED PADDLE
To ensure optimized thermal performance, the exposed paddle
must be thermally connected to an external plane, such as
AVCC or GND, as described in the
Applications section.
OVERLOAD PROTECTION
The AD8387 overload protection circuit consists of an output
current limiter and a thermal switch.
When TSW is LOW, the thermal switch is disabled and the
output current limiter is enabled. The maximum current at any
one output is internally limited to 100 mA average. In the event
of a momentary short-circuit between a video output and a
power supply rail (VCC or AGND), the output current limit is
sufficiently low to provide temporary protection.
When TSW is HIGH, the output current limiter, as well as the
thermal switch, is enabled. The thermal switch debiases the
output amplifier when the junction temperature reaches the
internally set trip point. In the event of an extended shortcircuit between a video output and a power supply rail, the
output amplifier current continues to switch between 0 and
100 mA typical with a period determined by the thermal time
constant and the hysteresis of the thermal trip point. The
thermal switch, when enabled, provides long-term protection
from accidental shorts during the assembly process by limiting
the average junction temperature to a safe level.
MAXIMUM POWER DISSIPATION
The maximum power that the AD8387 can safely dissipate is
limited by its junction temperature. The maximum safe junction
temperature for plastic encapsulated devices, as determined by the
glass transition temperature of the plastic, is approximately 150°C.
Exceeding this limit temporarily can cause a shift in the parametric
performance due to a change in the stresses exerted on the die by
the package. Exceeding a junction temperature of 150°C for an
extended period can result in device failure.
OPERATING TEMPERATURE RANGE
To ensure operation within the specified operating temperature
range, it is necessary to limit the maximum power dissipation as
follows.
3.0
200LFM
2.5
STILL AIR
2.0
1.5
QUIESCENT
MAXIMUM POWER DISSIPATION (W)
THERMAL
SWITCH
ENABLED
DISABLED
AD8387 on a 4-Layer JEDEC PCB with Thermally Optimized Landing
1.0
50556065707580859010095
7580859095100 105 110 115125120
Figure 3. Maximum Power Dissipation vs. Temperature,
Pattern as Described in the
500LFM
AMBIENT TEMPERATURE (°C)
Applications Section
05653-002
ESD CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on
the human body and test equipment and can discharge without detection. Although this product features
proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy
electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance
degradation or loss of functionality.
Rev. 0 | Page 5 of 16
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