Analog Devices AD8386 Service Manual

10-Bit, 12-Channel Output

FEATURES

High voltage drive

To within 1.3 V of supply rails
Output short-circuit protection
High update rates

Fast, 100 Ms/s 10-bit input data update rate
Static power dissipation: 1.4 W
Voltage-controlled video reference (brightness), offset,

and full-scale (contrast) output levels
INV bit reverses polarity of video signal

3.3 V logic, 9 V to 18 V analog supplies
High accuracy voltage outputs

Laser trimming eliminates the need for adjustments or

calibration

Flexible logic

XFR allows parallel AD8386 operation
Fast settling into capacitive loads

35 ns settling time to 0.25% into 150 pF load

Slew rate 400 V/μs
Available in 64-lead 9 mm × 9 mm LFCSP_VQ

GENERAL DESCRIPTION

The AD8386 provides a fast, 10-bit, latched, decimating digital
input that drives 12 high voltage outputs. Input words with
10 bits are loaded sequentially into 12 separate high speed,
bipolar DACs. Flexible digital input format allows several
AD8386s to be used in parallel in high resolution displays.
The output signal can be adjusted for dc reference, signal
inversion, and contrast for maximum flexibility.

BYP

VRH
VRH
VRL

DB(0:9)

R/L
CLK
XFR

INV

GCTL

GSW

TSW

SDI
SCL
SEN

SVRH
SVRL
SVRL

Decimating LCD Driver

AD8386

FUNCTIONAL BLOCK DIAGRAM

BIAS

2

10

3

3

3

2

SCALING

CONTROL

TWO-STAGE

LATCH

SEQUENCE

CONTROL

12-BIT
SHIFT

REGISTER

Figure 1.

10-BIT

DACs

INV

CONTROL

8-BIT

DAC

AD8386

VID0
VID1
VID2
VID3
VID4

12

VID5
VID6
VID7
VID8
VID9
VID10
VID11

VAO

05687-001

The AD8386 is fabricated on ADI’s fast bipolar, 26 V XFHV
process, which provides fast input logic, bipolar DACs with
trimmed accuracy and fast settling, high voltage, precision
drive amplifiers on the same chip.

The AD8386 dissipates 1.4 W nominal static power.

The AD8386 is offered in a 64-lead 9 mm × 9 mm LFCSP_VQ
package and operates over the commercial temperature range of
0°C to 85°C.

Rev. 0

Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Anal og Devices for its use, nor for any infringements of patents or ot her
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: [phone] www.analog.com
Fax: [phone] © 2005 Analog Devices, Inc. All rights reserved.

AD8386

TABLE OF CONTENTS

Features.............................................................................................. 1

Reference and Control Input Descriptions............................. 13

General Description ......................................................................... 1

Functional Block Diagram .............................................................. 1

Revision History ............................................................................... 2

Specifications..................................................................................... 3

DecDriver® Section ....................................................................... 3

Serial Interface Section ................................................................ 5

Absolute Maximum Ratings............................................................ 6

Maximum Power Dissipation ..................................................... 6

Overload Protection..................................................................... 6

Exposed Paddle............................................................................. 6

ESD Caution.................................................................................. 6

Operating Temperature Range ................................................... 7

Pin Configuration and Function Descriptions............................. 8

DecDriver Block Diagram and Timing........................................ 10

Serial Interface Block Diagram and Timing ............................... 12

Transfer Function and Analog Output Voltage...................... 13

Accuracy...................................................................................... 14

3-Wire Serial Interface............................................................... 14

Output Operating Modes.......................................................... 14

Overload Protection................................................................... 14

Applications..................................................................................... 15

Optimized Reliability with the Thermal Protection Circuit 15

Operation in High Ambient Temperature.............................. 15

Power Supply Sequencing ......................................................... 15

Grounded Output Mode During Power-Off.......................... 15

Typical Application Circuits ..................................................... 16

PCB Design for Optimized Thermal Performance ............... 17

AD8386 PCB Design Recommendations ............................... 17

Outline Dimensions....................................................................... 19

Ordering Guide .......................................................................... 19

Functional Description.................................................................. 13

REVISION HISTORY

8/05—Revision 0: Initial Version

Rev. 0 | Page 2 of 20

AD8386

SPECIFICATIONS

DECDRIVER® SECTION

At 25°C, AVCC = 15.5 V, DVCC = 3.3 V, T

Table 1.

Parameter Conditions Min Typ Max Unit

VIDEO DC PERFORMANCE

1

VDE DAC Code 450 to 800 −7.5 +7.5 mV
VCME DAC Code 450 to 800 −3.5 +3.5 mV

VIDEO OUTPUT DYNAMIC PERFORMANCE T

Data Switching Slew Rate 20% to 80%, VO = 5 V step 400 V/μs
Invert Switching Slew Rate 20% to 80%, VO = 10 V step 560 V/μs
Data Switching Settling Time to 1% 24 35 ns
Data Switching Settling Time to 0.25% 35 50 ns
Invert Switching Settling Time to 1% 80 130 ns
Invert Switching Settling Time to 0.25% 250 500 ns
Invert Switching Overshoot 10 V Step 100 200 mV
CLK and Data Feedthrough
All-Hostile Crosstalk

2

3

Amplitude 50 mV p-p
Glitch Duration 30 ns

DAC Transition Glitch Energy DAC code 511 to 512 0.6 nV-s

VIDEO OUTPUT CHARACTERISTICS

Output Voltage Swing AVCC − VOH, VOL − AGND 1.1 1.3 V
Output Voltage—Grounded Mode 200 mV
Data Switching Delay: t
INV Switching Delay: t

4

9

5

10

Output Current 100 mA
Output Resistance 29 Ω

REFERENCE INPUTS

VRL Range VRH ≥ VRL 5.25 AVCC − 4 V
VRH Range VRH ≥ VRL VRL AVCC V
VRH – VRL Range VFS = 2 × (VRH − VRL) 0 2.75 V
VRH Input Resistance To VRL 20 kΩ
VRL Input Current −45 μA
VRH Input Current 125 μA

RESOLUTION

Coding Binary 10 Bits

DIGITAL INPUT CHARACTERISTICS

CIN 3 pF
IIH 0.05 μA
IIL −2 μA
VIH 2 V
VIL 0.8 V
VTH 1.65 V
IIH TSW 330 μA
IIL TSW −2 μA
TSW R

10 kΩ

PULLDOWN

A MIN

= 0°C, T

= 85°C, VRH = 9.5 V, VRL = 7 V, unless otherwise noted.

A MAX

T

A MIN

A MIN

to T

to T

A MAX

, CL = 150 pF

A MAX

15 mV p-p

5 V step 12 14 16 ns
10 V step 15 17 19 ns

Rev. 0 | Page 3 of 20

AD8386

Parameter Conditions Min Typ Max Unit

DIGITAL TIMING CHARACTERISTICS T

Maximum Input Data Update Rate 100 Ms/s

Data Setup Time: t1 1 ns

XFR Setup Time: t3 0 ns

INV Setup Time: t11 0 ns

Data Hold Time: t2 3.5 ns

XFR Hold Time: t4 4.5 ns

INV Hold Time: t12 4 ns

CLK High Time: t7 6 ns

CLK Low Time: t8 4 ns

1

VDE = differential error voltage. VCME = common-mode error voltage. Full-scale output voltage = VFS = 2 × (VRH − VRL). See the Accuracy section.

2

Measured on two outputs differentially as CLK and DB (0:9) are driven and XFR is held low.

3

Measured on two outputs differentially as the others are transitioning by 5 V. Measured for both states of INV.

4

Measured from 50% of rising CLK edge to 50% of output change. Measurement is made for both states of INV.

5

Measured from 50% of rising CLK edge, which follows a valid XFR, to 50% of output change. See Figure 6 for the definition.

A MIN

to T

A MAX

Rev. 0 | Page 4 of 20

AD8386

SERIAL INTERFACE SECTION

At 25°C, AVCC = 15.5 V, DVCC = 3.3 V, T

Table 2.

Parameter Conditions Min Typ Max Unit

SERIAL DAC DC PERFORMANCE

DNL SVFS = 5 V −1 +1 LSB
INL SVFS = 5 V −1.5 +1.5 LSB
Output Offset Error −2.0 +2.0 LSB
Scale Factor Error −3.0 +3.0 LSB

SERIAL DAC OUTPUT DYNAMIC PERFORMANCE To 0.5%

VAO Settling Time, t26 C
VAO Settling Time, t26 C

SERIAL DAC OUTPUT CHARACTERISTICS

VAO Maximum SVRH − 1 LSB V
VAO Minimum SVRL V
VAO − Grounded Mode 150 mV
VAO Output Resistance All supplies OFF 75 kΩ
I

±30 mA

OUT

C

Low Range

LOAD

C

High Range

LOAD

REFERENCE INPUTS

SVRH Range SVRL < SVRH SVRL + 1 AVCC − 3.5 V
SVRL Range SVRL < SVRH AGND + 1.5 SVRH − 1 V
SVFS Range 1 8 V
SVRH Input Current SVRS = 5 V 0.1 μA
SVRL Input Current SVRS = 5 V −1.6 −1.3 mA

DIGITAL INPUT CHARACTERISTICS

CIN 3 pF
IIH 0.05 μA
IIL −1 μA
VIH 2.0 DVCC V
VIL DGND 0.8 V
VTH 1.65 V

DIGITAL TIMING CHARACTERISTICS T

SEN to SCL Setup Time, t20 10 ns
SCL, High Level Pulse Width, t21 10 ns
SCL, Low Level Pulse Width, t22 10 ns
SCL to SEN Hold Time, t23 10 ns
SDI Setup Time, t24 10 ns
SDI Hold Time, t25 10 ns

POWER SUPPLIES

DVCC, Operating Range 3 3.3 3.6 V
DVCC, Quiescent Current 54 75 mA
AVCC Operating Range 9 18 V
Total AVCC Quiescent Current 80 100 mA

OPERATING TEMPERATURES

Ambient Temperature Range, T
Ambient Temperature Range, T

1

Output VAO is designed to drive capacitive loads less than 0.002 μF or more than 0.047 μF. Load capacitances in the range 0.002 μF − 0.047 μF cause the output

overshoot to exceed 100 mV.

2

Operation at high ambient temperature requires a thermally optimized PCB layout (see the Applications section). In systems with limited or no airflow, the maximum

ambient operating temperature is limited to 70°C with the thermal protection enabled, VFS = 4 V, data update rate = 85 Ms/s. Operation at 85°C ambient temperature
requires the thermal protection circuit turned disabled (TSW = LOW).

1

1

2

A

2

A

A MIN

= 0°C, T

= 85°C, VRH = 9.5 V, VRL = 7 V, unless otherwise noted.

A MAX

= 100 pF 1 2 μs

L

= 33 μF 15 ms

L

0.002 μF

0.047 μF

to T

A MIN

A MAX

Still air, TSW = HIGH 0 70 °C
Still air, TSW = LOW 0 85 °C

Rev. 0 | Page 5 of 20

AD8386

ABSOLUTE MAXIMUM RATINGS

Table 3.

Parameter Rating

Supply Voltage

AVCCx − AGNDx 18 V

DVCC − DGND 4.5 V
Input Voltage

Maximum Digital Input Voltage DVCC + 0.5 V

Minimum Digital Input Voltage DGND − 0.5 V

Maximum Analog Input Voltage AVCC + 0.5 V

Minimum Analog Input Voltage AGND − 0.5 V
Internal Power Dissipation

LFCSP @ TA = 25°C 3.7 W
Operating Temperature Range 0°C to 85°C
Storage Temperature Range –65°C to +125°C
Lead Temperature Range

(Soldering 10 sec)

1

300°C

Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only and functional operation of the device at these or
any other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.

1

64-lead VQ_LFCSP:

θJA = 27°C/W in still air (JEDEC STD, 4-layer PCB with 16 vias on Epad)

θJA = 25°C/W @ 200 lfm airflow (JEDEC STD, 4-layer PCB with 16 vias on Epad)

θJA = 24°C/W @ 400 lfm airflow (JEDEC STD, 4-layer PCB with 16 vias on Epad)

ΨJT = 0.2°C/W in still air (JEDEC STD, 4-layer PCB with 16 vias on Epad)

ΨJB = 13.8°C/W in still air (JEDEC STD, 4-layer PCB with 16 vias on Epad)

MAXIMUM POWER DISSIPATION

The maximum power that can be safely dissipated by the
AD8386 is limited by its junction temperature. The maximum
safe junction temperature for plastic encapsulated devices, as
determined by the glass transition temperature of the plastic, is
approximately 150°C. Exceeding this limit temporarily may
cause a shift in the parametric performance due to a change in
the stresses exerted on the die by the package. Exceeding a
junction temperature of 175°C for an extended period can
result in device failure.

OVERLOAD PROTECTION

The AD8386 overload protection circuit consists of an output
current limiter and a thermal protection circuit.

When TSW is LOW, the thermal protection circuit is disabled,
and the output current limiter is turned on. The maximum
current at any one output of the AD8386 is internally limited to
100 mA average. In the event of a momentary short circuit
between a video output and a power supply rail (AVCC or
AGND), the output current limit is sufficiently low to provide
temporary protection.

When TSW is HIGH, the output current limiter, as well as the
thermal protection circuit, is turned on. The thermal protection
circuit debiases the output amplifier when the junction
temperature reaches the internally set trip point. In the event of
an extended short circuit between a video output and a power
supply rail, the output amplifier current continues to switch
between 0 mA and 100 mA typical with a period determined by
the thermal time constant and the hysteresis of the thermal trip
point. The thermal protection circuit limits the average junction
temperature to a safe level, which provides long-term
protection.

EXPOSED PADDLE

To ensure optimal thermal performance, the exposed paddle
must be electrically connected to an external plane, such as
AVCC or GND, as described in the

Applications section.

ESD CAUTION

ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate
on the human body and test equipment and can discharge without detection. Although this product features
proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy
electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance
degradation or loss of functionality.

Rev. 0 | Page 6 of 20